JP2009509359A - ミラー容量低下及び駆動電流改善のための単一ゲート上の複数の低及び高ｋゲート酸化物 - Google Patents

ミラー容量低下及び駆動電流改善のための単一ゲート上の複数の低及び高ｋゲート酸化物 Download PDF

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Publication number
JP2009509359A
JP2009509359A JP2008532402A JP2008532402A JP2009509359A JP 2009509359 A JP2009509359 A JP 2009509359A JP 2008532402 A JP2008532402 A JP 2008532402A JP 2008532402 A JP2008532402 A JP 2008532402A JP 2009509359 A JP2009509359 A JP 2009509359A
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Prior art keywords
oxide
gate
gate oxide
containing material
low
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JP2009509359A5 (https=
Inventor
チダンバラオ、デュレセティ
ドクマシ、オメル
グルチェンコフ、オレグ
ベルヤンスキー、マイケル
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International Business Machines Corp
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International Business Machines Corp
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Publication of JP2009509359A publication Critical patent/JP2009509359A/ja
Publication of JP2009509359A5 publication Critical patent/JP2009509359A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/018—Spacers formed inside holes at the prospective gate locations, e.g. holes left by removing dummy gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/40—Ion implantation into wafers, substrates or parts of devices into insulating materials

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2008532402A 2005-09-22 2006-09-22 ミラー容量低下及び駆動電流改善のための単一ゲート上の複数の低及び高ｋゲート酸化物 Pending JP2009509359A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/162,778 US20070063277A1 (en) 2005-09-22 2005-09-22 Multiple low and high k gate oxides on single gate for lower miller capacitance and improved drive current
PCT/US2006/036916 WO2007038237A2 (en) 2005-09-22 2006-09-22 Multiple low and high k gate oxides on single gate for lower miller capacitance and improved drive current

Publications (2)

Publication Number Publication Date
JP2009509359A true JP2009509359A (ja) 2009-03-05
JP2009509359A5 JP2009509359A5 (https=) 2009-04-16

Family

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Family Applications (1)

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JP2008532402A Pending JP2009509359A (ja) 2005-09-22 2006-09-22 ミラー容量低下及び駆動電流改善のための単一ゲート上の複数の低及び高ｋゲート酸化物

Country Status (7)

Country Link
US (1) US20070063277A1 (https=)
EP (1) EP1927128A4 (https=)
JP (1) JP2009509359A (https=)
KR (1) KR20080058341A (https=)
CN (1) CN101268543A (https=)
TW (1) TW200713456A (https=)
WO (1) WO2007038237A2 (https=)

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JP2011023625A (ja) * 2009-07-17 2011-02-03 Panasonic Corp 半導体装置およびその製造方法
JP2013516083A (ja) * 2009-12-30 2013-05-09 インテル コーポレイション 自己整合コンタクト
WO2014199481A1 (ja) * 2013-06-13 2014-12-18 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド Ｓｇｔを有する半導体装置とその製造方法

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US8896030B2 (en) 2012-09-07 2014-11-25 Intel Corporation Integrated circuits with selective gate electrode recess
US9064948B2 (en) 2012-10-22 2015-06-23 Globalfoundries Inc. Methods of forming a semiconductor device with low-k spacers and the resulting device
US9385214B2 (en) * 2013-07-17 2016-07-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a selectively adjustable gate structure
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US9425041B2 (en) 2015-01-06 2016-08-23 Lam Research Corporation Isotropic atomic layer etch for silicon oxides using no activation
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JP2011023625A (ja) * 2009-07-17 2011-02-03 Panasonic Corp 半導体装置およびその製造方法
JP2013516083A (ja) * 2009-12-30 2013-05-09 インテル コーポレイション 自己整合コンタクト
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Also Published As

Publication number Publication date
WO2007038237A3 (en) 2007-07-26
US20070063277A1 (en) 2007-03-22
EP1927128A2 (en) 2008-06-04
CN101268543A (zh) 2008-09-17
KR20080058341A (ko) 2008-06-25
TW200713456A (en) 2007-04-01
EP1927128A4 (en) 2009-01-28
WO2007038237A2 (en) 2007-04-05

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