JP2009278085A - 回路板の構造及び製造プロセス - Google Patents
回路板の構造及び製造プロセス Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
【解決手段】複合層と、微細回路パターンと、パターン化導電層を含む回路板構造を提供する。微細回路パターンが複合層にちりばめられ、パターン化導電層が複合層の表面上に配置される。微細回路溝が複合層の表面上に形成され、導電材料が溝に充填され、複合層にちりばめられる微細回路パターンを形成する。この微細回路パターンが相対的に微細な線幅及び間隔を有するので、回路板構造がより高い配線密度を有する。
【選択図】図2F
Description
110a,110b パターン化導電層
112 スルーホール
114 導電スルービア
116a,116b 開口
118a,118b 導電マイクロビア
120a,120b 誘電層
130a,130b パターン化導電層
140a,140b ソルダーマスク
142,143 接合パッド
150 回路板構造
200 誘電層
200a 微細回路溝
210 微細回路パターン
212 スルーホール
220a 導電層
220b パターン化導電層
222 導電スルービア
230a,230b ソルダーマスク
232a,232b 接合パッド
240 回路板構造
300 誘電層
300a 微細回路溝
310 微細回路パターン
312 スルーホール
320a 導電層
320b パターン化導電層
322 導電スルービア
330a,330b ソルダーマスク
332a,332b 接合パッド
340 回路板構造
400 複合層
401 誘電層
401a 微細回路溝
401b,403b 開口
402,403 誘電層
404,405 パターン化導電層
406 導電スルービア
410 微細回路パターン
412,413 導電マイクロビア
420a 導電層
420b パターン化導電層
430a,430b ソルダーマスク
420a 導電層
420b パターン化導電層
430a,430b ソルダーマスク
432a,432b 接合パッド
440 回路板構造
Claims (19)
- 第1表面及び対応する第2表面を有し、表面材料が誘電材料であるコア層と、
前記コア層の前記第1表面にちりばめられる微細回路パターンと、
前記コア層の前記第2表面上に配置される外部パターン化導電層と
を含む回路板構造。 - 前記コア層を貫通し、前記微細回路パターンを前記外部パターン化導電層に接続する少なくとも1つの導電スルービアを更に含み、前記導電スルービアが中空柱状または実芯柱状の形状を有する請求項1記載の回路板構造。
- 前記コア層の前記第1表面及び前記微細回路パターン上に配置される第1ソルダーマスクを更に含み、前記パターン化導電層が少なくとも1つの第1接合パッドを有し、前記第1ソルダーマスクが前記第1接合パッドを露出する請求項1記載の回路板構造。
- 前記コア層の前記第2表面及び前記外部パターン化導電層上に配置される第2ソルダーマスクを更に含み、前記外部パターン化導電層が少なくとも1つの第2接合パッドを有し、前記第2ソルダーマスクが前記第2接合パッドを露出する請求項3記載の回路板構造。
- 前記コア層が、複数の誘電層と、少なくとも1つの内部パターン化導電層とを含む複合層であって、前記内部パターン化導電層が前記誘電層の間に配置され、前記誘電層のうち2つが前記コア層の前記第1表面及び前記第2表面をそれぞれ形成する請求項1記載の回路板構造。
- 前記複合層が、複数の前記内部パターン化導電層と、前記誘電層の少なくとも1つを貫通し、前記内部パターン化導電層の少なくとも2つを接続する少なくとも1つの導電スルービアとを更に含み、前記導電スルービアが中空柱状または実芯柱状の形状を有する請求項5記載の回路板構造。
- 前記複合層の前記誘電層の1つを貫通し、前記内部パターン化導電層及び前記微細回路パターンを接続する少なくとも1つの導電マイクロビアを更に含む請求項5記載の回路板構造。
- 第1表面及び対応する第2表面を有し、表面材料が誘電材料であるコア層を提供することと;
前記コア層の前記第1表面上に微細回路溝を形成することと;
前記微細回路溝に導電材料を充填し、微細回路パターンを形成することと;
前記コア層の前記第2表面上に外部パターン化導電層を形成することと
を含む回路板製造プロセス。 - 前記微細回路溝を形成するステップがレーザーアブレーティングを含む請求項8記載の回路板製造プロセス。
- 前記微細回路溝に前記導電材料を充填するステップが電気メッキを含む請求項8記載の回路板製造プロセス。
- 前記コア層の前記第1表面上に第1ソルダーマスクを形成することを更に含み、前記微細回路パターンが少なくとも1つの接合パッドを有し、前記第1ソルダーマスクが形成された後、前記接合パッドが露出される請求項8記載の回路板製造プロセス。
- 前記コア層の前記第2表面上に第2ソルダーマスクを形成することを更に含み、前記外部パターン化導電層が少なくとも1つの第2接合パッドを含み、前記第2ソルダーマスクが形成された後、前記第2接合パッドが露出される請求項11記載の回路板製造プロセス。
- 前記コア層が、複数の誘電層と、少なくとも1つの内部パターン化導電層とを含む複合層であり、前記内部パターン化導電層が前記誘電層の間に配置され、前記誘電層のうち2つが前記コア層の前記第1表面及び前記第2表面をそれぞれ形成する請求項8記載の回路板製造プロセス。
- 前記複合層が、複数の前記内部パターン化導電層と、前記誘電層の少なくとも1つを貫通し、前記内部パターン化導電層の少なくとも2つを接続する少なくとも1つの導電スルービアとを更に含み、前記導電スルービアが中空柱状または実芯柱状の形状を有する請求項13記載の回路板製造プロセス。
- 前記微細回路溝を形成すると同時に、前記微細回路溝が形成される前記誘電層上に少なくとも1つの開口を形成し、前記内部パターン化導電層の一部分を露出することと;
前記微細回路溝に前記導電材料を充填すると同時に、前記開口に前記導電材料を充填し、導電マイクロビアを形成することとを更に含み、
前記導電材料が電気メッキにより前記微細回路溝及び前記開口に充填され、導電層が前記コア層の前記第2表面上に形成され、前記導電層がパターン化され、前記外部パターン化導電層が形成される請求項13記載の回路板製造プロセス。 - 前記外部パターン化導電層を形成するステップがサブトラクティブプロセスまたはフォトリソグラフィ及びエッチングを含む請求項15記載の回路板製造プロセス。
- 前記外部パターン化導電層を形成するステップがアディティブプロセスまたはセミアディティブプロセスを含む請求項13記載の回路板製造プロセス。
- 前記外部パターン化導電層を形成するステップが、
前記コア層の前記第2表面上に導電層を形成することと;
前記導電層をパターン化し、前記外部パターン化導電層を形成することと
を含む請求項13記載の回路板製造プロセス。 - 前記導電層をパターン化するステップがフォトリソグラフィ及び電気メッキを含む請求項18記載の回路板製造プロセス。
Applications Claiming Priority (1)
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TW097117556A TW200948238A (en) | 2008-05-13 | 2008-05-13 | Structure and manufacturing process for circuit board |
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JP2009278085A true JP2009278085A (ja) | 2009-11-26 |
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JP2009111643A Pending JP2009278085A (ja) | 2008-05-13 | 2009-04-30 | 回路板の構造及び製造プロセス |
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US (2) | US8365400B2 (ja) |
EP (1) | EP2120515A1 (ja) |
JP (1) | JP2009278085A (ja) |
TW (1) | TW200948238A (ja) |
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CN104754853B (zh) * | 2013-12-30 | 2017-11-24 | 鹏鼎控股(深圳)股份有限公司 | 具有收音孔的电路板及其制作方法 |
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2008
- 2008-05-13 TW TW097117556A patent/TW200948238A/zh unknown
- 2008-12-29 US US12/345,386 patent/US8365400B2/en active Active
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2009
- 2009-03-26 EP EP09250862A patent/EP2120515A1/en not_active Withdrawn
- 2009-04-30 JP JP2009111643A patent/JP2009278085A/ja active Pending
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2012
- 2012-12-24 US US13/726,405 patent/US9237643B2/en active Active
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Also Published As
Publication number | Publication date |
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US9237643B2 (en) | 2016-01-12 |
US20090284935A1 (en) | 2009-11-19 |
US20130105202A1 (en) | 2013-05-02 |
US8365400B2 (en) | 2013-02-05 |
TW200948238A (en) | 2009-11-16 |
EP2120515A1 (en) | 2009-11-18 |
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