JP2009194316A - Low-resistance chip resistor composed of resistor metal plate and method of manufacturing the same - Google Patents
Low-resistance chip resistor composed of resistor metal plate and method of manufacturing the same Download PDFInfo
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- JP2009194316A JP2009194316A JP2008036164A JP2008036164A JP2009194316A JP 2009194316 A JP2009194316 A JP 2009194316A JP 2008036164 A JP2008036164 A JP 2008036164A JP 2008036164 A JP2008036164 A JP 2008036164A JP 2009194316 A JP2009194316 A JP 2009194316A
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- 239000002184 metal Substances 0.000 title claims abstract description 98
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 98
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000000463 material Substances 0.000 claims abstract description 56
- 230000001681 protective effect Effects 0.000 claims abstract description 20
- 238000009792 diffusion process Methods 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 18
- 239000010949 copper Substances 0.000 claims description 75
- 229910052802 copper Inorganic materials 0.000 claims description 69
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 65
- 238000005219 brazing Methods 0.000 claims description 54
- 229910052718 tin Inorganic materials 0.000 claims description 33
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 31
- 238000007747 plating Methods 0.000 claims description 31
- 229910045601 alloy Inorganic materials 0.000 claims description 17
- 239000000956 alloy Substances 0.000 claims description 17
- 238000005520 cutting process Methods 0.000 claims description 11
- YCKOAAUKSGOOJH-UHFFFAOYSA-N copper silver Chemical compound [Cu].[Ag].[Ag] YCKOAAUKSGOOJH-UHFFFAOYSA-N 0.000 claims description 8
- 239000004962 Polyamide-imide Substances 0.000 claims description 6
- 229920002312 polyamide-imide Polymers 0.000 claims description 6
- 229910002056 binary alloy Inorganic materials 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 229910001369 Brass Inorganic materials 0.000 abstract 3
- 239000010951 brass Substances 0.000 abstract 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000006023 eutectic alloy Substances 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 229910052748 manganese Inorganic materials 0.000 description 3
- 238000007790 scraping Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 229910000896 Manganin Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000004115 Sodium Silicate Substances 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000007822 coupling agent Substances 0.000 description 2
- 238000005238 degreasing Methods 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 description 2
- 229910052911 sodium silicate Inorganic materials 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910001006 Constantan Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/144—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being welded or soldered
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
Description
本発明は、抵抗金属板低抵抗チップ抵抗器及びその製造方法に関する。 The present invention relates to a resistance metal plate low resistance chip resistor and a manufacturing method thereof.
モーターやスイッチングレギュレータの制御回路に通電したときの電流を検出するシャント抵抗器等の電子部品では、合金からなる板状の金属抵抗体の両端に電極層が形成された金属板チップ抵抗器が従来から使用されており、その抵抗値は比較的低く、数ｍΩから１Ω程度に設定されている。このような金属板チップ抵抗器に対して、抵抗温度係数及び電流特性を安定させ、インダクタンス値を低く抑え、電流検出を高精度化したいという要望があり、これに応えるチップ抵抗器の製造方法が特許文献１に記載されている。 In electronic parts such as shunt resistors that detect current when a motor or switching regulator control circuit is energized, a metal plate chip resistor in which electrode layers are formed on both ends of a plate-shaped metal resistor made of an alloy is conventionally used. The resistance value is relatively low and is set to about several mΩ to 1Ω. There is a demand for such a metal plate chip resistor to stabilize the temperature coefficient of resistance and current characteristics, to keep the inductance value low, and to improve the accuracy of current detection. It is described in Patent Document 1.
すなわち、特許文献１には、金属抵抗体の両端部に銅などの高導電性材料の薄片を圧着又は融着により固定して電極を形成し、金属抵抗体の側面を長手方向に沿って削り落とすか、又は金属抵抗体の上下面を厚み方向に削り落とし、その削り加工の寸法を調整することにより抵抗値を調整し、金属抵抗体の露出面に保護膜を設ける低抵抗器の製造方法が記載されている。
この低抵抗器の製造方法では、金属抵抗体の側面又は上下面を削り落としながら抵抗値を調整する工程に時間が掛かりすぎて生産性が低下するという問題があり、また銅などの高導電性材料の薄片を金属抵抗体に圧着又は融着するための具体的な方法についての記載も無く、特許文献１の方法を実際の生産現場に導入することは困難である。
That is, in Patent Document 1, electrodes are formed by fixing a thin piece of a highly conductive material such as copper to both ends of a metal resistor by pressure bonding or fusion, and the side surface of the metal resistor is shaved along the longitudinal direction. A method of manufacturing a low-resistance device in which a protective film is provided on the exposed surface of a metal resistor by dropping or scraping the upper and lower surfaces of the metal resistor in the thickness direction and adjusting the size of the shaving process to adjust the resistance value Is described.
In this low resistor manufacturing method, there is a problem that the process of adjusting the resistance value while scraping the side surface or the upper and lower surfaces of the metal resistor takes too much time, resulting in a decrease in productivity, and high conductivity such as copper. There is no description of a specific method for pressure bonding or fusing a thin piece of material to a metal resistor, and it is difficult to introduce the method of Patent Document 1 to an actual production site.
また特許文献２には、セラミックス基板の表面にマンガニン、コンスタンタンなどの銅合金からなるシート状抵抗体を重ね合わせると共に、裏面に銅板を重ね合わせて、銀ロウ等を用いた活性化金属法により一体に接合し、シート状抵抗体抵抗体の両端に電流、電圧検出用のボンディング電極部を設けたシャント抵抗素子が記載されている。
しかしながら、セラミックス基板とシート状抵抗体（抵抗金属板）とを活性金属を含むロウ材で接合する場合、そのロウ材が高価であり、接合時間が掛かりすぎて生産性が低下するという課題がある。
However, when the ceramic substrate and the sheet-like resistor (resistive metal plate) are joined with a brazing material containing an active metal, the brazing material is expensive, and there is a problem that productivity is lowered due to excessive joining time. .
本発明は、上記課題を解決するものであり、その目的は、検知する電流値が比較的高く、例えば５Ａ以上である場合には、抵抗値が１ｍΩ未満の抵抗金属板低抵抗チップ抵抗器が必要であるため、高い信頼性を有する１ｍΩ未満の低抵抗チップ抵抗器を煩雑な工程を経ることなく製造可能にする方法を提供することにある。 The object of the present invention is to solve the above-mentioned problems. The object of the present invention is to provide a resistance metal plate low resistance chip resistor having a resistance value of less than 1 mΩ when the detected current value is relatively high, for example, 5 A or more. Therefore, it is necessary to provide a method capable of manufacturing a highly reliable low resistance chip resistor of less than 1 mΩ without complicated processes.
また本発明の別の目的は、検知する電流値が比較的高く、例えば、５Ａ以上である場合には抵抗値が１ｍΩ未満の抵抗金属板低抵抗チップ抵抗器が必要であるため、煩雑な工程を経ることなく製造可能である１ｍΩ未満の低抵抗の抵抗金属板チップ抵抗器を提供することにある。 Another object of the present invention is that a current value to be detected is relatively high. For example, when the current value is 5 A or more, a resistance metal plate low resistance chip resistor having a resistance value of less than 1 mΩ is required, and thus a complicated process. An object of the present invention is to provide a resistance metal plate chip resistor having a low resistance of less than 1 mΩ, which can be manufactured without going through.
本発明では、以下に記載する（１）乃至（５）の手段により、上記課題が解決される。 In the present invention, the above problems are solved by means (1) to (5) described below.
（１）本発明では、抵抗金属板の一方の面又は両面に銅板をロウ付けし、表面から酸化膜を除去した後に、前記銅板の表面の全域にスズめっき膜を形成することにより集合複層板体を形成し、当該集合複層板体を所望の幅で短冊状に切断して短冊状複層板体を形成し、当該短冊状複層板体のスズめっき膜が形成された一方の面又は両面から、短辺方向のほぼ中央を所定幅で長辺方向に切削し、スズめっき膜、銅板、ロウ材、及び抵抗金属板とロウ材との少なくとも拡散層を除去して凹部を一方の面又は両面に形成し、当該凹部の底面に保護膜を形成した後に、前記短冊状複層板体を所望の幅で切断してチップ状の抵抗器を製造することを特徴とする抵抗金属板低抵抗チップ抵抗器の製造方法が提供される。 (1) In the present invention, a copper plate is brazed to one surface or both surfaces of a resistance metal plate, an oxide film is removed from the surface, and then a tin plating film is formed over the entire surface of the copper plate. A plate body is formed, the aggregate multilayer plate body is cut into a strip shape with a desired width to form a strip multilayer plate body, and the tin plating film of the strip multilayer plate body is formed. From the surface or both surfaces, the center of the short side direction is cut in the long side direction with a predetermined width, and at least the diffusion layer of the tin plating film, the copper plate, the brazing material, and the resistance metal plate and the brazing material is removed to form the concave portion. And forming a chip-shaped resistor by cutting the strip-shaped multilayer plate body with a desired width after forming a protective film on the bottom surface of the recess and forming a protective film on the bottom surface of the recess. A method of manufacturing a plate low resistance chip resistor is provided.
（２）本発明では、前記抵抗金属板が、銅を９０重量％以上含有する合金である前記（１）に記載の抵抗金属板低抵抗チップ抵抗器の製造方法が提供される。 (2) In this invention, the manufacturing method of the resistance metal plate low resistance chip resistor as described in said (1) whose said resistance metal plate is an alloy containing 90 weight% or more of copper is provided.
（３）本発明では、銅−銀二元合金からなるロウ材により、前記抵抗金属板と前記銅板とをロウ付けすることを特徴とする前記（１）に記載の抵抗金属板低抵抗チップ抵抗器の製造方法が提供される。 (3) In the present invention, the resistance metal plate and the copper plate are brazed with a brazing material made of a copper-silver binary alloy, and the resistance metal plate low resistance chip resistor according to (1) above A manufacturing method is provided.
（４）本発明では、ポリアミドイミド樹脂含有する材料により、前記凹部の底面に保護膜を形成することを特徴とする前記（１）に記載の抵抗金属板低抵抗チップ抵抗器の製造方法が提供される。 (4) According to the present invention, there is provided a method for manufacturing a resistance metal plate low resistance chip resistor according to (1) above, wherein a protective film is formed on the bottom surface of the recess by a material containing a polyamideimide resin. Is done.
（５）本発明では、抵抗金属板の一方の面又は両面に銅板をロウ付けし、表面から酸化膜を除去し、前記銅板の表面の全域にスズめっき膜を形成することにより集合複層板体を形成し、集合複層板体を所望の幅で短冊状に切断し、短冊状の複層板体のスズめっき膜が形成された一方の面又は両面から、短辺方向のほぼ中央を所定幅で長辺方向に切削し、スズめっき膜、銅板、ロウ材、及び抵抗金属板とロウ材との少なくとも拡散層を除去して凹部を一方の面又は両面に形成し、当該凹部の底面に保護膜を形成した後に、短冊状複層板体を所望の幅でチップ状に切断して形成されたものである抵抗金属板低抵抗チップ抵抗器が提供される。 (5) In the present invention, a copper plate is brazed to one side or both sides of the resistance metal plate, an oxide film is removed from the surface, and a tin plating film is formed over the entire surface of the copper plate, thereby collecting the multilayered plate. Forming a body, cutting the aggregated multilayer plate into strips with a desired width, and from one side or both sides of the strip-like multilayer plate on which the tin plating film is formed, approximately the center in the short side direction Cutting at a predetermined width in the long side direction, removing a tin plating film, a copper plate, a brazing material, and at least a diffusion layer of the resistance metal plate and the brazing material to form a recess on one or both surfaces, and forming the bottom surface of the recess A resistance metal plate low resistance chip resistor is provided which is formed by cutting a strip-shaped multilayer plate body into a chip shape with a desired width after forming a protective film on the substrate.
なお、短冊状の複層板体のスズめっき膜が形成された一方の面又は両面から、短辺方向のほぼ中央を所定幅で長辺方向に切削し、スズめっき膜、銅板、ロウ材、及び抵抗金属板とロウ材との少なくとも拡散層を除去して凹部を一方の面又は両面に形成する工程では、凹部の切削深さは、例えば、サンプリングした短冊状の複層板体に対して、顕微鏡等を用いて断面を目視等で計測することにより、抵抗金属板とロウ材との拡散層を確実に除去できる深さに設定する。したがって、この工程では、拡散層に加えて抵抗金属板も若干の厚さが切削される。 In addition, from one surface or both surfaces on which the tin-plated film of the strip-shaped multilayer plate body is formed, the center of the short side direction is cut in the long side direction with a predetermined width, a tin plating film, a copper plate, a brazing material, In the step of removing at least the diffusion layer of the resistance metal plate and the brazing material and forming the recesses on one or both surfaces, the cutting depth of the recesses is, for example, relative to a sampled strip-shaped multilayer plate body The depth is set so that the diffusion layer of the resistance metal plate and the brazing material can be reliably removed by visually measuring the cross section using a microscope or the like. Therefore, in this step, in addition to the diffusion layer, the resistance metal plate is also cut to a certain thickness.
本発明では、抵抗金属板の片面又は両面に銅板をロウ付けし、銅板の表面の全域にスズめっき膜を形成してなる短冊状の複層板体に対して、スズめっき膜が形成された片面又は両面から、短辺のほぼ中央を所定幅で長辺方向に切削することにより、スズめっき膜、銅板、ロウ材、及び抵抗金属板とロウ材との拡散層を一括して片面又は両面から除去して凹部を形成し、凹部の底面に保護膜を形成した後に、短冊状複層板体を所望の幅で切断してチップ状の抵抗器を製造するので、個々のチップ状の抵抗器に対して削り落とし工程を実施する必要がなく、高い信頼性を有する１ｍΩ未満の低抵抗チップ抵抗器を効率的に製造することが可能になった。 In the present invention, a tin plating film was formed on a strip-shaped multilayer plate body formed by brazing a copper plate on one or both sides of a resistance metal plate and forming a tin plating film over the entire surface of the copper plate. By cutting the center of the short side from the single side or both sides with a predetermined width in the long side direction, the tin plating film, the copper plate, the brazing material, and the diffusion layer of the resistance metal plate and the brazing material are integrated into the single side or both sides. After forming a recess and forming a protective film on the bottom surface of the recess, the strip-shaped multilayer plate is cut to a desired width to manufacture a chip resistor. It is possible to efficiently manufacture a low-resistance chip resistor of less than 1 mΩ having high reliability without having to perform a scraping process on the device.
本発明では、抵抗金属板として、銅を９０重量％以上含有する合金を使用するため、この片面又は両面にロウ付けされる銅板との間で、膨張係数にそれほど相違が生じず、ロウ付け工程における高温処理後にも反りが発生せず、反りによる加工精度の低下を防止することができる。 In the present invention, since an alloy containing 90% by weight or more of copper is used as the resistance metal plate, the expansion coefficient is not so different from the copper plate brazed to one or both sides, and the brazing process. Warpage does not occur even after high-temperature processing in, and processing accuracy can be prevented from being lowered due to warpage.
本発明では、銅−銀二元合金からなるロウ材により、抵抗金属板と銅板とをロウ付けするので、抵抗金属板と銅板とをオーミック接触(オーム性接触又はOhmic contact)することが可能になる。 In the present invention, the resistance metal plate and the copper plate are brazed by the brazing material made of a copper-silver binary alloy, so that the resistance metal plate and the copper plate can be in ohmic contact (ohmic contact). .
本発明では、ポリアミドイミド樹脂を含有する材料により、凹部の底面に保護膜を形成するので、抵抗金属板との耐環境性を考慮した特性が保証できる。 In the present invention, the protective film is formed on the bottom surface of the recess by the material containing the polyamide-imide resin, so that the characteristics considering the environmental resistance with the resistance metal plate can be ensured.
以下、図面を参照して本発明の実施の形態について説明するが、本発明はこれに限定されるものではない。
図１は一実施形態の抵抗金属板低抵抗チップ抵抗器１０の斜視図であり、図２は異なる実施形態の抵抗金属板低抵抗チップ抵抗器３０の斜視図である。
図１の抵抗金属板低抵抗チップ抵抗器１０は、抵抗金属板１１の一方の面にロウ材１２により電極としての銅板１３をロウ付けし、銅板１３の上にスズめっき膜１４を形成し、ほぼ中央部からスズめっき膜１４、銅板１３、ロウ材１２、及びロウ材１２と抵抗金属板１１との拡散層を除去して凹部１５を形成し、この凹部１５の底面に保護膜１６を形成したものである。
Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.
FIG. 1 is a perspective view of a resistance metal plate low resistance chip resistor 10 according to one embodiment, and FIG. 2 is a perspective view of a resistance metal plate low resistance chip resistor 30 according to another embodiment.
A resistance metal plate low resistance chip resistor 10 in FIG. 1 is formed by brazing a copper plate 13 as an electrode to one surface of a resistance metal plate 11 with a brazing material 12 and forming a tin plating film 14 on the copper plate 13. The tin plating film 14, the copper plate 13, the brazing material 12, and the diffusion layer of the brazing material 12 and the resistance metal plate 11 are removed from the substantially central portion to form the concave portion 15, and the protective film 16 is formed on the bottom surface of the concave portion 15. It is a thing.
また図２の抵抗金属板低抵抗チップ抵抗器３０は、抵抗金属板３１の両面にロウ材３２，３２により銅板３３，３３をロウ付けし、両方の銅板３３，３３の上にスズめっき膜３４，３４を形成し、両面のほぼ中央部からスズめっき膜３４，３４、銅板３３，３３、ロウ材３２，３２、及びロウ材３２，３２と抵抗金属板３１との少なくとも拡散層を除去して凹部３５，３５を両面に形成し、両方の凹部３５，３５の底面に保護膜３６，３６が形成されたものである。 Further, in the resistance metal plate low resistance chip resistor 30 of FIG. 2, copper plates 33 and 33 are brazed to both surfaces of the resistance metal plate 31 with brazing materials 32 and 32, and a tin plating film 34 is placed on both the copper plates 33 and 33. , 34, and the tin plating films 34, 34, the copper plates 33, 33, the brazing materials 32, 32, and at least the diffusion layer of the brazing materials 32, 32 and the resistance metal plate 31 are removed from the substantially central portions of both surfaces. Recesses 35 and 35 are formed on both surfaces, and protective films 36 and 36 are formed on the bottom surfaces of both recesses 35 and 35.
ここで、前記抵抗金属板１１，３１は、銅を９０重量％以上含有する合金の板体を使用可能であり、このような合金としては、例えば、ＣｕとＮｉとを含有する合金、ＣｕとＭｎとＳｎとを含有する合金、ＣｕとＭｎとＳｎとＧｅとを含有する合金などを挙げることができる。また前記ロウ材１２，３２は、銅−銀二元の共晶合金からなるロウ材、例えば、ＪＩＳ.Ｚ.３２６１においてＢＡｇ−８と規定された銀ロウを使用することができる。ＢＡｇ−８はＡｇを７２％、Ｃｕを２８％含有し、溶融温度は固相線及び液相線がともに７８０℃の銀ロウである。前記保護膜１６，３６は、シリコーンカップリング剤又はシリカを含有する無機−有機複合材料であるポリアミドイミドから形成することができる。 Here, the resistance metal plates 11 and 31 can use an alloy plate containing 90% by weight or more of copper. Examples of such an alloy include an alloy containing Cu and Ni, Cu and An alloy containing Mn and Sn, an alloy containing Cu, Mn, Sn, and Ge can be given. As the brazing materials 12 and 32, a brazing material made of a copper-silver binary eutectic alloy, for example, a silver brazing material defined as BAg-8 in JIS Z 3261 can be used. BAg-8 contains 72% Ag and 28% Cu, and the melting temperature is a silver wax whose solidus and liquidus are both 780 ° C. The protective films 16 and 36 can be formed from a polyamideimide that is an inorganic-organic composite material containing a silicone coupling agent or silica.
次に、図１の抵抗金属板低抵抗チップ抵抗器１０の製造方法について、図１及び図３を参照して説明する。
例えば、長さ１３ｍｍ、幅６．３ｍｍの抵抗金属板低抵抗チップ抵抗器１０を製造する場合には、最初に、銅を９０重量％以上含有する合金板体からなる抵抗金属板１１の片面に、銅−銀二元の共晶合金からなるロウ材１２を用いて、銅板１３を水素雰囲気炉内でピーク温度８５０℃でロウ付けする。
ここで、抵抗金属板１１は例えば厚さ０．５ｍｍの合金板体を使用し、ロウ材１２は例えば厚さ０．０５ｍｍのＢＡｇ−８を使用し、銅板１３は例えば厚さ０．２ｍｍの無酸素銅板を使用し、これらは全て縦５００ｍｍ程度、横２００ｍｍ程度のものを使用する。
抵抗金属板１１として銅を９０重量％以上含有する合金板体を使用し、電極としての銅板１３に無酸素銅板を使用することにより、これら抵抗金属板１１と銅板１３は、膨張係数がほぼ同じになり、ロウ付けしたときの反りの発生を防止できる。逆に、銅含有率が９０％未満の合金を使用した場合、例えば、マンガニン（Ｃｕ８５％、Ｍｎ１２％、Ｎｉ２％、Ｆｅ１％）の合金板に電極としての銅板をロウ付けした場合には、反りが大きくなってしまうため、本発明では、銅含有率が９０％以上の合金板体を使用することが好ましい。
また銅−銀二元の共晶合金からなるロウ材１２を使用したため、抵抗金属板１１と銅板１３とはオーミック接触し、電極としての銅板１３付近の電気抵抗を極めて低く抑えることが可能になる。
Next, a manufacturing method of the resistance metal plate low resistance chip resistor 10 of FIG. 1 will be described with reference to FIGS.
For example, in the case of manufacturing a resistance metal plate low resistance chip resistor 10 having a length of 13 mm and a width of 6.3 mm, first, the resistance metal plate 11 made of an alloy plate containing 90% by weight or more of copper on The copper plate 13 is brazed at a peak temperature of 850 ° C. in a hydrogen atmosphere furnace using a brazing material 12 made of a copper-silver binary eutectic alloy.
Here, the resistance metal plate 11 uses an alloy plate having a thickness of 0.5 mm, for example, the brazing material 12 uses BAg-8 having a thickness of 0.05 mm, and the copper plate 13 has a thickness of 0.2 mm, for example. An oxygen-free copper plate is used, and these are all about 500 mm long and about 200 mm wide.
By using an alloy plate containing 90% by weight or more of copper as the resistance metal plate 11 and using an oxygen-free copper plate as the copper plate 13 as an electrode, the resistance metal plate 11 and the copper plate 13 have substantially the same expansion coefficient. Therefore, it is possible to prevent warping when brazing. Conversely, when an alloy having a copper content of less than 90% is used, for example, when a copper plate as an electrode is brazed to an alloy plate of manganin (Cu 85%, Mn 12%, Ni 2%, Fe 1%), the warp In the present invention, it is preferable to use an alloy plate having a copper content of 90% or more.
Further, since the brazing material 12 made of a copper-silver binary eutectic alloy is used, the resistance metal plate 11 and the copper plate 13 are in ohmic contact, and the electrical resistance in the vicinity of the copper plate 13 as an electrode can be suppressed to an extremely low level.
抵抗金属板１１の片面に銅板１３をロウ付けした後、水酸化ナトリウム、ケイ酸ナトリウムを主成分とする溶液によりアルカリ脱脂を行って金属表面に付着した油脂分を除去し、次いで、希硫酸の水溶液中に浸漬して酸化膜を除去する。酸化膜の除去後、銅板１３の全面に電気めっき法により厚さほぼ５μｍのスズめっき膜１４を形成する。
以上のような工程を実施することにより、図３（ａ）に示したように、抵抗金属板１１の片面にロウ材１２で銅板１３が接合され、この銅板１３の上にスズめっき膜１４が形成された集合複層板体２０が形成される。集合複層板体２０は、例えば、縦５００ｍｍ程度、横２００ｍｍ程度、厚さ１．０ｍｍ程度に形成される。
After the copper plate 13 is brazed to one side of the resistance metal plate 11, alkali degreasing is performed with a solution mainly composed of sodium hydroxide and sodium silicate to remove oil and fat adhering to the metal surface, The oxide film is removed by dipping in an aqueous solution. After removing the oxide film, a tin plating film 14 having a thickness of about 5 μm is formed on the entire surface of the copper plate 13 by electroplating.
By performing the steps as described above, as shown in FIG. 3A, the copper plate 13 is bonded to one side of the resistance metal plate 11 with the brazing material 12, and the tin plating film 14 is formed on the copper plate 13. The formed aggregate multilayer plate 20 is formed. The assembled multilayer plate 20 is formed to have a length of about 500 mm, a width of about 200 mm, and a thickness of about 1.0 mm, for example.
次に、集合複層板体２０を図３（ａ）の点線２１で示したように所定の幅Ｗ１で短冊状に切断して短冊状複層板体２２を形成する。この短冊状複層板体２２の切断幅Ｗ１（短辺の長さＷ１）は、製造しようとする抵抗金属板低抵抗チップ抵抗器１０の長さとなる部位であるため、ここでは１３ｍｍに設定され、また長辺の長さは例えば５００ｍｍ程度になる。 Next, the aggregated multilayer plate 20 is cut into a strip shape with a predetermined width W1 as shown by a dotted line 21 in FIG. 3A to form a strip-shaped multilayer plate 22. The cutting width W1 (short side length W1) of the strip-shaped multilayer plate body 22 is a portion that becomes the length of the resistance metal plate low resistance chip resistor 10 to be manufactured, and is set to 13 mm here. The length of the long side is about 500 mm, for example.
次に、短冊状複層板体２２の短辺方向のほぼ中央を図３（ｃ）に示したように幅Ｗ２、例えば幅４ｍｍで長辺方向に削る。この削り加工では、スズめっき膜１４が形成された片面から、スズめっき膜１４、銅板１３、ロウ材１２、及びロウ材１２と抵抗金属板１１との拡散層までを除去して凹部１５を形成する。
なお、ロウ材１２と抵抗金属板１１との拡散層２３は、図３（ｄ）に示したように、スズめっき膜１４の表面からほぼｄ１＝０．３ｍｍ程度の深さまで削り落し、凹部１５における抵抗金属板１１をほぼｄ２＝０．４６ｍｍ程度の厚さにし、拡散層２３を確実に除去する。
Next, the center in the short side direction of the strip-shaped multilayer plate 22 is cut in the long side direction with a width W2, for example, 4 mm, as shown in FIG. In this shaving process, the recess 15 is formed by removing the tin plating film 14, the copper plate 13, the brazing material 12, and the diffusion layer of the brazing material 12 and the resistance metal plate 11 from one surface on which the tin plating film 14 is formed. To do.
The diffusion layer 23 of the brazing material 12 and the resistance metal plate 11 is scraped off from the surface of the tin plating film 14 to a depth of about d1 = 0.3 mm as shown in FIG. The resistance metal plate 11 is made to have a thickness of about d2 = 0.46 mm, and the diffusion layer 23 is reliably removed.
図３（ｃ）に示したように、短冊状複層板体２２の片面、短辺方向のほぼ中央に長辺方向に延長する凹部１５を形成したら、この凹部１５の底面、すなわち、抵抗金属板１１の露出している面に、図３（ｅ）に示したように保護膜１６を形成する。保護膜１６はシリコーンカップリング剤又はシリカを含有する無機−有機複合材料であるポリアミドイミドにより形成する。保護膜１６を形成した後、短冊状複層板体２２を図３（ｅ）の二点鎖線２４で示したように所定長さ（ここでは６．３ｍｍ）で切断すると、抵抗金属板低抵抗チップ抵抗器１０が完成する。
以上のような工程を実施することにより、抵抗値が１．０ｍΩ未満で高い信頼性を有する抵抗金属板低抵抗チップ抵抗器１０の製造が可能になる。
As shown in FIG. 3 (c), when the concave portion 15 extending in the long side direction is formed at one side of the strip-shaped multilayer plate body 22, substantially in the center of the short side direction, the bottom surface of the concave portion 15, that is, the resistance metal A protective film 16 is formed on the exposed surface of the plate 11 as shown in FIG. The protective film 16 is formed of polyamideimide which is an inorganic-organic composite material containing a silicone coupling agent or silica. After the protective film 16 is formed, the strip-shaped multilayer plate 22 is cut at a predetermined length (here, 6.3 mm) as shown by a two-dot chain line 24 in FIG. The chip resistor 10 is completed.
By carrying out the steps as described above, it is possible to manufacture the resistance metal plate low resistance chip resistor 10 having a resistance value of less than 1.0 mΩ and high reliability.
次に、図２及び図４を参照して抵抗金属板低抵抗チップ抵抗器３０の製造方法について説明する。
例えば、長さ１３ｍｍ、幅６．３ｍｍの抵抗金属板低抵抗チップ抵抗器３０を製造する場合には、最初に、銅を９０重量％以上含有する合金板体からなる抵抗金属板３１の両面に、銅−銀二元の共晶合金からなるロウ材３２，３２により、銅板３３，３３を水素雰囲気炉内でピーク温度８５０℃でロウ付けする。
ここで、抵抗金属板３１は例えば厚さ０．５ｍｍの合金板体を使用し、ロウ材３２は例えば厚さ０．０５ｍｍのＢＡｇ−８を使用し、銅板３３は例えば厚さ０．２ｍｍの無酸素銅板を使用し、これらは全て縦５００ｍｍ程度、横２００ｍｍ程度のものを使用することができる。
Next, a manufacturing method of the resistance metal plate low resistance chip resistor 30 will be described with reference to FIGS.
For example, in the case of manufacturing a resistance metal plate low resistance chip resistor 30 having a length of 13 mm and a width of 6.3 mm, first, the both sides of the resistance metal plate 31 made of an alloy plate containing 90% by weight or more of copper The copper plates 33 and 33 are brazed at a peak temperature of 850 ° C. in a hydrogen atmosphere furnace with the brazing materials 32 and 32 made of a copper-silver binary eutectic alloy.
Here, the resistance metal plate 31 uses, for example, a 0.5 mm thick alloy plate, the brazing material 32 uses, for example, 0.05 mm thick BAg-8, and the copper plate 33, for example, 0.2 mm thick. An oxygen-free copper plate is used, and all of them can be about 500 mm in length and about 200 mm in width.
次に、水酸化ナトリウム、ケイ酸ナトリウムを主成分とする溶液によりアルカリ脱脂を行って金属表面に付着した油脂分を除去し、希硫酸の水溶液中に浸漬して酸化膜を除去する。この後に、抵抗金属板３１の両面に固着された銅板３３，３３の全面に、電気めっき法により厚さほぼ５μｍのスズめっき膜３４,３４をそれぞれ形成する。
以上のような工程を経て、図４（ａ）に示しように、抵抗金属板３１の両面にロウ材３２，３２で銅板３３，３３が接合され、これら銅板３３，３３の上にそれぞれスズめっき膜３４,３４が形成された集合複層板体４０が形成される。この集合複層板体４０は、例えば、縦５００ｍｍ程度、横２００ｍｍ程度、厚さ１．０ｍｍ程度に形成される。
Next, alkali degreasing is performed with a solution containing sodium hydroxide and sodium silicate as main components to remove oil and fat adhering to the metal surface, and the oxide film is removed by dipping in an aqueous solution of dilute sulfuric acid. Thereafter, tin plating films 34 and 34 having a thickness of about 5 μm are formed on the entire surfaces of the copper plates 33 and 33 fixed to both surfaces of the resistance metal plate 31 by electroplating.
4A, the copper plates 33 and 33 are bonded to both surfaces of the resistance metal plate 31 with brazing materials 32 and 32, and tin plating is performed on the copper plates 33 and 33, respectively. The aggregate multilayer plate 40 in which the films 34 and 34 are formed is formed. For example, the aggregate multilayer plate 40 is formed to have a length of about 500 mm, a width of about 200 mm, and a thickness of about 1.0 mm.
次に、集合複層板体４０を図４（ａ）の点線４１で示したように所定の幅Ｗ３で短冊状に切断して短冊状複層板体４２を形成する。この短冊状複層板体４２の切断幅Ｗ３（短辺の長さＷ３）は、製造しようとする抵抗金属板低抵抗チップ抵抗器３０の長さとなる部位であるため、ここでは１３ｍｍに設定され、また長辺の長さは例えば５００ｍｍ程度になる。 Next, as shown by a dotted line 41 in FIG. 4A, the aggregate multilayer plate 40 is cut into a strip shape with a predetermined width W3 to form a strip multilayer plate 42. The cutting width W3 (short side length W3) of the strip-shaped multilayer plate body 42 is a portion that becomes the length of the resistance metal plate low resistance chip resistor 30 to be manufactured, and is set to 13 mm here. The length of the long side is about 500 mm, for example.
次に、短冊状複層板体４２の両面から短辺方向のほぼ中央を、図４（ｃ）に示したように幅Ｗ４、例えば幅４ｍｍで長辺方向にそれぞれ削る。この短冊状複層板体４２の両面の削り加工では、スズめっき膜３４，３４が形成された両面から、スズめっき膜３４，３４、銅板３３，３３、ロウ材３２，３２、及びロウ材３２，３２と抵抗金属板３１との拡散層４４までを除去して凹部３５，３５を形成する。
なお、ロウ材３２と抵抗金属板３１との拡散層４３は、図４（ｄ）に示したように、スズめっき膜３４，３４の両面からほぼｄ３＝０．３ｍｍ程度の深さまで削り落とし、凹部３５，３５における抵抗金属板３１をほぼｄ４＝０．４ｍｍ程度の厚さにし、拡散層４４を確実に除去する。
Next, the center of the short side direction from both sides of the strip-shaped multilayer plate body 42 is cut in the long side direction with a width W4, for example, a width of 4 mm, as shown in FIG. In the cutting of both surfaces of the strip-shaped multilayer plate body 42, the tin plating films 34 and 34, the copper plates 33 and 33, the brazing materials 32 and 32, and the brazing material 32 are formed from both surfaces on which the tin plating films 34 and 34 are formed. , 32 and the resistive metal plate 31 up to the diffusion layer 44 are removed to form the recesses 35 and 35.
The diffusion layer 43 of the brazing material 32 and the resistance metal plate 31 is scraped off from both surfaces of the tin plating films 34 and 34 to a depth of about d3 = 0.3 mm, as shown in FIG. The resistance metal plate 31 in the recesses 35 is set to a thickness of about d4 = 0.4 mm so that the diffusion layer 44 is reliably removed.
図４（ｃ）に示したように、短冊状複層板体４２の両面の短辺方向のほぼ中央に長辺方向に延長する凹部３５，３５を形成したら、凹部３５，３５のそれぞれ底面、すなわち、抵抗金属板３１の露出している両面に、ポリアミドイミド等により保護膜３６，３６を形成する。保護膜３６を形成した後、短冊状複層板体４２を図４（ｅ）の二点鎖線４５で示したように所定長さ（ここでは６．３ｍｍ）で切断すると、抵抗金属板低抵抗チップ抵抗器３０が完成する。以上のような工程により、抵抗値が１．０ｍΩ未満で高い信頼性を有する抵抗金属板低抵抗チップ抵抗器３０の製造が可能になる。 As shown in FIG. 4 (c), when the concave portions 35, 35 extending in the long side direction are formed at substantially the center in the short side direction on both surfaces of the strip-shaped multilayer plate body 42, the bottom surfaces of the concave portions 35, 35, respectively, That is, the protective films 36 and 36 are formed on both exposed surfaces of the resistive metal plate 31 with polyamideimide or the like. After forming the protective film 36, the strip-shaped multilayer plate 42 is cut at a predetermined length (here, 6.3 mm) as shown by a two-dot chain line 45 in FIG. The chip resistor 30 is completed. By the process as described above, it is possible to manufacture the resistance metal plate low resistance chip resistor 30 having a resistance value of less than 1.0 mΩ and high reliability.
次に、図５は、本発明による抵抗金属板低抵抗チップ抵抗器１０と比較例との各温度における抵抗温度係数（ＴＣＲ）のグラフであり、図５の凡例に併記した抵抗値は室温２５℃における抵抗値である。
ここで、サンプルＡは、ロウ材としてＢＣｕＰ−３を使用し、ｄ２＝０．３９ｍｍの厚さに形成された抵抗金属板低抵抗チップ抵抗器であり、室温２５℃において０．６１ｍΩを示した。ＢＣｕＰ−３はＪＩＳ．Ｚ．３２６４に規定されたロウ材であり、りん（Ｐ）を６％、銀（Ａｇ）を５％、銅（Ｃｕ）を８９％含有する。
サンプルＢは、ロウ材としてＢＡｇ−８を使用し、ｄ２＝０．４１ｍｍの厚さに形成された抵抗金属板低抵抗チップ抵抗器であり、室温２５℃において０．５６ｍΩを示した。ＢＡｇ−８はＪＩＳ．Ｚ．３２６１に規定されたロウ材であり、銀（Ａｇ）を７２％、銅（Ｃｕ）を２８％含有する。
サンプルＣは、ロウ材としてＰ−Ｃｕ系のものを使用し、ｄ２＝０．３９ｍｍの厚さに形成された抵抗金属板低抵抗チップ抵抗器であり、室温２５℃において０．６８ｍΩを示した。Ｐ−Ｃｕ系のロウ材は、主にりん（Ｐ）及び銅（Ｃｕ）のみを含有するものである。
サンプルＡ，Ｃはｄ２＝０．３９ｍｍ、サンプルＢはｄ２＝０．４１ｍｍであり、これらの厚さはほぼ同じであるため、これらサンプルＡ，Ｂ，ＣのＴＣＲ及び抵抗値をそのまま比較すると、ロウ材として銅−銀二元合金からなるＢＡｇ−８を使用したサンプルＢの抵抗値が室温２５℃では最も低く、ＴＣＲも概ね小さくなることが分かった。
Next, FIG. 5 is a graph of resistance temperature coefficient (TCR) at each temperature of the resistance metal plate low resistance chip resistor 10 according to the present invention and the comparative example, and the resistance value shown in the legend of FIG. It is a resistance value at ° C.
Here, Sample A is a resistive metal plate low resistance chip resistor using BCuP-3 as a brazing material and formed to a thickness of d2 = 0.39 mm, and showed 0.61 mΩ at room temperature of 25 ° C. . BCuP-3 is JIS. Z. It is a brazing material specified in 3264 and contains 6% phosphorus (P), 5% silver (Ag), and 89% copper (Cu).
Sample B was a resistive metal plate low resistance chip resistor using BAg-8 as a brazing material and formed to a thickness of d2 = 0.41 mm, and showed 0.56 mΩ at room temperature of 25 ° C. BAg-8 is JIS. Z. It is a brazing material specified in 3261, and contains 72% of silver (Ag) and 28% of copper (Cu).
Sample C is a resistance metal plate low resistance chip resistor using a P-Cu type brazing material and having a thickness of d2 = 0.39 mm, and showed 0.68 mΩ at room temperature of 25 ° C. . The P-Cu brazing material mainly contains only phosphorus (P) and copper (Cu).
Samples A and C have d2 = 0.39 mm, sample B has d2 = 0.41 mm, and these thicknesses are almost the same. Therefore, when the TCR and resistance values of these samples A, B, and C are compared as they are, It was found that the resistance value of Sample B using BAg-8 made of a copper-silver binary alloy as the brazing material was the lowest at room temperature of 25 ° C., and the TCR was generally small.
１０ 抵抗金属板低抵抗チップ抵抗器
１１ 抵抗金属板
１２ ロウ材
１３ 銅板
１４ スズめっき膜
１５ 凹部
１６ 保護膜
２０ 集合複層板体
２２ 短冊状複層板体
２３ 拡散層
３０ 抵抗金属板低抵抗チップ抵抗器
３１ 抵抗金属板
３２ ロウ材
３３ 銅板
３４ スズめっき膜
３５ 凹部
３６ 保護膜
４０ 集合複層板体
４２ 短冊状複層板体
４３ 拡散層
DESCRIPTION OF SYMBOLS 10 Resistance metal plate Low resistance chip resistor 11 Resistance metal plate 12 Brazing material 13 Copper plate 14 Tin plating film 15 Recess 16 Protective film 20 Aggregate multilayer board 22 Strip multilayer board 23 Diffusion layer 30 Resistance metal board Low resistance chip Resistor 31 Resistance metal plate 32 Brazing material 33 Copper plate 34 Tin plating film 35 Recess 36 Protection film 40 Aggregate multilayer plate 42 Strip-shaped multilayer plate 43 Diffusion layer
Claims (5)
当該集合複層板体を所望の幅で短冊状に切断して短冊状複層板体を形成し、
当該短冊状複層板体のスズめっき膜が形成された一方の面又は両面から、短辺方向のほぼ中央を所定幅で長辺方向に切削し、スズめっき膜、銅板、ロウ材、及び抵抗金属板とロウ材との少なくとも拡散層を除去して凹部を一方の面又は両面に形成し、当該凹部の底面に保護膜を形成した後に、前記短冊状複層板体を所望の幅で切断してチップ状の抵抗器を製造することを特徴とする抵抗金属板低抵抗チップ抵抗器の製造方法。 After brazing the copper plate on one or both sides of the resistance metal plate, removing the oxide film from the surface, forming a multilayered plate body by forming a tin plating film over the entire surface of the copper plate,
The aggregated multilayer plate is cut into a strip with a desired width to form a strip-shaped multilayered plate,
From one or both surfaces of the strip-shaped multilayer plate body on which the tin plating film is formed, the center in the short side direction is cut in the long side direction with a predetermined width, and the tin plating film, the copper plate, the brazing material, and the resistance At least the diffusion layer of the metal plate and the brazing material is removed to form a recess on one or both sides, and after forming a protective film on the bottom surface of the recess, the strip-shaped multilayer plate is cut to a desired width A chip-shaped resistor is manufactured, and a method for manufacturing a low resistance chip resistor of a resistance metal plate is provided.
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| JP2008036164A JP4537465B2 (en) | 2008-02-18 | 2008-02-18 | Resistance metal plate low resistance chip resistor manufacturing method |
| KR1020090009669A KR101064534B1 (en) | 2008-02-18 | 2009-02-06 | Low resistance chip resistor of resistance metal plate and its manufacturing method |
| TW098104498A TWI395233B (en) | 2008-02-18 | 2009-02-12 | Resistive metal plate low resistance chip resistor and its manufacturing method |
| CN200910006438XA CN101515497B (en) | 2008-02-18 | 2009-02-18 | Resistance metallic plate low-resistance value sheet shape resistor and manufacturing method thereof |
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| JP2013055130A (en) * | 2011-09-01 | 2013-03-21 | Rohm Co Ltd | Jumper resistor |
| WO2014155841A1 (en) * | 2013-03-28 | 2014-10-02 | コーア株式会社 | Method for manufacturing resistor, and resistor |
| US10418157B2 (en) | 2015-10-30 | 2019-09-17 | Vishay Dale Electronics, Llc | Surface mount resistors and methods of manufacturing same |
| US10438729B2 (en) | 2017-11-10 | 2019-10-08 | Vishay Dale Electronics, Llc | Resistor with upper surface heat dissipation |
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| CN104376938B (en) * | 2013-08-13 | 2018-03-13 | 乾坤科技股份有限公司 | Resistance device |
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| US10438729B2 (en) | 2017-11-10 | 2019-10-08 | Vishay Dale Electronics, Llc | Resistor with upper surface heat dissipation |
Also Published As
| Publication number | Publication date |
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| TWI395233B (en) | 2013-05-01 |
| KR20090089256A (en) | 2009-08-21 |
| TW200949866A (en) | 2009-12-01 |
| KR101064534B1 (en) | 2011-09-14 |
| CN101515497B (en) | 2011-08-03 |
| JP4537465B2 (en) | 2010-09-01 |
| CN101515497A (en) | 2009-08-26 |
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