JP2009182272A - 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器 - Google Patents

素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器 Download PDF

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JP2009182272A
JP2009182272A JP2008022011A JP2008022011A JP2009182272A JP 2009182272 A JP2009182272 A JP 2009182272A JP 2008022011 A JP2008022011 A JP 2008022011A JP 2008022011 A JP2008022011 A JP 2008022011A JP 2009182272 A JP2009182272 A JP 2009182272A
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electrode
protruding electrode
insulating resin
resin layer
layer
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JP2008022011A
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Japanese (ja)
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JP2009182272A5 (enExample
Inventor
Mayumi Nakazato
真弓 中里
Katsumi Ito
克実 伊藤
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Priority to JP2008022011A priority Critical patent/JP2009182272A/ja
Priority to CNA2009101307726A priority patent/CN101510539A/zh
Priority to US12/363,983 priority patent/US8283568B2/en
Publication of JP2009182272A publication Critical patent/JP2009182272A/ja
Publication of JP2009182272A5 publication Critical patent/JP2009182272A5/ja
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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  • Condensed Matter Physics & Semiconductors (AREA)
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JP2008022011A 2008-01-31 2008-01-31 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器 Pending JP2009182272A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008022011A JP2009182272A (ja) 2008-01-31 2008-01-31 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器
CNA2009101307726A CN101510539A (zh) 2008-01-31 2009-02-01 元件搭载用基板、半导体组件及其制造方法及便携式设备
US12/363,983 US8283568B2 (en) 2008-01-31 2009-02-02 Device mounting board, and semiconductor module and manufacturing method therefor

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Application Number Priority Date Filing Date Title
JP2008022011A JP2009182272A (ja) 2008-01-31 2008-01-31 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器

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JP2011285081A Division JP5306443B2 (ja) 2011-12-27 2011-12-27 素子搭載用基板、素子搭載用基板の製造方法、半導体モジュールおよび半導体モジュールの製造方法

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JP2009182272A true JP2009182272A (ja) 2009-08-13
JP2009182272A5 JP2009182272A5 (enExample) 2011-03-10

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US (1) US8283568B2 (enExample)
JP (1) JP2009182272A (enExample)
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011052744A1 (ja) * 2009-10-30 2011-05-05 三洋電機株式会社 素子搭載用基板およびその製造方法、半導体モジュール、ならびに携帯機器
JP2012064981A (ja) * 2011-12-27 2012-03-29 Sanyo Electric Co Ltd 素子搭載用基板、素子搭載用基板の製造方法、半導体モジュールおよび半導体モジュールの製造方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM362572U (en) * 2009-04-13 2009-08-01 Phytrex Technology Corp Signal convertor
KR101088792B1 (ko) * 2009-11-30 2011-12-01 엘지이노텍 주식회사 인쇄회로기판 및 그 제조방법
JP5624699B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
TWM470379U (zh) * 2013-09-05 2014-01-11 思鷺科技股份有限公司 陶瓷電路板及具有該陶瓷電路板的led封裝模組
TWI550801B (zh) * 2013-11-13 2016-09-21 南茂科技股份有限公司 封裝結構及其製造方法
JP2016207893A (ja) * 2015-04-24 2016-12-08 イビデン株式会社 プリント配線板およびその製造方法
US12322719B2 (en) 2022-03-22 2025-06-03 Nxp Usa, Inc. Semiconductor device structure and method therefor
US20240014152A1 (en) * 2022-07-07 2024-01-11 Nxp B.V. Semiconductor device with under-bump metallization and method therefor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141629A (ja) * 2000-11-01 2002-05-17 North:Kk 配線回路用部材とその製造方法と多層配線回路基板と半導体集積回路装置
JP2006310530A (ja) * 2005-04-28 2006-11-09 Sanyo Electric Co Ltd 回路装置およびその製造方法
WO2007063954A1 (ja) * 2005-11-30 2007-06-07 Sanyo Electric Co., Ltd. 回路装置および回路装置の製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3050807B2 (ja) * 1996-06-19 2000-06-12 イビデン株式会社 多層プリント配線板
WO1998043289A1 (fr) 1997-03-21 1998-10-01 Seiko Epson Corporation Composant a semi-conducteur, bande de support de couche et leur procede de fabrication
EP1505859B1 (en) * 1998-02-26 2007-08-15 Ibiden Co., Ltd. Multilayer printed wiring board having filled via-holes
JP2004193297A (ja) 2002-12-11 2004-07-08 Dainippon Printing Co Ltd ウェハレベルパッケージおよびその製造方法
JP2007258207A (ja) 2006-03-20 2007-10-04 Three M Innovative Properties Co バンプ付きチップもしくはパッケージの実装方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141629A (ja) * 2000-11-01 2002-05-17 North:Kk 配線回路用部材とその製造方法と多層配線回路基板と半導体集積回路装置
JP2006310530A (ja) * 2005-04-28 2006-11-09 Sanyo Electric Co Ltd 回路装置およびその製造方法
WO2007063954A1 (ja) * 2005-11-30 2007-06-07 Sanyo Electric Co., Ltd. 回路装置および回路装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011052744A1 (ja) * 2009-10-30 2011-05-05 三洋電機株式会社 素子搭載用基板およびその製造方法、半導体モジュール、ならびに携帯機器
JP2012064981A (ja) * 2011-12-27 2012-03-29 Sanyo Electric Co Ltd 素子搭載用基板、素子搭載用基板の製造方法、半導体モジュールおよび半導体モジュールの製造方法

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