JP2009158743A5 - - Google Patents
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- Publication number
- JP2009158743A5 JP2009158743A5 JP2007335690A JP2007335690A JP2009158743A5 JP 2009158743 A5 JP2009158743 A5 JP 2009158743A5 JP 2007335690 A JP2007335690 A JP 2007335690A JP 2007335690 A JP2007335690 A JP 2007335690A JP 2009158743 A5 JP2009158743 A5 JP 2009158743A5
- Authority
- JP
- Japan
- Prior art keywords
- forming
- semiconductor device
- layer
- hole
- inorganic insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 24
- 239000000758 substrate Substances 0.000 claims 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 4
- 238000004519 manufacturing process Methods 0.000 claims 4
- 229910052681 coesite Inorganic materials 0.000 claims 2
- 229910052906 cristobalite Inorganic materials 0.000 claims 2
- 239000000377 silicon dioxide Substances 0.000 claims 2
- 235000012239 silicon dioxide Nutrition 0.000 claims 2
- 229910052682 stishovite Inorganic materials 0.000 claims 2
- 229910052905 tridymite Inorganic materials 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007335690A JP5592053B2 (ja) | 2007-12-27 | 2007-12-27 | 半導体装置及びその製造方法 |
| US12/342,755 US8035192B2 (en) | 2007-12-27 | 2008-12-23 | Semiconductor device and manufacturing method thereof |
| TW097150906A TW200931623A (en) | 2007-12-27 | 2008-12-26 | Semiconductor device and manufacturing method thereof |
| KR1020080134561A KR20090071482A (ko) | 2007-12-27 | 2008-12-26 | 반도체 장치 및 그 제조 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007335690A JP5592053B2 (ja) | 2007-12-27 | 2007-12-27 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009158743A JP2009158743A (ja) | 2009-07-16 |
| JP2009158743A5 true JP2009158743A5 (enExample) | 2011-01-06 |
| JP5592053B2 JP5592053B2 (ja) | 2014-09-17 |
Family
ID=40797122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007335690A Active JP5592053B2 (ja) | 2007-12-27 | 2007-12-27 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8035192B2 (enExample) |
| JP (1) | JP5592053B2 (enExample) |
| KR (1) | KR20090071482A (enExample) |
| TW (1) | TW200931623A (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8557700B2 (en) * | 2008-05-09 | 2013-10-15 | Invensas Corporation | Method for manufacturing a chip-size double side connection package |
| US8896136B2 (en) * | 2010-06-30 | 2014-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment mark and method of formation |
| US20120306094A1 (en) * | 2011-06-06 | 2012-12-06 | Shahrazie Zainal Abu Bakar | Signal routing using through-substrate vias |
| EP2648218B1 (en) | 2012-04-05 | 2015-10-14 | Nxp B.V. | Integrated circuit and method of manufacturing the same |
| US9166284B2 (en) | 2012-12-20 | 2015-10-20 | Intel Corporation | Package structures including discrete antennas assembled on a device |
| TWI544593B (zh) * | 2013-09-09 | 2016-08-01 | 矽品精密工業股份有限公司 | 半導體裝置及其製法 |
| JP6869649B2 (ja) | 2016-06-13 | 2021-05-12 | ラピスセミコンダクタ株式会社 | 半導体装置、通信システムおよび半導体装置の製造方法。 |
| JP6483927B2 (ja) * | 2016-10-21 | 2019-03-13 | 京セラ株式会社 | タグ用基板、ｒｆｉｄタグおよびｒｆｉｄシステム |
| KR102334710B1 (ko) | 2017-03-28 | 2021-12-02 | 삼성전기주식회사 | 전자부품 내장 기판 |
| US10181447B2 (en) | 2017-04-21 | 2019-01-15 | Invensas Corporation | 3D-interconnect |
| CN109411535B (zh) * | 2017-08-15 | 2022-03-18 | 台达电子工业股份有限公司 | 半导体装置 |
| KR102019354B1 (ko) * | 2017-11-03 | 2019-09-09 | 삼성전자주식회사 | 안테나 모듈 |
| KR102684976B1 (ko) | 2019-02-15 | 2024-07-16 | 삼성전자주식회사 | 반도체 패키지 |
| US12040284B2 (en) | 2021-11-12 | 2024-07-16 | Invensas Llc | 3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna |
| WO2023194882A1 (en) * | 2022-04-04 | 2023-10-12 | Mahdi Davarpanah | Measuring dissipation factor of voltage divider of capacitor voltage transformers |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4010881B2 (ja) | 2002-06-13 | 2007-11-21 | 新光電気工業株式会社 | 半導体モジュール構造 |
| JP4290158B2 (ja) * | 2004-12-20 | 2009-07-01 | 三洋電機株式会社 | 半導体装置 |
| JP2007049115A (ja) * | 2005-07-13 | 2007-02-22 | Seiko Epson Corp | 半導体装置 |
| JP2007036571A (ja) * | 2005-07-26 | 2007-02-08 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US7531407B2 (en) * | 2006-07-18 | 2009-05-12 | International Business Machines Corporation | Semiconductor integrated circuit devices having high-Q wafer backside inductors and methods of fabricating same |
-
2007
- 2007-12-27 JP JP2007335690A patent/JP5592053B2/ja active Active
-
2008
- 2008-12-23 US US12/342,755 patent/US8035192B2/en active Active
- 2008-12-26 TW TW097150906A patent/TW200931623A/zh unknown
- 2008-12-26 KR KR1020080134561A patent/KR20090071482A/ko not_active Withdrawn