JP2009151920A - メモリデバイスと放電回路とを備える集積回路 - Google Patents

メモリデバイスと放電回路とを備える集積回路 Download PDF

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Publication number
JP2009151920A
JP2009151920A JP2008306999A JP2008306999A JP2009151920A JP 2009151920 A JP2009151920 A JP 2009151920A JP 2008306999 A JP2008306999 A JP 2008306999A JP 2008306999 A JP2008306999 A JP 2008306999A JP 2009151920 A JP2009151920 A JP 2009151920A
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Japan
Prior art keywords
voltage
transistor
operation time
line
voltage line
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JP2008306999A
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English (en)
Japanese (ja)
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JP2009151920A5 (enExample
Inventor
Te-Chang Tseng
徳彰 曾
Chun-Yi Tu
君毅 杜
Hideki Arakawa
秀貴 荒川
Kyoji Yamazaki
恭治 山崎
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Powerchip Semiconductor Corp
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Powerchip Semiconductor Corp
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Application filed by Powerchip Semiconductor Corp filed Critical Powerchip Semiconductor Corp
Publication of JP2009151920A publication Critical patent/JP2009151920A/ja
Publication of JP2009151920A5 publication Critical patent/JP2009151920A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

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  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2008306999A 2007-12-19 2008-12-02 メモリデバイスと放電回路とを備える集積回路 Pending JP2009151920A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096148594A TWI358067B (en) 2007-12-19 2007-12-19 Integrated circuits and discharge circuits

Publications (2)

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JP2009151920A true JP2009151920A (ja) 2009-07-09
JP2009151920A5 JP2009151920A5 (enExample) 2011-10-27

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ID=40788427

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JP2008306999A Pending JP2009151920A (ja) 2007-12-19 2008-12-02 メモリデバイスと放電回路とを備える集積回路

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US (1) US7903470B2 (enExample)
JP (1) JP2009151920A (enExample)
TW (1) TWI358067B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101258346B1 (ko) * 2010-07-08 2013-04-26 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 조정 접지 노드들을 구비한 메모리
JP5883494B1 (ja) * 2014-11-19 2016-03-15 ウィンボンド エレクトロニクス コーポレーション 不揮発性半導体記憶装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8000151B2 (en) 2008-01-10 2011-08-16 Micron Technology, Inc. Semiconductor memory column decoder device and method
WO2014124324A1 (en) * 2013-02-08 2014-08-14 Sandisk Technologies Inc. Non-volatile memory including bit line switch transistors formed in a triple-well
US9806608B2 (en) * 2015-02-13 2017-10-31 Apple Inc. Charge pump having AC and DC outputs for touch panel bootstrapping and substrate biasing
CN107370351B (zh) * 2016-05-13 2019-12-27 中芯国际集成电路制造（天津）有限公司 电荷泄放电路
CN119943114A (zh) * 2023-11-02 2025-05-06 长江存储科技有限责任公司 存储器装置及其操作方法、存储器系统

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11232888A (ja) * 1997-11-25 1999-08-27 Samsung Electronics Co Ltd 負の高電圧を放電させるための回路を備えたフラッシュメモリ装置
JP2000021186A (ja) * 1998-07-02 2000-01-21 Toshiba Corp 不揮発性半導体記憶装置
JP2002261240A (ja) * 2001-02-28 2002-09-13 Sharp Corp 不揮発性半導体メモリのウェル電圧設定回路およびそれを備えた半導体メモリ装置
JP2005310301A (ja) * 2004-04-23 2005-11-04 Toshiba Corp 不揮発性半導体記憶装置
JP2006080247A (ja) * 2004-09-09 2006-03-23 Renesas Technology Corp 半導体装置
WO2006118601A1 (en) * 2005-05-02 2006-11-09 Freescale Semiconductor, Inc. Integrated circuit having a non-volatile memory with discharge rate control and method therefor
JP2006313611A (ja) * 2005-05-04 2006-11-16 Samsung Electronics Co Ltd メモリ装置の消去電圧のディスチャージ方法及びそのディスチャージ回路
JP2007179647A (ja) * 2005-12-27 2007-07-12 Toshiba Corp 不揮発性半導体記憶装置
JP2008004336A (ja) * 2006-06-21 2008-01-10 Yazaki Corp コネクタ

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5740109A (en) * 1996-08-23 1998-04-14 Motorola, Inc. Non-linear charge pump
US6667910B2 (en) * 2002-05-10 2003-12-23 Micron Technology, Inc. Method and apparatus for discharging an array well in a flash memory device
DE102004028934B3 (de) * 2004-06-15 2006-01-05 Infineon Technologies Ag Entladeschaltung für eine kapazitive Last
JP2008004236A (ja) * 2006-06-26 2008-01-10 Samsung Electronics Co Ltd 不揮発性半導体記憶装置の消去放電制御方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11232888A (ja) * 1997-11-25 1999-08-27 Samsung Electronics Co Ltd 負の高電圧を放電させるための回路を備えたフラッシュメモリ装置
JP2000021186A (ja) * 1998-07-02 2000-01-21 Toshiba Corp 不揮発性半導体記憶装置
JP2002261240A (ja) * 2001-02-28 2002-09-13 Sharp Corp 不揮発性半導体メモリのウェル電圧設定回路およびそれを備えた半導体メモリ装置
JP2005310301A (ja) * 2004-04-23 2005-11-04 Toshiba Corp 不揮発性半導体記憶装置
JP2006080247A (ja) * 2004-09-09 2006-03-23 Renesas Technology Corp 半導体装置
WO2006118601A1 (en) * 2005-05-02 2006-11-09 Freescale Semiconductor, Inc. Integrated circuit having a non-volatile memory with discharge rate control and method therefor
JP2006313611A (ja) * 2005-05-04 2006-11-16 Samsung Electronics Co Ltd メモリ装置の消去電圧のディスチャージ方法及びそのディスチャージ回路
JP2007179647A (ja) * 2005-12-27 2007-07-12 Toshiba Corp 不揮発性半導体記憶装置
JP2008004336A (ja) * 2006-06-21 2008-01-10 Yazaki Corp コネクタ

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101258346B1 (ko) * 2010-07-08 2013-04-26 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 조정 접지 노드들을 구비한 메모리
US8576611B2 (en) 2010-07-08 2013-11-05 Taiwan Semiconductor Manufacturing Company, Ltd. Memory with regulated ground nodes
US9218857B2 (en) 2010-07-08 2015-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of memory with regulated ground nodes
US9530487B2 (en) 2010-07-08 2016-12-27 Taiwan Semiconductor Manufacturing Company, Ltd. Method of writing memory with regulated ground nodes
US9978446B2 (en) 2010-07-08 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Memory with regulated ground nodes and method of retaining data therein
JP5883494B1 (ja) * 2014-11-19 2016-03-15 ウィンボンド エレクトロニクス コーポレーション 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US7903470B2 (en) 2011-03-08
TW200929221A (en) 2009-07-01
TWI358067B (en) 2012-02-11
US20090161440A1 (en) 2009-06-25

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