JP2009004756A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP2009004756A JP2009004756A JP2008127915A JP2008127915A JP2009004756A JP 2009004756 A JP2009004756 A JP 2009004756A JP 2008127915 A JP2008127915 A JP 2008127915A JP 2008127915 A JP2008127915 A JP 2008127915A JP 2009004756 A JP2009004756 A JP 2009004756A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
Abstract
【解決手段】基板上に、単結晶半導体基板にイオンを打ち込み前記基板に貼り付けた後熱処理を加えることにより残存させた単結晶半導体層を有する第1の領域と、非単結晶半導体層を有する第2の領域と、を設ける。また、劈開単結晶半導体層に不活性雰囲気中においてレーザー光の照射を行い、非単結晶半導体層には、少なくとも一度、大気雰囲気中においてレーザー光の照射を行うとより好ましい。
【選択図】図7
Description
本実施の形態では、劈開単結晶半導体層を有する第1の領域と、非単結晶半導体層を有する第2の領域と、を有する表示装置について説明する。
本実施の形態では、劈開単結晶半導体層を有する第1の領域と、非単結晶半導体層を有する第2の領域と、を有する非接触でデータの入出力が可能である半導体装置について説明する。
本実施の形態では、図4、図5を用いて、劈開単結晶半導体層の作製方法について説明する。
本実施の形態では、劈開単結晶半導体層を有する第1の領域5001と、非単結晶半導体層を有する第2の領域5002と、にレーザー光を照射するまでの工程について説明する。
本実施の形態では、劈開単結晶半導体層を有する第1の領域5001と、非単結晶半導体層を有する第2の領域5002と、にレーザー光を照射するまでの工程について説明する。
本実施の形態では、劈開単結晶半導体層を有する第1の領域5001と、非単結晶半導体層を有する第2の領域5002と、にレーザー光を照射するまでの工程について説明する。
本実施の形態では、半導体装置を作製する工程について説明する。
本実施の形態では、キャップ膜を用いたレーザー結晶化を含む工程について説明する。
本実施の形態では、劈開単結晶半導体層及び非単結晶半導体層の表面の平坦性、並びに、劈開単結晶半導体層及び非単結晶半導体層を用いたデバイスの特性について説明する。
本実施の形態では、レーザー照射モニター基板について説明する。
表示装置又は非接触タグを形成する場合、同一基板上にフォトICを同時に形成すると好ましい。
本実施の形態においては、本発明の半導体装置の例について説明する。
101 第1の単結晶半導体層
102 第2の単結晶半導体層
103 イオン層
104 接合層
500 基板
501 絶縁膜
502 下地膜
511 劈開単結晶半導体層
512 非単結晶半導体層
521 第1のキャップ膜
522 キャップ膜
530 ゲート絶縁膜
540 層間絶縁膜
541 ゲート電極
542 ゲート電極
551a 配線
551b 配線
552a 配線
552b 配線
1001 ソースドライバ回路
1002 ゲートドライバ回路
1011 画素部
2001 アンテナ
2002 整流回路
2003 復調回路
2004 変調回路
2006 レギュレータ
2007 VCO
2008 メモリ
2009 論理回路
5001 第1の領域
5002 第2の領域
7000 レーザー光
7001 レーザー光
7002 レーザー光
7003 レーザー光
7004 レーザー光
7005 レーザー光
7006 レーザー光
7007 レーザー光
7008 レーザー光
7009 レーザー光
8000 矢印
8001 矢印
8002 矢印
8003 矢印
8004 矢印
8005 矢印
8006 矢印
8007 矢印
8008 矢印
8009 矢印
10000 基板
20000 基板
Claims (8)
- 基板上に非単結晶半導体膜を形成し、
前記基板上の第1の領域の前記非単結晶半導体膜を除去することによって、前記基板上の第2の領域に非単結晶半導体層を形成し、
イオン種を単結晶半導体基板に注入又はドーピングして、前記単結晶半導体基板の表面から所定の深さの領域にイオン層を形成し、
前記単結晶半導体基板の表面に接合層を形成し、
前記接合層を前記第1の領域に貼り合わせ、
前記単結晶半導体基板にエネルギーを加えて、前記イオン層に亀裂を生じさせることにより、前記第1の領域に単結晶半導体層を残存させ、
前記単結晶半導体層に不活性雰囲気中でレーザー光の照射を行う工程と、前記非単結晶半導体層に大気雰囲気中でレーザー光の照射を行う工程と、を行うことを特徴とする半導体装置の作製方法。 - 基板上に非単結晶半導体膜を形成し、
前記基板上の第1の領域の前記非単結晶半導体膜を除去することによって、前記基板上の第2の領域に非単結晶半導体層を形成し、
イオン種を単結晶半導体基板に注入又はドーピングして、前記単結晶半導体基板の表面から所定の深さの領域にイオン層を形成し、
前記単結晶半導体基板の表面に接合層を形成し、
前記接合層を前記第1の領域に貼り合わせ、
前記単結晶半導体基板にエネルギーを加えて、前記イオン層に亀裂を生じさせることにより、前記第1の領域に単結晶半導体層を残存させ、
大気雰囲気において前記非単結晶半導体層に第1のレーザー光を照射し、
不活性雰囲気において前記非単結晶半導体層及び前記単結晶半導体層に第2のレーザー光を照射することを特徴とする半導体装置の作製方法。 - 基板上に非単結晶半導体膜を形成し、
大気雰囲気において前記非単結晶半導体膜に第1のレーザー光を照射し、
前記基板上の第1の領域の前記非単結晶半導体膜を除去することによって、前記基板上の第2の領域に非単結晶半導体層を形成し、
イオン種を単結晶半導体基板に注入又はドーピングして、前記単結晶半導体基板の表面から所定の深さの領域にイオン層を形成し、
前記単結晶半導体基板の表面に接合層を形成し、
前記接合層を前記第1の領域に貼り合わせ、
前記単結晶半導体基板にエネルギーを加えて、前記イオン層に亀裂を生じさせることにより、前記第1の領域に単結晶半導体層を残存させ、
不活性雰囲気において前記非単結晶半導体層及び前記単結晶半導体層に第2のレーザー光を照射することを特徴とする半導体装置の作製方法。 - 基板上に非単結晶半導体膜を形成し、
前記基板上の第1の領域の前記非単結晶半導体膜を除去することによって、前記基板上の第2の領域に非単結晶半導体層を形成し、
イオン種を単結晶半導体基板に注入又はドーピングして、前記単結晶半導体基板の表面から所定の深さの領域にイオン層を形成し、
前記単結晶半導体基板の表面に接合層を形成し、
前記接合層を前記第1の領域に貼り合わせ、
前記単結晶半導体基板にエネルギーを加えて、前記イオン層に亀裂を生じさせることにより、前記第1の領域に単結晶半導体層を残存させ、
前記非単結晶半導体層上にキャップ膜を形成し、
不活性雰囲気において、前記キャップ膜の上から前記非単結晶半導体層及び前記単結晶半導体層に第1のレーザー光を照射し、
前記キャップ膜を除去し、
大気雰囲気において、前記非単結晶半導体層に第2のレーザー光を照射することを特徴とする半導体装置の作製方法。 - 請求項4において、
前記第1のレーザー光のエネルギー密度の設定条件は、非単結晶半導体からなるレーザー照射モニターを用いて決定した最適条件を用いることを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項5のいずれか一項において、
前記第1の領域に駆動回路を形成し、
前記第2の領域に液晶表示素子を有する画素部を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項5のいずれか一項において、
前記第1の領域にエレクトロルミネッセンス表示素子を有する画素部を形成し、
前記第2の領域に駆動回路を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項6のいずれか一項において、
前記第1の領域にアナログ回路を形成し、
前記第2の領域にデジタル回路を形成することを特徴とする半導体装置の作製方法。
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