JP2009004609A5 - - Google Patents

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Publication number
JP2009004609A5
JP2009004609A5 JP2007164820A JP2007164820A JP2009004609A5 JP 2009004609 A5 JP2009004609 A5 JP 2009004609A5 JP 2007164820 A JP2007164820 A JP 2007164820A JP 2007164820 A JP2007164820 A JP 2007164820A JP 2009004609 A5 JP2009004609 A5 JP 2009004609A5
Authority
JP
Japan
Prior art keywords
chip
wiring board
integrated circuit
semiconductor integrated
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007164820A
Other languages
English (en)
Japanese (ja)
Other versions
JP4945339B2 (ja
JP2009004609A (ja
Filing date
Publication date
Priority claimed from JP2007164820A external-priority patent/JP4945339B2/ja
Priority to JP2007164820A priority Critical patent/JP4945339B2/ja
Application filed filed Critical
Priority to TW097119567A priority patent/TWI463580B/zh
Priority to US12/137,522 priority patent/US7888141B2/en
Priority to KR1020080057449A priority patent/KR101473492B1/ko
Priority to CN2008101286068A priority patent/CN101335191B/zh
Priority to CN201210068756.0A priority patent/CN102623402B/zh
Publication of JP2009004609A publication Critical patent/JP2009004609A/ja
Publication of JP2009004609A5 publication Critical patent/JP2009004609A5/ja
Priority to US12/987,779 priority patent/US8003495B2/en
Priority to US13/208,171 priority patent/US8222050B2/en
Publication of JP4945339B2 publication Critical patent/JP4945339B2/ja
Application granted granted Critical
Priority to US13/533,963 priority patent/US8372665B2/en
Priority to US13/742,788 priority patent/US8492173B2/en
Priority to US13/941,507 priority patent/US20130299098A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2007164820A 2007-06-19 2007-06-22 半導体集積回路装置の製造方法 Active JP4945339B2 (ja)

Priority Applications (11)

Application Number Priority Date Filing Date Title
JP2007164820A JP4945339B2 (ja) 2007-06-22 2007-06-22 半導体集積回路装置の製造方法
TW097119567A TWI463580B (zh) 2007-06-19 2008-05-27 Manufacturing method of semiconductor integrated circuit device
US12/137,522 US7888141B2 (en) 2007-06-19 2008-06-11 Manufacturing method for semiconductor integrated device
KR1020080057449A KR101473492B1 (ko) 2007-06-19 2008-06-18 반도체 집적 회로 장치의 제조 방법
CN2008101286068A CN101335191B (zh) 2007-06-19 2008-06-19 半导体集成电路装置的制造方法
CN201210068756.0A CN102623402B (zh) 2007-06-19 2008-06-19 半导体集成电路装置的制造方法
US12/987,779 US8003495B2 (en) 2007-06-19 2011-01-10 Manufacturing method for semiconductor integrated device
US13/208,171 US8222050B2 (en) 2007-06-19 2011-08-11 Manufacturing method for semiconductor integrated device
US13/533,963 US8372665B2 (en) 2007-06-19 2012-06-26 Manufacturing method for semiconductor integrated device
US13/742,788 US8492173B2 (en) 2007-06-19 2013-01-16 Manufacturing method for semiconductor integrated device
US13/941,507 US20130299098A1 (en) 2007-06-19 2013-07-14 Manufacturing method for semiconductor integrated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007164820A JP4945339B2 (ja) 2007-06-22 2007-06-22 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012047743A Division JP2012156517A (ja) 2012-03-05 2012-03-05 半導体集積回路装置の製造方法

Publications (3)

Publication Number Publication Date
JP2009004609A JP2009004609A (ja) 2009-01-08
JP2009004609A5 true JP2009004609A5 (enrdf_load_stackoverflow) 2010-06-17
JP4945339B2 JP4945339B2 (ja) 2012-06-06

Family

ID=40320662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007164820A Active JP4945339B2 (ja) 2007-06-19 2007-06-22 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JP4945339B2 (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5491748B2 (ja) * 2009-03-05 2014-05-14 株式会社東芝 半導体装置の製造装置および半導体装置の製造方法
JP5717910B1 (ja) * 2014-02-26 2015-05-13 株式会社新川 半導体ダイのピックアップ装置及びピックアップ方法
JP6653273B2 (ja) * 2017-01-26 2020-02-26 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP6967411B2 (ja) * 2017-09-19 2021-11-17 ファスフォードテクノロジ株式会社 半導体製造装置、半導体装置の製造方法およびコレット
EP3569370A1 (en) * 2018-05-18 2019-11-20 SUPSI (Scuola Universitaria Professionale Della Svizzera Italiana) Device for gripping and welding electronic components and associated actuating head, robot and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0620092B2 (ja) * 1984-09-11 1994-03-16 ロ−ム株式会社 半導体ペレットのダイボンディング用チャック装置
JPH07273493A (ja) * 1994-03-30 1995-10-20 Hitachi Techno Eng Co Ltd 搭載機
JPH1145930A (ja) * 1997-07-24 1999-02-16 Toshiba Electron Eng Corp 吸着ヘッド
JP2005150311A (ja) * 2003-11-13 2005-06-09 Nec Machinery Corp チップマウント方法及び装置
JP4644481B2 (ja) * 2004-12-24 2011-03-02 Ｊｕｋｉ株式会社 電子部品圧着搭載装置

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