JP2008545271A - クリティカルディメンション低減およびピッチ低減のためのシステムおよび方法 - Google Patents
クリティカルディメンション低減およびピッチ低減のためのシステムおよび方法 Download PDFInfo
- Publication number
- JP2008545271A JP2008545271A JP2008519338A JP2008519338A JP2008545271A JP 2008545271 A JP2008545271 A JP 2008545271A JP 2008519338 A JP2008519338 A JP 2008519338A JP 2008519338 A JP2008519338 A JP 2008519338A JP 2008545271 A JP2008545271 A JP 2008545271A
- Authority
- JP
- Japan
- Prior art keywords
- mask
- profile
- shape
- forming
- critical dimension
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 91
- 230000009467 reduction Effects 0.000 title description 10
- 239000000463 material Substances 0.000 claims abstract description 57
- 230000008569 process Effects 0.000 claims description 54
- 238000000206 photolithography Methods 0.000 claims description 24
- 238000005530 etching Methods 0.000 claims description 19
- 238000005137 deposition process Methods 0.000 claims description 15
- 239000007789 gas Substances 0.000 description 14
- 239000000758 substrate Substances 0.000 description 13
- 238000000151 deposition Methods 0.000 description 9
- 230000008021 deposition Effects 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 238000004590 computer program Methods 0.000 description 2
- 230000003750 conditioning effect Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000013500 data storage Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005019 vapor deposition process Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000001502 supplementing effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electroluminescent Light Sources (AREA)
- Paper (AREA)
- Printing Plates And Materials Therefor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/173,733 US7427458B2 (en) | 2005-06-30 | 2005-06-30 | System and method for critical dimension reduction and pitch reduction |
PCT/US2006/022890 WO2007005204A2 (en) | 2005-06-30 | 2006-06-12 | System and method for critical dimension reduction and pitch reduction |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2008545271A true JP2008545271A (ja) | 2008-12-11 |
Family
ID=37590177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008519338A Pending JP2008545271A (ja) | 2005-06-30 | 2006-06-12 | クリティカルディメンション低減およびピッチ低減のためのシステムおよび方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7427458B2 (zh) |
JP (1) | JP2008545271A (zh) |
KR (1) | KR101339542B1 (zh) |
CN (2) | CN101213488B (zh) |
MY (1) | MY139835A (zh) |
TW (1) | TWI348071B (zh) |
WO (1) | WO2007005204A2 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7449348B1 (en) * | 2004-06-02 | 2008-11-11 | Advanced Micro Devices, Inc. | Feedback control of imprint mask feature profile using scatterometry and spacer etchback |
US8529728B2 (en) * | 2005-06-30 | 2013-09-10 | Lam Research Corporation | System and method for critical dimension reduction and pitch reduction |
US7682516B2 (en) * | 2005-10-05 | 2010-03-23 | Lam Research Corporation | Vertical profile fixing |
US8277670B2 (en) | 2008-05-13 | 2012-10-02 | Lam Research Corporation | Plasma process with photoresist mask pretreatment |
CN105023835B (zh) * | 2015-06-17 | 2019-04-02 | 泰科天润半导体科技(北京)有限公司 | 介质掩膜的制造方法、利用该掩膜刻蚀或离子注入的方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01181422A (ja) * | 1988-01-08 | 1989-07-19 | Dainippon Printing Co Ltd | パターン形成方法 |
JPH01253922A (ja) * | 1988-04-01 | 1989-10-11 | Matsushita Electric Ind Co Ltd | レジスト処理方法 |
JPH0219852A (ja) * | 1988-07-07 | 1990-01-23 | Matsushita Electric Ind Co Ltd | レジスト処理方法 |
JPH065560A (ja) * | 1992-06-16 | 1994-01-14 | Sony Corp | 半導体装置の製造方法 |
JP2000173996A (ja) * | 1998-12-03 | 2000-06-23 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2000232047A (ja) * | 1999-02-09 | 2000-08-22 | Nikon Corp | 散乱ステンシル型レチクルの修正方法 |
JP2002237440A (ja) * | 2001-02-08 | 2002-08-23 | Semiconductor Leading Edge Technologies Inc | レジストパターン形成方法及び微細パターン形成方法 |
JP2007503720A (ja) * | 2003-08-26 | 2007-02-22 | ラム リサーチ コーポレーション | フィーチャ微小寸法の低減 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5674647A (en) * | 1992-11-21 | 1997-10-07 | Ulvac Coating Corporation | Phase shift mask and manufacturing method thereof and exposure method using phase shift mask |
US5506080A (en) * | 1995-01-23 | 1996-04-09 | Internation Business Machines Corp. | Lithographic mask repair and fabrication method |
US6415413B1 (en) * | 1998-06-18 | 2002-07-02 | Globespanvirata, Inc. | Configurable Reed-Solomon controller and method |
JP3848006B2 (ja) | 1999-03-15 | 2006-11-22 | 株式会社東芝 | マスク欠陥修正方法 |
US6342428B1 (en) * | 1999-10-04 | 2002-01-29 | Philips Electronics North America Corp. | Method for a consistent shallow trench etch profile |
US6415431B1 (en) | 2000-02-18 | 2002-07-02 | International Business Machines Corporation | Repair of phase shift materials to enhance adhesion |
EP1361478B1 (en) * | 2001-02-15 | 2009-12-30 | Dai Nippon Printing Co., Ltd. | Method of manufacturing phase shift mask and phase shift mask |
DE10228807B4 (de) * | 2002-06-27 | 2009-07-23 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung von Mikrostrukturelementen |
-
2005
- 2005-06-30 US US11/173,733 patent/US7427458B2/en not_active Expired - Fee Related
-
2006
- 2006-06-12 WO PCT/US2006/022890 patent/WO2007005204A2/en active Application Filing
- 2006-06-12 KR KR1020077030841A patent/KR101339542B1/ko not_active IP Right Cessation
- 2006-06-12 CN CN2006800241548A patent/CN101213488B/zh not_active Expired - Fee Related
- 2006-06-12 JP JP2008519338A patent/JP2008545271A/ja active Pending
- 2006-06-12 CN CN2012103397786A patent/CN102969230A/zh active Pending
- 2006-06-29 TW TW095123495A patent/TWI348071B/zh not_active IP Right Cessation
- 2006-06-29 MY MYPI20063112A patent/MY139835A/en unknown
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01181422A (ja) * | 1988-01-08 | 1989-07-19 | Dainippon Printing Co Ltd | パターン形成方法 |
JPH01253922A (ja) * | 1988-04-01 | 1989-10-11 | Matsushita Electric Ind Co Ltd | レジスト処理方法 |
JPH0219852A (ja) * | 1988-07-07 | 1990-01-23 | Matsushita Electric Ind Co Ltd | レジスト処理方法 |
JPH065560A (ja) * | 1992-06-16 | 1994-01-14 | Sony Corp | 半導体装置の製造方法 |
JP2000173996A (ja) * | 1998-12-03 | 2000-06-23 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2000232047A (ja) * | 1999-02-09 | 2000-08-22 | Nikon Corp | 散乱ステンシル型レチクルの修正方法 |
JP2002237440A (ja) * | 2001-02-08 | 2002-08-23 | Semiconductor Leading Edge Technologies Inc | レジストパターン形成方法及び微細パターン形成方法 |
JP2007503720A (ja) * | 2003-08-26 | 2007-02-22 | ラム リサーチ コーポレーション | フィーチャ微小寸法の低減 |
Also Published As
Publication number | Publication date |
---|---|
US20070004217A1 (en) | 2007-01-04 |
KR20080023228A (ko) | 2008-03-12 |
WO2007005204A3 (en) | 2007-11-01 |
TW200710564A (en) | 2007-03-16 |
KR101339542B1 (ko) | 2013-12-10 |
TWI348071B (en) | 2011-09-01 |
CN101213488A (zh) | 2008-07-02 |
CN102969230A (zh) | 2013-03-13 |
US7427458B2 (en) | 2008-09-23 |
MY139835A (en) | 2009-10-30 |
WO2007005204A2 (en) | 2007-01-11 |
CN101213488B (zh) | 2012-11-07 |
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