JP2008529273A - 検知エレメントに関するウェハレベルチップスケールパッケージを備えた装置および方法 - Google Patents

検知エレメントに関するウェハレベルチップスケールパッケージを備えた装置および方法 Download PDF

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Publication number
JP2008529273A
JP2008529273A JP2007552128A JP2007552128A JP2008529273A JP 2008529273 A JP2008529273 A JP 2008529273A JP 2007552128 A JP2007552128 A JP 2007552128A JP 2007552128 A JP2007552128 A JP 2007552128A JP 2008529273 A JP2008529273 A JP 2008529273A
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JP
Japan
Prior art keywords
wafer
sacrificial material
sensor
depositing
sealing layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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JP2007552128A
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English (en)
Japanese (ja)
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JP2008529273A5 (enExample
Inventor
マクドナルド，ウィリアム・ジー
フーパー，スティーブン・アール
サリアン，アーヴィンド・エス
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NXP USA Inc
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NXP USA Inc
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Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2008529273A publication Critical patent/JP2008529273A/ja
Publication of JP2008529273A5 publication Critical patent/JP2008529273A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00309—Processes for packaging MEMS devices suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/05—Temporary protection of devices or parts of the devices during manufacturing
    • B81C2201/053—Depositing a protective layers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2007552128A 2005-01-20 2005-12-14 検知エレメントに関するウェハレベルチップスケールパッケージを備えた装置および方法 Pending JP2008529273A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/039,688 US7109055B2 (en) 2005-01-20 2005-01-20 Methods and apparatus having wafer level chip scale package for sensing elements
PCT/US2005/045204 WO2006078374A1 (en) 2005-01-20 2005-12-14 Methods and apparatus having wafer level chip scale package for sensing elements

Publications (2)

Publication Number Publication Date
JP2008529273A true JP2008529273A (ja) 2008-07-31
JP2008529273A5 JP2008529273A5 (enExample) 2009-02-12

Family

ID=36684436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007552128A Pending JP2008529273A (ja) 2005-01-20 2005-12-14 検知エレメントに関するウェハレベルチップスケールパッケージを備えた装置および方法

Country Status (7)

Country Link
US (1) US7109055B2 (enExample)
EP (1) EP1842224A4 (enExample)
JP (1) JP2008529273A (enExample)
KR (1) KR101174937B1 (enExample)
CN (1) CN101065826A (enExample)
TW (1) TWI392032B (enExample)
WO (1) WO2006078374A1 (enExample)

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US8153016B2 (en) 2007-10-03 2012-04-10 Apple Inc. Shaping a cover glass
US8035216B2 (en) * 2008-02-22 2011-10-11 Intel Corporation Integrated circuit package and method of manufacturing same
TWI398934B (zh) * 2008-04-15 2013-06-11 亞德諾公司 晶圓級ｃｓｐ感測器
US8037771B2 (en) * 2009-05-13 2011-10-18 Lsi Corporation Electronic pressure-sensing device
US20110108999A1 (en) * 2009-11-06 2011-05-12 Nalla Ravi K Microelectronic package and method of manufacturing same
US8742561B2 (en) 2009-12-29 2014-06-03 Intel Corporation Recessed and embedded die coreless package
US8901724B2 (en) 2009-12-29 2014-12-02 Intel Corporation Semiconductor package with embedded die and its methods of fabrication
US8535989B2 (en) 2010-04-02 2013-09-17 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
US8319318B2 (en) 2010-04-06 2012-11-27 Intel Corporation Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages
US8618652B2 (en) 2010-04-16 2013-12-31 Intel Corporation Forming functionalized carrier structures with coreless packages
US9847308B2 (en) 2010-04-28 2017-12-19 Intel Corporation Magnetic intermetallic compound interconnect
US8939347B2 (en) 2010-04-28 2015-01-27 Intel Corporation Magnetic intermetallic compound interconnect
US8313958B2 (en) 2010-05-12 2012-11-20 Intel Corporation Magnetic microelectronic device attachment
US8434668B2 (en) 2010-05-12 2013-05-07 Intel Corporation Magnetic attachment structure
US8609532B2 (en) 2010-05-26 2013-12-17 Intel Corporation Magnetically sintered conductive via
US20120001339A1 (en) 2010-06-30 2012-01-05 Pramod Malatkar Bumpless build-up layer package design with an interposer
US8372666B2 (en) 2010-07-06 2013-02-12 Intel Corporation Misalignment correction for embedded microelectronic die applications
US8754516B2 (en) 2010-08-26 2014-06-17 Intel Corporation Bumpless build-up layer package with pre-stacked microelectronic devices
US8304913B2 (en) 2010-09-24 2012-11-06 Intel Corporation Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
US8937382B2 (en) 2011-06-27 2015-01-20 Intel Corporation Secondary device integration into coreless microelectronic device packages
US8848380B2 (en) 2011-06-30 2014-09-30 Intel Corporation Bumpless build-up layer package warpage reduction
DE102011083719B4 (de) * 2011-09-29 2022-12-08 Robert Bosch Gmbh Verfahren zur Herstellung einer Zweichipanordnung
AU2013208114B2 (en) * 2012-01-10 2014-10-30 Hzo, Inc. Masks for use in applying protective coatings to electronic assemblies, masked electronic assemblies and associated methods
JP5999302B2 (ja) * 2012-02-09 2016-09-28 セイコーエプソン株式会社 電子デバイスおよびその製造方法、並びに電子機器
JP5983912B2 (ja) * 2012-02-09 2016-09-06 セイコーエプソン株式会社 電子デバイスおよびその製造方法、並びに電子機器
WO2013172814A1 (en) 2012-05-14 2013-11-21 Intel Corporation Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias
WO2013184145A1 (en) 2012-06-08 2013-12-12 Intel Corporation Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer
WO2013192222A2 (en) 2012-06-18 2013-12-27 Hzo, Inc. Systems and methods for applying protective coatings to internal surfaces of fully assembled electronic devices
US10449568B2 (en) 2013-01-08 2019-10-22 Hzo, Inc. Masking substrates for application of protective coatings
US9894776B2 (en) 2013-01-08 2018-02-13 Hzo, Inc. System for refurbishing or remanufacturing an electronic device
BR112014005790A2 (pt) 2013-01-08 2017-03-28 Hzo Inc remoção de partes selecionadas de revestimentos de proteção de substratos
US9595485B2 (en) * 2014-06-26 2017-03-14 Nxp Usa, Inc. Microelectronic packages having embedded sidewall substrates and methods for the producing thereof
EP3153851B1 (en) * 2015-10-06 2024-05-01 Carrier Corporation Mems die with sensing structures

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JPH10144707A (ja) * 1996-11-05 1998-05-29 Nippon Retsuku Kk 電子部品の製造方法
JP2003282791A (ja) * 2002-03-20 2003-10-03 Fujitsu Ltd 接触型センサ内蔵半導体装置及びその製造方法
US20040118214A1 (en) * 2002-12-23 2004-06-24 Motorola, Inc. Method and structure for fabricating sensors with a sacrificial gel dome

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Patent Citations (3)

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JPH10144707A (ja) * 1996-11-05 1998-05-29 Nippon Retsuku Kk 電子部品の製造方法
JP2003282791A (ja) * 2002-03-20 2003-10-03 Fujitsu Ltd 接触型センサ内蔵半導体装置及びその製造方法
US20040118214A1 (en) * 2002-12-23 2004-06-24 Motorola, Inc. Method and structure for fabricating sensors with a sacrificial gel dome

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011220865A (ja) * 2010-04-09 2011-11-04 Alps Electric Co Ltd フォースセンサパッケージ及びその製造方法

Also Published As

Publication number Publication date
KR101174937B1 (ko) 2012-08-17
TWI392032B (zh) 2013-04-01
CN101065826A (zh) 2007-10-31
EP1842224A4 (en) 2012-07-04
KR20070095959A (ko) 2007-10-01
TW200711007A (en) 2007-03-16
US20060160264A1 (en) 2006-07-20
EP1842224A1 (en) 2007-10-10
US7109055B2 (en) 2006-09-19
WO2006078374A1 (en) 2006-07-27

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