JP2008508632A - データ記憶及び再生装置 - Google Patents

データ記憶及び再生装置 Download PDF

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Publication number
JP2008508632A
JP2008508632A JP2007524441A JP2007524441A JP2008508632A JP 2008508632 A JP2008508632 A JP 2008508632A JP 2007524441 A JP2007524441 A JP 2007524441A JP 2007524441 A JP2007524441 A JP 2007524441A JP 2008508632 A JP2008508632 A JP 2008508632A
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Japan
Prior art keywords
data
ecc
storage medium
error rate
information
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Pending
Application number
JP2007524441A
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English (en)
Japanese (ja)
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JP2008508632A5 (enExample
Inventor
セバスチャン、エグナー
ニコラース、ランバート
ルドビクス、エム.ヘー.エム.トルイゼン
ビクトル、エム.ヘー.ファン、アクト
マルティヌス、ウェー.ブラム
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Koninklijke Philips NV
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Koninklijke Philips NV
Koninklijke Philips Electronics NV
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Application filed by Koninklijke Philips NV, Koninklijke Philips Electronics NV filed Critical Koninklijke Philips NV
Publication of JP2008508632A publication Critical patent/JP2008508632A/ja
Publication of JP2008508632A5 publication Critical patent/JP2008508632A5/ja
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1816Testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Probability & Statistics with Applications (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
JP2007524441A 2004-08-02 2005-07-22 データ記憶及び再生装置 Pending JP2008508632A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04103711 2004-08-02
PCT/IB2005/052475 WO2006013529A1 (en) 2004-08-02 2005-07-22 Data storage and replay apparatus

Publications (2)

Publication Number Publication Date
JP2008508632A true JP2008508632A (ja) 2008-03-21
JP2008508632A5 JP2008508632A5 (enExample) 2008-09-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007524441A Pending JP2008508632A (ja) 2004-08-02 2005-07-22 データ記憶及び再生装置

Country Status (5)

Country Link
US (1) US8402325B2 (enExample)
EP (1) EP1776699A1 (enExample)
JP (1) JP2008508632A (enExample)
CN (1) CN101031971A (enExample)
WO (1) WO2006013529A1 (enExample)

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JP2009537055A (ja) * 2006-05-12 2009-10-22 アノビット テクノロジーズ リミテッド 適応能力を有するメモリ素子
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JP2010092574A (ja) * 2008-10-12 2010-04-22 Kyoto Software Research Inc フラッシュファイルシステムの誤り訂正機能
JP2011525655A (ja) * 2008-06-24 2011-09-22 サンディスク アイエル リミテッド ソリッドステートメモリの消去カウントにしたがってエラー修正をする方法および装置
JP2012118839A (ja) * 2010-12-02 2012-06-21 Fujitsu Ltd アクセス制御装置、誤り訂正制御方法およびストレージ装置
JP2013542533A (ja) * 2010-10-27 2013-11-21 エルエスアイ コーポレーション フラッシュメモリベースのデータ記憶のための順応ecc技術
US8707134B2 (en) 2010-12-24 2014-04-22 Kabushiki Kaisha Toshiba Data storage apparatus and apparatus and method for controlling nonvolatile memories
JP2014517970A (ja) * 2011-05-26 2014-07-24 メモライト (ウハン) カンパニー,リミテッド フラッシュメモリのエラー予測モジュール及びエラー予測方法
US9021183B2 (en) 2010-12-24 2015-04-28 Kabushiki Kaisha Toshiba Data storage apparatus and apparatus and method for controlling nonvolatile memories
WO2016051599A1 (ja) * 2014-10-03 2016-04-07 株式会社日立製作所 メモリコントローラ及びデータ制御方法
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