JP2008244104A - 半導体装置とその製造方法 - Google Patents
半導体装置とその製造方法 Download PDFInfo
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- JP2008244104A JP2008244104A JP2007081852A JP2007081852A JP2008244104A JP 2008244104 A JP2008244104 A JP 2008244104A JP 2007081852 A JP2007081852 A JP 2007081852A JP 2007081852 A JP2007081852 A JP 2007081852A JP 2008244104 A JP2008244104 A JP 2008244104A
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- wiring board
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Abstract
【解決手段】裏面に放熱板5が貼り付けられ、表面の中央部には中継配線基板2を収容する開口部Hを有するBGA基板10を用い、ASICチップ1aとメモリチップ1bがフリップチップ接続された中継配線基板2を、熱伝導性の接着材6で開口部Hの放熱板5に接着する。更に、ASICチップ1aとメモリチップ1bの裏面を、開口部Hを封止する金属キャップ8に熱伝導材9を介して接続する。
【選択図】図1
Description
この半導体装置は、下段の半導体素子101,102が、その回路面が多層回路基板200に向き合うようにフェイスダウン実装され、上段の半導体素子103が2つの半導体素子101,102にまたがって搭載されている。半導体素子103は、回路面が半導体素子101,102と向き合うようにフェイスダウン実装されている。
この半導体装置は、ASIC(Application Specified IC)やマイクロコントローラ等の制御用LSIとメモリ等の汎用LSIを組み合わせて1つのパッケージにまとめたSIP(System in Package)構造の半導体装置である。
中継配線基板2の上に、マイクロバンプ3を用いてASICチップ1aとメモリチップ1bをフリップチップ接続する(図3a)。
フリップチップ接続したASICチップ1a及びメモリチップ1bと中継配線基板2の間に、アンダーフィル樹脂4を充填する(図3b)。
中央部に中継配線基板2が丁度収まるような開口部Hが設けられ、この開口部Hの周囲に設けられた段差部Sと表面の間に配線が施され、かつ裏面に放熱板5が貼り付けられたBGA基板10を準備する。そして、このBGA基板10の開口部Hの放熱板5の内側に、工程2で組み立てた中継配線基板2を、熱伝導性のある接着材6で接着して搭載する(図3c)。
中継配線基板2の周辺部に引き出されたアルミ電極と、BGA基板10の段差部Sに引き出された配線の間を、ボンディング・ワイヤ7で電気的に接続する。更に、中継配線基板2にフリップチップ接続されたASICチップ1a及びメモリチップ1bの上に、熱伝導材9を適量塗布する(図3d)。
BGA基板10の開口部Hを覆うように、金属キャップ8を被せ、周囲を接着する。このとき、金属キャップ8とASICチップ1a及びメモリチップ1bの間が、熱伝導材9で充填されるように、工程4で塗布する熱伝導材の量を設定しておく必要がある。
(1) 中継配線基板2に搭載する半導体チップは、ASICやメモリに限定されない。また、個数も2個に限定されない。
(2) パッケージの主要部としてBGA基板10を使用した半導体装置を例示したが、パッケージの主配線基板はBGA基板に限定するものではない。
(3) 実施例2のように開口部Hに高熱伝導性の樹脂またはオイル9Aを充填する場合は、フリップチップ接続したASICチップ1a及びメモリチップ1bと中継配線基板2の間に、アンダーフィル樹脂4を充填する必要は無い。
1b メモリチップ
2 中継配線基板
3 マイクロバンプ
4 アンダーフィル樹脂
5 放熱板
6 接着材
7 ボンディング・ワイヤ
8 金属キャップ
9 熱伝導材
9A 樹脂またはオイル
10 BGA基板
11 外部端子
H 開口部
S 段差部
Claims (8)
- 中継配線基板の表面にフリップチップ接続された複数の半導体チップと、
前記半導体チップが搭載された中継配線基板を収容する開口部を有し、該中継配線基板から表面に設けられた外部端子までの配線を行う主配線基板と、
前記主配線基板の裏面に貼り付けられた放熱板と、
前記主配線基板に収容された中継配線基板の裏面を前記放熱板に接着する熱伝導性を有する接着材と、
前記主配線基板の開口部を覆う金属製の封止板と、
前記封止板と前記複数の半導体チップとの間に介在する熱伝導材とを、
備えたことを特徴とする半導体装置。 - 前記熱伝導材は、前記主配線基板の開口部に充填されていることを特徴とする請求項1記載の半導体装置。
- 前記中継配線基板は、ワイヤを介して前記主配線基板と電気的に接続していることを特徴とする請求項1または2記載の半導体装置。
- 前記主配線基板は、表面側に該主配線基板の前記表面とは異なる高さの段差部を有し、かつ該段差部上には前記外部端子と電気的に接続する配線が形成されており、
前記ワイヤは、前記段差部上に形成された配線と接続していることを特徴とする請求項3記載の半導体装置。 - 前記中継配線基板は、表面に配線が形成されたシリコン基板であることを特徴とする請求項1〜4のいずれか1項に記載の半導体装置。
- 前記複数の半導体チップは、2個の半導体チップであり、
一方の半導体チップはASICチップであり、他方の反動タチップはメモリチップであることを特徴とする請求項1〜5のいずれか1項に記載の半導体装置。 - 中継配線基板に複数の半導体チップをフリップチップ接続で搭載する処理と、
前記中継配線基板を収容する開口部を有し、該中継配線基板から表面に設けられた外部端子までの配線を行う主配線基板の裏面に放熱板を貼り付ける処理と、
前記複数の半導体チップが搭載された中継配線基板を前記主配線基板の開口部に収容し、前記放熱板に熱伝導性を有する接着材で接着する処理と、
前記中継配線基板と前記主配線基板の間をボンディング・ワイヤで配線する処理と、
前記複数の半導体チップの裏面に熱伝導材を塗布する処理と、
前記熱伝導材を介して前記複数の半導体チップと接続するように、金属製の封止板で前記主配線基板の開口部を覆う処理とを、
順次行うことを特徴とする半導体装置の製造方法。 - 中継配線基板に複数の半導体チップをフリップチップ接続で搭載する処理と、
前記中継配線基板を収容する開口部を有し、該中継配線基板から表面に設けられた外部端子までの配線を行う主配線基板の裏面に放熱板を貼り付ける処理と、
前記複数の半導体チップが搭載された中継配線基板を前記主配線基板の開口部に収容し、前記放熱板に熱伝導性を有する接着材で接着する処理と、
前記中継配線基板と前記主配線基板の間をボンディング・ワイヤで配線する処理と、
前記主配線基板の開口部に樹脂またはオイルの熱伝導材を充填する処理と、
金属製の封止板で前記主配線基板の開口部を覆う処理とを、
順次行うことを特徴とする半導体装置の製造方法。
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2015220291A (ja) * | 2014-05-15 | 2015-12-07 | 株式会社ソシオネクスト | 半導体装置及びその製造方法 |
US9564958B2 (en) | 2013-08-08 | 2017-02-07 | Intel IP Corporation | Power saving mode optimizations and related procedures |
US9609739B2 (en) | 2015-03-10 | 2017-03-28 | Kabushiki Kaisha Toshiba | Electronic device |
US9748202B2 (en) | 2015-07-15 | 2017-08-29 | Fujitsu Limited | Semiconductor device |
US9900786B2 (en) | 2013-08-08 | 2018-02-20 | Intel IP Corporation | Coverage extension level for coverage limited device |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9013040B1 (en) * | 2009-04-10 | 2015-04-21 | Sanmina Corporation | Memory device with die stacking and heat dissipation |
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US11404394B2 (en) * | 2019-09-09 | 2022-08-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Chip package structure with integrated device integrated beneath the semiconductor chip |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01194439A (ja) * | 1988-01-29 | 1989-08-04 | Hitachi Ltd | 半導体装置の製造方法 |
JPH08124967A (ja) * | 1994-10-21 | 1996-05-17 | Nec Corp | 半導体装置 |
JP2001110928A (ja) * | 1999-10-04 | 2001-04-20 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2005175423A (ja) * | 2003-11-18 | 2005-06-30 | Denso Corp | 半導体パッケージ |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3910391B2 (ja) | 2001-09-04 | 2007-04-25 | 株式会社ルネサステクノロジ | 積層型半導体装置 |
TW582100B (en) * | 2002-05-30 | 2004-04-01 | Fujitsu Ltd | Semiconductor device having a heat spreader exposed from a seal resin |
US7786591B2 (en) * | 2004-09-29 | 2010-08-31 | Broadcom Corporation | Die down ball grid array package |
US7271479B2 (en) * | 2004-11-03 | 2007-09-18 | Broadcom Corporation | Flip chip package including a non-planar heat spreader and method of making the same |
-
2007
- 2007-03-27 JP JP2007081852A patent/JP4332567B2/ja active Active
-
2008
- 2008-03-20 US US12/052,074 patent/US7932597B2/en active Active
-
2011
- 2011-03-25 US US13/071,741 patent/US8409930B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01194439A (ja) * | 1988-01-29 | 1989-08-04 | Hitachi Ltd | 半導体装置の製造方法 |
JPH08124967A (ja) * | 1994-10-21 | 1996-05-17 | Nec Corp | 半導体装置 |
JP2001110928A (ja) * | 1999-10-04 | 2001-04-20 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2005175423A (ja) * | 2003-11-18 | 2005-06-30 | Denso Corp | 半導体パッケージ |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010161184A (ja) * | 2009-01-08 | 2010-07-22 | Hitachi Ltd | 半導体装置 |
US10008475B2 (en) | 2012-09-27 | 2018-06-26 | Intel Corporation | Stacked-die including a die in a package substrate |
JP2015530757A (ja) * | 2012-09-27 | 2015-10-15 | インテル・コーポレーション | パッケージ基板にダイを含むスタックダイパッケージ |
KR101721781B1 (ko) * | 2012-09-27 | 2017-03-30 | 인텔 코포레이션 | 패키지 기판에 다이를 포함하는 적층된 다이 패키지 |
KR20150038448A (ko) * | 2012-09-27 | 2015-04-08 | 인텔 코포레이션 | 패키지 기판에 다이를 포함하는 적층된 다이 패키지 |
US9564958B2 (en) | 2013-08-08 | 2017-02-07 | Intel IP Corporation | Power saving mode optimizations and related procedures |
US9900786B2 (en) | 2013-08-08 | 2018-02-20 | Intel IP Corporation | Coverage extension level for coverage limited device |
JP2015220291A (ja) * | 2014-05-15 | 2015-12-07 | 株式会社ソシオネクスト | 半導体装置及びその製造方法 |
US9609739B2 (en) | 2015-03-10 | 2017-03-28 | Kabushiki Kaisha Toshiba | Electronic device |
USRE48664E1 (en) | 2015-03-10 | 2021-07-27 | Toshiba Memory Corporation | Electronic device |
US9748202B2 (en) | 2015-07-15 | 2017-08-29 | Fujitsu Limited | Semiconductor device |
US10595412B2 (en) | 2016-08-31 | 2020-03-17 | Fujitsu Limited | Semiconductor device, electronic device, method of manufacturing semiconductor device, and method of manufacturing electronic device |
JP2018121022A (ja) * | 2017-01-27 | 2018-08-02 | 富士通株式会社 | 光モジュール |
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JP4332567B2 (ja) | 2009-09-16 |
US20110171779A1 (en) | 2011-07-14 |
US8409930B2 (en) | 2013-04-02 |
US20080237846A1 (en) | 2008-10-02 |
US7932597B2 (en) | 2011-04-26 |
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