JP2008172189A - ハンダボールと基板とのボンディング方法、及びそのボンディング方法を使用したパッケージ構造体の製造方法 - Google Patents
ハンダボールと基板とのボンディング方法、及びそのボンディング方法を使用したパッケージ構造体の製造方法 Download PDFInfo
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- JP2008172189A JP2008172189A JP2007164991A JP2007164991A JP2008172189A JP 2008172189 A JP2008172189 A JP 2008172189A JP 2007164991 A JP2007164991 A JP 2007164991A JP 2007164991 A JP2007164991 A JP 2007164991A JP 2008172189 A JP2008172189 A JP 2008172189A
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- 229910000679 solder Inorganic materials 0.000 title claims abstract description 91
- 239000000758 substrate Substances 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims abstract description 70
- 239000002184 metal Substances 0.000 claims abstract description 70
- 230000004888 barrier function Effects 0.000 claims abstract description 55
- 239000000463 material Substances 0.000 claims abstract description 20
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 17
- 229910052738 indium Inorganic materials 0.000 claims description 16
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 12
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 229910000765 intermetallic Inorganic materials 0.000 description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- TWYYFYNJOJGNFP-CUXYNZQBSA-N (2s,4r,5s,6s)-2-[(4s,5r)-4-acetyloxy-5-methyl-3-methylidene-6-phenylhexyl]-2-carbamoyl-4-[[(e,4s,6s)-4,6-dimethyloct-2-enoyl]oxymethyl]-5-hydroxy-1,3-dioxane-4,5,6-tricarboxylic acid Chemical compound O1[C@H](C(O)=O)[C@](C(O)=O)(O)[C@](COC(=O)/C=C/[C@@H](C)C[C@@H](C)CC)(C(O)=O)O[C@]1(C(N)=O)CCC(=C)[C@@H](OC(C)=O)[C@H](C)CC1=CC=CC=C1 TWYYFYNJOJGNFP-CUXYNZQBSA-N 0.000 description 4
- ONBQEOIKXPHGMB-VBSBHUPXSA-N 1-[2-[(2s,3r,4s,5r)-3,4-dihydroxy-5-(hydroxymethyl)oxolan-2-yl]oxy-4,6-dihydroxyphenyl]-3-(4-hydroxyphenyl)propan-1-one Chemical compound O[C@@H]1[C@H](O)[C@@H](CO)O[C@H]1OC1=CC(O)=CC(O)=C1C(=O)CCC1=CC=C(O)C=C1 ONBQEOIKXPHGMB-VBSBHUPXSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 229940126142 compound 16 Drugs 0.000 description 4
- 239000000565 sealant Substances 0.000 description 3
- YSUIQYOGTINQIN-UZFYAQMZSA-N 2-amino-9-[(1S,6R,8R,9S,10R,15R,17R,18R)-8-(6-aminopurin-9-yl)-9,18-difluoro-3,12-dihydroxy-3,12-bis(sulfanylidene)-2,4,7,11,13,16-hexaoxa-3lambda5,12lambda5-diphosphatricyclo[13.2.1.06,10]octadecan-17-yl]-1H-purin-6-one Chemical compound NC1=NC2=C(N=CN2[C@@H]2O[C@@H]3COP(S)(=O)O[C@@H]4[C@@H](COP(S)(=O)O[C@@H]2[C@@H]3F)O[C@H]([C@H]4F)N2C=NC3=C2N=CN=C3N)C(=O)N1 YSUIQYOGTINQIN-UZFYAQMZSA-N 0.000 description 2
- 229910017482 Cu 6 Sn 5 Inorganic materials 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- TVTJUIAKQFIXCE-HUKYDQBMSA-N 2-amino-9-[(2R,3S,4S,5R)-4-fluoro-3-hydroxy-5-(hydroxymethyl)oxolan-2-yl]-7-prop-2-ynyl-1H-purine-6,8-dione Chemical compound NC=1NC(C=2N(C(N(C=2N=1)[C@@H]1O[C@@H]([C@H]([C@H]1O)F)CO)=O)CC#C)=O TVTJUIAKQFIXCE-HUKYDQBMSA-N 0.000 description 1
- VWVKUNOPTJGDOB-BDHVOXNPSA-N Anhydrous tofogliflozin Chemical compound C1=CC(CC)=CC=C1CC1=CC=C(CO[C@@]23[C@@H]([C@@H](O)[C@H](O)[C@@H](CO)O3)O)C2=C1 VWVKUNOPTJGDOB-BDHVOXNPSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 229940125851 compound 27 Drugs 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/041—Solder preforms in the shape of solder balls
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
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Abstract
【解決手段】 ハンダボールと基板とのボンディング方法は、以下のステップを含む。まず、電極層と基材層とを含む基板が供給される。電極層は、基材層上に配設される。続いて、バリア層が電極層上に形成される。そして、金属層がバリア層上に形成される。金属層の層厚は、約10〜18μmである。さらに、ハンダボールが金属層上に配設される。その後、ハンダボール、金属層、バリア層、及び電極層は、反応温度まで加熱され、保持時間だけ保たれる。
【選択図】 図1(C)
Description
図1(A)乃至図1(C)を参照する。図1(A)は、本発明の第1の実施の形態による基板、バリア層、及び金属層の構成を示す図である。図1(B)は、図1(A)における金属層上に配設されたハンダボールを示す図である。図1(C)は、加熱して保持時間だけその温度を保った後の図1(B)におけるハンダボール、金属層、バリア層、及び電極層の構成を示す図である。
図4(A)乃至図4(D)を参照する。図4(A)は、本発明の第2の実施の形態による基板、バリア層、及び金属層の構成を示す図である。図4(B)は、図4(A)における第2の表面にチップが供給された様子を示す図である。図4(C)は、図4(B)における金属層上に配設されたハンダボールを示す図である。図4(D)は、加熱して保持時間だけその温度を保った後の図4(C)におけるハンダボール、金属層、バリア層、及び電極層の構成を示す図である。
11,21 基材層
12,22 電極層
13,23 バリア層
14,24 金属層
15,25 ハンダボール
16,16a,16b,16c,16d,26 金属間化合物
27 チップ
28 シーラント
200 パッケージ構造体
Claims (10)
- ハンダボールと基板とのボンディング方法であって、
基材層と当該基材層上に配設された電極層とを備える前記基板を供給するステップと、
バリア層を前記電極層上に形成するステップと、
層厚が約10〜18μmの金属層を前記バリア層上に形成するステップと、
前記ハンダボールを前記金属層上に配設するステップと、
前記ハンダボール、前記金属層、前記バリア層、及び前記電極層を反応温度まで加熱するステップと、
保持時間だけ前記反応温度を保つステップとを備えること
を特徴とするボンディング方法。 - インジウムからなる前記金属層は、前記バリア層上に電気メッキされること
を特徴とする請求項1記載のボンディング方法。 - ニッケルからなる前記バリア層は、前記電極層上に電気メッキされること
を特徴とする請求項1記載のボンディング方法。 - 前記ハンダボールは、錫基の無鉛ハンダからなるものであること
を特徴とする請求項1記載のボンディング方法。 - 前記反応温度は、約160〜200℃であり、
前記保持時間は、約3〜5分であり、
前記保持時間だけ前記反応温度を保った後に、前記金属層は、略完全に消費されること
を特徴とする請求項1記載のボンディング方法。 - 第1の表面と当該第1の表面とは反対側の第2の表面とを有する基材層と、前記第1の表面上に配設された電極層とを備える前記基板を供給するステップと、
バリア層を前記電極層上に形成するステップと、
層厚が約10〜18μmの金属層を前記バリア層上に形成するステップと、
前記第2の表面上にチップを供給し、前記チップと前記基板とをワイヤボンディングするステップと、
前記ハンダボールを前記金属層上に配設するステップと、
前記ハンダボール、前記金属層、前記バリア層、及び前記電極層を反応温度まで加熱するステップと、
保持時間だけ前記反応温度を保つステップとを備えること
を特徴とするパッケージ構造体の製造方法。 - インジウムからなる前記金属層は、前記バリア層上に電気メッキされ、
ニッケルからなる前記バリア層は、前記電極層上に電気メッキされること
を特徴とする請求項6記載のパッケージ構造体の製造方法。 - 前記ハンダボールは、錫基の無鉛ハンダからなるものであること
を特徴とする請求項6記載のパッケージ構造体の製造方法。 - 前記反応温度は、約160〜200℃であり、
前記保持時間は、約3〜5分であり、
前記保持時間だけ前記反応温度を保った後に、前記金属層は、略完全に消費されること
を特徴とする請求項6記載のパッケージ構造体の製造方法。 - 前記パッケージ構造体は、ボールグリッドアレイ(ball grid array;BGA)パッケージ構造体又はフリップチップ(flip chip)パッケージ構造体であること
を特徴とする請求項6記載のパッケージ構造体の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096100580A TWI340419B (en) | 2007-01-05 | 2007-01-05 | Method of bonding solder ball and base plate and method of manufacturing pakaging structur of using the same |
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JP2008172189A true JP2008172189A (ja) | 2008-07-24 |
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JP2007164991A Pending JP2008172189A (ja) | 2007-01-05 | 2007-06-22 | ハンダボールと基板とのボンディング方法、及びそのボンディング方法を使用したパッケージ構造体の製造方法 |
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US (1) | US20080166835A1 (ja) |
JP (1) | JP2008172189A (ja) |
TW (1) | TWI340419B (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016146377A (ja) * | 2015-02-06 | 2016-08-12 | 富士通株式会社 | 電子装置及び電子装置の製造方法 |
JP2017126689A (ja) * | 2016-01-15 | 2017-07-20 | 富士通株式会社 | 電子装置及び電子機器 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8498127B2 (en) * | 2010-09-10 | 2013-07-30 | Ge Intelligent Platforms, Inc. | Thermal interface material for reducing thermal resistance and method of making the same |
JP6345544B2 (ja) | 2013-09-05 | 2018-06-20 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
Citations (3)
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JPH04236469A (ja) * | 1991-01-21 | 1992-08-25 | Nec Corp | 超伝導集積回路実装用半田バンプ形成方法 |
JPH11307565A (ja) * | 1998-04-24 | 1999-11-05 | Mitsubishi Electric Corp | 半導体装置の電極およびその製造方法ならびに半導体装置 |
JP2002334910A (ja) * | 2001-05-10 | 2002-11-22 | Mitsui Mining & Smelting Co Ltd | 電子部品実装用接着剤層を有する電子部品実装用フィルムキャリアテープの製造方法 |
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US5854512A (en) * | 1996-09-20 | 1998-12-29 | Vlsi Technology, Inc. | High density leaded ball-grid array package |
US6336262B1 (en) * | 1996-10-31 | 2002-01-08 | International Business Machines Corporation | Process of forming a capacitor with multi-level interconnection technology |
US6805974B2 (en) * | 2002-02-15 | 2004-10-19 | International Business Machines Corporation | Lead-free tin-silver-copper alloy solder composition |
US6893799B2 (en) * | 2003-03-06 | 2005-05-17 | International Business Machines Corporation | Dual-solder flip-chip solder bump |
-
2007
- 2007-01-05 TW TW096100580A patent/TWI340419B/zh not_active IP Right Cessation
- 2007-04-10 US US11/783,471 patent/US20080166835A1/en not_active Abandoned
- 2007-06-22 JP JP2007164991A patent/JP2008172189A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH04236469A (ja) * | 1991-01-21 | 1992-08-25 | Nec Corp | 超伝導集積回路実装用半田バンプ形成方法 |
JPH11307565A (ja) * | 1998-04-24 | 1999-11-05 | Mitsubishi Electric Corp | 半導体装置の電極およびその製造方法ならびに半導体装置 |
JP2002334910A (ja) * | 2001-05-10 | 2002-11-22 | Mitsui Mining & Smelting Co Ltd | 電子部品実装用接着剤層を有する電子部品実装用フィルムキャリアテープの製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016146377A (ja) * | 2015-02-06 | 2016-08-12 | 富士通株式会社 | 電子装置及び電子装置の製造方法 |
JP2017126689A (ja) * | 2016-01-15 | 2017-07-20 | 富士通株式会社 | 電子装置及び電子機器 |
Also Published As
Publication number | Publication date |
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TW200830439A (en) | 2008-07-16 |
US20080166835A1 (en) | 2008-07-10 |
TWI340419B (en) | 2011-04-11 |
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