JP2007534149A5 - - Google Patents

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Publication number
JP2007534149A5
JP2007534149A5 JP2006527418A JP2006527418A JP2007534149A5 JP 2007534149 A5 JP2007534149 A5 JP 2007534149A5 JP 2006527418 A JP2006527418 A JP 2006527418A JP 2006527418 A JP2006527418 A JP 2006527418A JP 2007534149 A5 JP2007534149 A5 JP 2007534149A5
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JP
Japan
Prior art keywords
nitrogen
concentration
gate dielectric
layer
exposing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006527418A
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English (en)
Japanese (ja)
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JP2007534149A (ja
Filing date
Publication date
Priority claimed from US10/672,631 external-priority patent/US7078300B2/en
Application filed filed Critical
Publication of JP2007534149A publication Critical patent/JP2007534149A/ja
Publication of JP2007534149A5 publication Critical patent/JP2007534149A5/ja
Pending legal-status Critical Current

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JP2006527418A 2003-09-27 2004-09-23 Geベース材料上のゲルマニウム酸窒化物層の生成 Pending JP2007534149A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/672,631 2003-09-27
US10/672,631 US7078300B2 (en) 2003-09-27 2003-09-27 Thin germanium oxynitride gate dielectric for germanium-based devices
PCT/EP2004/052283 WO2005031809A2 (en) 2003-09-27 2004-09-23 The production of a germanium oxynitride layer on a ge-based material

Publications (2)

Publication Number Publication Date
JP2007534149A JP2007534149A (ja) 2007-11-22
JP2007534149A5 true JP2007534149A5 (enExample) 2008-01-10

Family

ID=34376426

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006527418A Pending JP2007534149A (ja) 2003-09-27 2004-09-23 Geベース材料上のゲルマニウム酸窒化物層の生成

Country Status (8)

Country Link
US (2) US7078300B2 (enExample)
EP (1) EP1671356A2 (enExample)
JP (1) JP2007534149A (enExample)
KR (1) KR100843497B1 (enExample)
CN (1) CN100514577C (enExample)
IL (1) IL174503A (enExample)
TW (1) TWI338340B (enExample)
WO (1) WO2005031809A2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7517818B2 (en) 2005-10-31 2009-04-14 Tokyo Electron Limited Method for forming a nitrided germanium-containing layer using plasma processing
US7517812B2 (en) * 2005-10-31 2009-04-14 Tokyo Electron Limited Method and system for forming a nitrided germanium-containing layer using plasma processing
US20080274626A1 (en) * 2007-05-04 2008-11-06 Frederique Glowacki Method for depositing a high quality silicon dielectric film on a germanium substrate with high quality interface
US20090065816A1 (en) * 2007-09-11 2009-03-12 Applied Materials, Inc. Modulating the stress of poly-crystaline silicon films and surrounding layers through the use of dopants and multi-layer silicon films with controlled crystal structure
EP2161742A1 (en) * 2008-09-03 2010-03-10 S.O.I.TEC. Silicon on Insulator Technologies S.A. Method for Fabricating a Locally Passivated Germanium-on-Insulator Substrate
JP5266996B2 (ja) * 2008-09-12 2013-08-21 住友電気工業株式会社 半導体装置の製造方法および半導体装置
US9245805B2 (en) 2009-09-24 2016-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Germanium FinFETs with metal gates and stressors
US8809152B2 (en) 2011-11-18 2014-08-19 International Business Machines Corporation Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devices
US9136383B2 (en) * 2012-08-09 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure of semiconductor device
US9214630B2 (en) * 2013-04-11 2015-12-15 Air Products And Chemicals, Inc. Method of making a multicomponent film
TWI531071B (zh) 2014-07-08 2016-04-21 Univ Nat Central Fabrication method of gold - oxygen half - gate stacking structure
US10367080B2 (en) * 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3843398A (en) * 1970-06-25 1974-10-22 R Maagdenberg Catalytic process for depositing nitride films
US4870322A (en) 1986-04-15 1989-09-26 Hoya Corporation Electroluminescent panel having a layer of germanium nitride between an electroluminescent layer and a back electrode
US5241214A (en) 1991-04-29 1993-08-31 Massachusetts Institute Of Technology Oxides and nitrides of metastabale group iv alloys and nitrides of group iv elements and semiconductor devices formed thereof
US5571734A (en) * 1994-10-03 1996-11-05 Motorola, Inc. Method for forming a fluorinated nitrogen containing dielectric
KR20000008022A (ko) * 1998-07-09 2000-02-07 김영환 게이트 산화막의 형성방법
US6348420B1 (en) * 1999-12-23 2002-02-19 Asm America, Inc. Situ dielectric stacks
JP3547419B2 (ja) * 2001-03-13 2004-07-28 株式会社東芝 半導体装置及びその製造方法
US6893979B2 (en) * 2001-03-15 2005-05-17 International Business Machines Corporation Method for improved plasma nitridation of ultra thin gate dielectrics
US6573197B2 (en) * 2001-04-12 2003-06-03 International Business Machines Corporation Thermally stable poly-Si/high dielectric constant material interfaces
US6596597B2 (en) 2001-06-12 2003-07-22 International Business Machines Corporation Method of manufacturing dual gate logic devices
US6780719B2 (en) 2001-06-20 2004-08-24 Texas Instruments Incorporated Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
US6800519B2 (en) * 2001-09-27 2004-10-05 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6803330B2 (en) * 2001-10-12 2004-10-12 Cypress Semiconductor Corporation Method for growing ultra thin nitrided oxide
US6703277B1 (en) * 2002-04-08 2004-03-09 Advanced Micro Devices, Inc. Reducing agent for high-K gate dielectric parasitic interfacial layer
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US6706581B1 (en) * 2002-10-29 2004-03-16 Taiwan Semiconductor Manufacturing Company Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices
US7148526B1 (en) * 2003-01-23 2006-12-12 Advanced Micro Devices, Inc. Germanium MOSFET devices and methods for making same
US20040144980A1 (en) * 2003-01-27 2004-07-29 Ahn Kie Y. Atomic layer deposition of metal oxynitride layers as gate dielectrics and semiconductor device structures utilizing metal oxynitride layers
KR20060054387A (ko) * 2003-08-04 2006-05-22 에이에스엠 아메리카, 인코포레이티드 증착 전 게르마늄 표면 처리 방법
US7029980B2 (en) * 2003-09-25 2006-04-18 Freescale Semiconductor Inc. Method of manufacturing SOI template layer

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