Classifications

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  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/28008—Making conductor-insulator-semiconductor electrodes
  • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
  • H01L21/28158—Making the insulator
  • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
  • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
  • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
  • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
  • H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON
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  • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
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  • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
  • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
  • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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  • H01L21/28255—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
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  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D64/00—Electrodes of devices having potential barriers
  • H10D64/60—Electrodes characterised by their materials
  • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
  • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
  • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
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  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
  • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
  • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
  • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
  • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
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  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
  • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
  • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
  • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
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  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
  • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
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  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
  • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10S438/00—Semiconductor device manufacturing: process
  • Y10S438/906—Cleaning of wafer as interim step
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10S438/00—Semiconductor device manufacturing: process
  • Y10S438/933—Germanium or silicon or Ge-Si on III-V

Definitions

• the present invention relates to electronic devices and systems. In particular it relates to a method of producing a germanium oxynitride layer on a Ge-based material (e.g. for use as a thin gate dielectric).
• a germanium oxynitride layer on a Ge-based material e.g. for use as a thin gate dielectric.
• Today' s integrated circuits include a vast number of devices. Smaller devices are key to enhance performance and to improve reliability. As MOS (Metal Oxide Semiconductor Field-Effect-Transistor, a name with historic connotations meaning in general an insulated gate Field-Effect-Transistor) devices are being scaled down, the technology becomes more complex and new methods are needed to maintain the expected performance enhancement from one generation of devices to the next. Disclosure of Invention
• Gate dielectrics is one of the main problems for MOS field effect device scaling. This is true for both conventional silicon devices and more advanced (e.g. SiGe, Ge) devices.
• Ge-based devices typically refers to SiGe compounds, where the Ge concentration is over about 30-40%.
• Ge-based also includes an essentially pure Ge material. So far no reliable high- quality gate dielectric has been found for Ge based materials. Germanium oxide is of poor quality and is soluble in water. Binary metal oxides (e.g. ZrO 2 , HfO 2 ) show ⁇ 40% electron mobility degradation when used as gate dielectrics. Germanium oxynitride quality and scaling potential up to now was thought to be inferior to the SiO /Si system.
• Ge-based devices are a higher-performance alternative to conventional Si-based devices due to their better carrier mobility, especially for holes.
• germanium oxynitride shows best potential performance.
• the rate of thermal oxidation/oxynitridation of Ge is much faster than that of Si.
• EOT equivalent oxide thickness
• the quintessential gate dielectric material is SiO 2 , this material provides the standard for comparison.
• the dielectric constant of germanium oxynitride [about 6 to 9] differs form that of SiO , the meaningful value as far as thickness is concerned is an equivalent thickness in SiO .
• This equivalence refers to capacitance, meaning the thickness of such an SiO layer which has the same capacitance per unit area as the germanium oxynitride layer.
• a method for producing a germanium oxynitride layer on a Ge-based material comprising the steps of: incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material; and inducing growth of the oxynitride layer by exposing the first surface of the Ge-based material to an oxygen containing ambient, wherein the first concentration of nitrogen in the surface layer is controlling the growth of the oxynitride layer.
• the produced oxynitride layer has less than about 6nm of equivalent oxide thickness (EOT).
• EOT equivalent oxide thickness
• the produced oxynitride layer has between 0.5nm and 5nm of EOT.
• the Ge-based material consists essentially of Ge.
• the incorporation of the first concentration of nitrogen is carried out by subjecting the first surface to a nitrogen containing gas under thermal conditions.
• the nitrogen containing gas is NH .
• the thermal conditions are selected to be a temperature between 450°C and 700°C applied for between 1 second and 300 seconds.
• the incorporation of the first concentration of nitrogen is carried out by ion implanting a nitrogen dose into the first surface.
• the ion implantation of the nitrogen dose is selected to be between about lE15 er cm 2 and 2E16 er cm 2.
• an implantation energy is selected to be between 0.5KeV and lOkeV.
• the step of ion implanting is carried out through a screen layer.
• the step of incorporating the first concentration of nitrogen is carried out by subjecting the first surface to a nitrogen containing plasma.
• the nitrogen containing plasma is being applied with a power of between about 25 W and 1000W, at a temperature of between about room temperature and 500aC, and for a time of between about lsec and 300sec.
• an integrated value of the first concentration of in- 2 2 corporated nitrogen is between about 1E14 per cm and 3E15 per cm .
• the exposing to the oxygen containing ambient is carried out by subjecting the first surface under thermal conditions to species selected from the group consisting of O 2 , O 3 , H 2 O, NO, N 2 O, and combinations of these species thereof.
• the thermal conditions are selected to be a temperature between 500°C and 700°C applied for between 1 minute and 30 minutes.
• the exposing to the oxygen containing ambient is carried out by subjecting the first surface to an oxygen containing plasma.
• the oxygen containing plasma is being applied with a power of between about 25W and 1000W, at a temperature of between about room temperature and 500° C, and for a time of between about lsec and 300sec.
• the first surface is cleaned before the first concentration of nitrogen is incorporated.
• the cleaning comprises at least one application of an oxidation and oxide removal cycle, wherein the oxidation is accomplished with an H 202 containing solutions, and the oxide removal is accomplished by a stripping agent, wherein the stripping agent is HF, HC1, or their mixture thereof.
• the first surface is having at least two locations, and wherein the step of incorporating the first concentration of nitrogen is carried out on the at least two locations in a manner to yield differing first concentrations of the incorporated nitrogen, whereby the produced germanium oxynitride layers on the least two locations have differing EOT.
• a solution is provided in accordance with a preferred embodiment of the present invention, for the problem of growing a thin germanium oxynitride layer in a controlled manner.
• the solution involves using a two step process.
• the first step being incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material.
• This nitrogen-rich region preferably acts as a diffusion reaction barrier that controls the germanium oxidation oxynitridation rate in a second, oxidation step.
• Such a control preferably allows one to grow ulteathin germanium oxynitrides in a governable, reproducible manner.
• the thin germanium oxynitride gate dielectric preferably allows for improved properties and higher performance in Ge-based field effect devices.
• the method of the present invention preferably offers two independent controls of the dielectric formation. Firstly, the initial step preferably defines nitrogen incorporation into the surface/subsurface region of Ge-base material substrate, and hence its diffusion barrier "power", and dielectric constant. Secondly, the subsequent oxidation step preferably controls final thickness of the germanium oxynitride film.
• processors which comprise chips containing such a Ge-based field effect device having preferably below 6nm of EOT, good quality germanium oxynitride gate insulator layers on Ge-based materials.
• a method for fabricating a high performance Ge-based field effect device wherein the device comprising a germanium oxynitride gate dielectric, and production of the germanium oxynitride gate dielectric is comprising the steps of: incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material; and inducing growth of the oxynitride layer by exposing the first surface of the Ge-based material to an oxygen containing ambient, wherein the first concentration of nitrogen in the surface layer is controlling the growth of the oxynitride layer.
• the high performance Ge-based field effect device is a Ge MOS transistor.
• the germanium oxynitride gate dielectric has between 0.5nm and 5nm of EOT.
• a Ge-based field effect device comprising: a germanium oxynitride gate dielectric with less than 6nm of EOT.
• the germanium oxynitride gate dielectric has between 0.5nm and 5nm of EOT.
• the germanium oxynitride gate dielectric possesses greater resistance against charge tunneUng than a SiO 2 gate dielectric, meanwhile a ca- pacitance per unit area of the germanium oxynitride gate dielectric is at least as large as the capacitance per unit area of the SiO gate dielectric.
• the device is a Ge MOS transistor.
• a high performance processor comprising: at least one chip, wherein the chip comprises at least one Ge-based field effect device, and wherein the device comprising a germanium oxynitride gate dielectric with less than 6nm of EOT.
• the processor is a digital processor.
• the processor comprises at least one analog circuit.
• Fig. 1 shows nitrogen incorporation steps of the method in representative embodiments
• Fig. 2 shows, in accordance with a preferred embodiment, a plot of nitrogen incorporation vs. thermal conditions in the execution of the nitrogen incorporation step
• FIG. 3 shows, in accordance with a preferred embodiment of the present invention, the oxidation step completing the production of a thin germanium oxynitride layer
• Fig. 4 shows, in accordance with a preferred embodiment of the present invention, plots of the thickness and EOT of the thin germanium oxynitride layer vs the conditions of the oxygen ambient exposure step
• Fig. 5 shows, in accordance with a preferred embodiment of the present invention, a schematic cross sectional view of a Ge-based field effect device having a thin germanium oxynitride gate dielectric
• FIG. 6 shows, in accordance with a preferred embodiment of the present invention, a symbolic view of a high performance processor containing at least one chip which contains a Ge-based field effect device having a thin germanium oxynitride gate dielectric.
• Fig. 1 shows a nitrogen incorporation steps of the method in representative embodiments.
• Fig. 1A shows an embodiment wherein the nitrogen incorporation is carried out by subjecting the first surface 5 of the Ge-based body 160, typically the surface of a Ge-based material wafer, to a nitrogen containing gas under thermal, or plasma conditions.
• the reactive nitrogen containing gas in a representative embodiment is NH .
• this nitrogen containing reagent may also be NO or N 2 O.
• the thermal conditions for this chemical nitrogen incorporation step can be between 450a.C and 700a.C applied for between 1 second and 300 seconds.
• the temperature typically is applied by rapid thermal annealing techniques, well known in the art.
• Conditions for this step in a representative embodiment can be: NH active gas at 600aC for 30 seconds.
• the resulting nitridated thin layer 90 characteristically is between about 0.5nm and 1.5nm thick.
• This layer 90 incorporates a first concentration of nitrogen, which first concentration has an integrated value giving a surface density of incorporated nitrogen between about 1E14 per cm and 3E15 per cm .
• the nitrogen incorporation step can also be performed by the use of plasma ni- tridation.
• a first surface of the Ge-based surface is exposed to a low energy nitrogen containing plasma. It can be done in a direct plasma mode or by remote (downstream) plasma nitridation.
• Plasma power can be varied in the about 25 - 1000W range, exposure preferably is between lsec and 300 sec.
• the sample temperature during plasma exposure is preferred to be from about room temperature to 500a.C N 2 , NH 3 and 2 O g °ates can be used in plasma reactors as N source.
• Fig. IB schematically shows the step of nitrogen incorporation when this step is carried out by ion implanting 70 a nitrogen dose into the first surface 5 on the Ge- based material body 160.
• the implantation energy should be low, typically between 0.5KeV and lOkeV.
• the ion implantation can be performed through a thin, lOnm to 30nm, screen layer.
• Screen layer in an exemplary embodiment being, for instance, deposited SiO 2 , which after the implantation can be chemically removed.
• the implant dose of N can typically 2 2 be between about 1E15 per cm and 2E16 per cm .
• Fig. 2 shows, in accordance with a preferred embodiment of the present invention, a plot of characteristic nitrogen incorporation vs. thermal conditions in the execution of the N incorporation step, as the concentration is being measured by nuclear reaction analysis. On the vertical axis the integrated concentration in the layer 90 is shown against the temperature of reaction when NH was the reagent gas, during a 30 sec exposure.
• the nitrogen incorporation step is carried out by subjecting the first surface 5 to a nitrogen containing gas under thermal conditions or plasma conditions, or by N ion implantation, the amount of nitrogen, introduced in the nitrogen incorporation step governs the oxidation rate during the next, the oxidation step.
• the trend of more nitrogen providing more slow reoxidation kinetics, and therefore thinner films.
• Fig. 3 shows the oxidation step which completes the production of the thin a germanium oxynitride layer.
• This is a second step in the preferred embodiment, when the nitrogen containing layer controls the oxidation rate of the Ge-based material 160 as the first surface 5 is exposed to an oxygen ambient under thermal, or plasma conditions.
• the thin surface layer incorporating nitrogen 90 is regulating production of the oxynitride layer 100, while layer 90 itself is also transformed into the oxynitride layer 100.
• the oxygen ambient in a representative embodiment contains as reactive species O 2 , O 3 , H 2 O, NO, N 2 O since they can be sources of atomic oxygen. Combinations of these gases can also be used.
• the reactive gases can be mixed in with inert components, such as N2, Ar, He, etc.. That the oxidation step can also be performed in nitrogen containing gases, such as, N O, NO is due to the fact that they tend to decompose at high-temperatures releasing atomic oxygen.
• oxidation can be carried out by wet oxidation using H2O vapor mixed in a carrier inert gas.
• the thermal ambient in this step is typically a temperature between 500aC and 700aC, applied for between 1 minute and 30 minutes.
• the germanium oxynitride layer is ready as the gate dielectric, and one can proceed with further processing of devices in a standard manner.
• the oxidation step can also be performed by the use of plasma oxidation.
• the first surface 5 with the nitrogen containing layer 90 underneath is exposed to a low energy oxygen containing plasma.
• This can be done in a direct plasma mode or by remote (downstream) plasma oxidation.
• Plasma power can be varied in the about 25 W - 1000W range, exposure preferably is between lsec and 300 sec.
• the sample temperature during plasma exposure is preferred to be from about room temperature to 500a.C.
• the same oxygen containing species can be used as with the thermal oxidation.
• Fig.4 shows plots of the thickness and of the EOT of the thin germanium oxynitride layer 100 vs the conditions of the oxygen ambient exposing step, when the nitrogen incorporation step involved NH exposure at 600aC for 5 minutes. Since the quintessential gate dielectric material is SiO this material provides the standard comparison. Since the dielectric constant of germanium oxynitride differs form that of SiO 2 , it is useful to not only give the thickness of the thin germanium oxynitride layer 100, but also give equivalent thickness in SiO . The equivalence means the thickness of such an SiO layer which has the same capacitance per unit area. Thus in Fig. 4 the EOT values are the results of standard capacitance versus voltage measurements.
• Fig.4 shows how sensitively the thickness of the germanium oxynitride can be controlled, and that the EOT of the germanium oxynitride layer is tuned even in the unprecedented, below 5nm range, by controlling the thermal budget during the oxygen exposure step.
• This invention in accordance with a preferred embodiment, can thus produce germanium oxynitride layers that have less than about lOnm of EOT.
• a preferred range of germanium oxynitride gate dielectric for high performance devices is below 6nm of EOT, preferably having a range between 0.5nm and 5nm of EOT.
• the invention is particularly significant, since pure Ge devices can potentially deliver the best performance.
• the present method offers an additional process flexibility, namely to grow multiple, for example dual, oxynitride dielectric thicknesses for different devices/applications on the same wafer by incorporating different amounts of nitrogen in differing parts of the wafer.
• the first surface 5 would have at least two differing locations, where the nitrogen incorporation step is carried out in manners to yield differing first concentrations of the incorporated nitrogen. Accordingly, the produced, final oxynitride layers on the at least two locations end up having differing EOT.
• Fig. 5 shows a schematic cross sectional view of a Ge-based field effect device 10 having a thin germanium oxynitride layer 100 gate dielectric, preferably having an equivalent oxide thickness of less than 5nm.
• the gate dielectric germanium oxynitride 100 is an insulator, separating a conductive gate 110 from a Ge-based body 160.
• Germanium oxynitride in general, has a high dielectric constant, which means over approximately 4, which can result in germanium oxynitride having a high barrier, namely exhibiting high resistance, against charge tunneling.
• the standard gate dielectric material SiO 2 (dielectric constant of 3.9), does have such problems. Since the dielectric constant of germanium oxynitride is larger than that of SiO 2 , a germanium oxynitride layer which has the same capacitance per unit area as a SiO layer is thicker than the SiO layer. Since resistance against tunneling depends expo- nentially on layer thickness, the germanium oxynitride layer will tend to be the more charge penetration resistant.
• Fig. 5 depicting a Ge-based, or in a representative embodiment pure Ge, field effect device is almost symbolic, in that it is meant to represent any kind of field effect device.
• the only common denominator of such devices is that the device current is controlled by a gate 110 acting by its field across an insulator, the so called gate dielectric 100. Accordingly, every field effect device has a (at least one) gate, and a gate insulator.
• Fig. 5 depicts schematically an MOS field effect device, with the source/drain regions 150, device body 160.
• the body can be bulk, as shown on Fig. 5, or it can be a thin film on an insulator.
• the channel can be a single one, or multiple one, as on double gated, or FTNFET devices.
• the basic material of the device can be of a wide variety.
• the body can be a Ge compound, or consisting of essentially pure Ge.
• the Ge-based field effect device is a Ge MOS.
• the Ge-based field effect device has a germanium oxynitride layer gate dielectric which preferably has an EOT range between 0.5nm and 5nm.
• FIG. 6 shows a symbolic view of a high performance processor 900 containing at least one chip 901 which contains a Ge-based field effect device 10 having a thin germanium oxynitride gate dielectric, which has an EOT of less than 5nm.
• the processor 900 can be any processor which can benefit from the germanium oxynitride gate dielectric Ge-based field effect device. These devices can form part of the processor in their multitude on one or more chips 901.
• processors manufactured with the thin germanium oxynitride gate dielectric Ge-based field effect devices are digital processors, typically found in the central processing complex of computers; mixed digital/analog processors, which benefit significantly from the high mobility of the carriers in the germanium oxynitride gate dielectric field effect devices; and in general any communication processor, such as modules connecting memories to processors, routers, radar systems, high performance video- telephony, game modules, and others.

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