JP2007529894A - ダイ素子が積層された再構成可能なプロセッサモジュール - Google Patents
ダイ素子が積層された再構成可能なプロセッサモジュール Download PDFInfo
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- JP2007529894A JP2007529894A JP2007503893A JP2007503893A JP2007529894A JP 2007529894 A JP2007529894 A JP 2007529894A JP 2007503893 A JP2007503893 A JP 2007503893A JP 2007503893 A JP2007503893 A JP 2007503893A JP 2007529894 A JP2007529894 A JP 2007529894A
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- integrated circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/18—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Stored Programmes (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/802,067 US7126214B2 (en) | 2001-12-05 | 2004-03-16 | Reconfigurable processor module comprising hybrid stacked integrated circuit die elements |
| PCT/US2004/041791 WO2005094240A2 (en) | 2004-03-16 | 2004-12-14 | Reconfigurable processor module with stacked die elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007529894A true JP2007529894A (ja) | 2007-10-25 |
| JP2007529894A5 JP2007529894A5 (enExample) | 2008-01-31 |
Family
ID=35064225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007503893A Pending JP2007529894A (ja) | 2004-03-16 | 2004-12-14 | ダイ素子が積層された再構成可能なプロセッサモジュール |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7126214B2 (enExample) |
| EP (1) | EP1726042A4 (enExample) |
| JP (1) | JP2007529894A (enExample) |
| WO (1) | WO2005094240A2 (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010080870A (ja) * | 2008-09-29 | 2010-04-08 | National Institute Of Advanced Industrial Science & Technology | 再構成可能集積回路 |
| JP2013546275A (ja) * | 2010-11-17 | 2013-12-26 | ザイリンクス インコーポレイテッド | 通信用マルチチップモジュール |
| JP2015039155A (ja) * | 2013-08-19 | 2015-02-26 | 富士通株式会社 | 制御方法、演算装置、および制御プログラム |
| JP2016529702A (ja) * | 2013-07-16 | 2016-09-23 | クゥアルコム・インコーポレイテッドQualcomm Incorporated | モノリシック3次元(3d)集積回路(ic)(3dic)技術を使用した完全システムオンチップ(soc) |
Families Citing this family (342)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6627985B2 (en) * | 2001-12-05 | 2003-09-30 | Arbor Company Llp | Reconfigurable processor module comprising hybrid stacked integrated circuit die elements |
| US7673273B2 (en) | 2002-07-08 | 2010-03-02 | Tier Logic, Inc. | MPGA products based on a prototype FPGA |
| US7129744B2 (en) * | 2003-10-23 | 2006-10-31 | Viciciv Technology | Programmable interconnect structures |
| US6855988B2 (en) * | 2002-07-08 | 2005-02-15 | Viciciv Technology | Semiconductor switching devices |
| US7112994B2 (en) | 2002-07-08 | 2006-09-26 | Viciciv Technology | Three dimensional integrated circuits |
| US6992503B2 (en) | 2002-07-08 | 2006-01-31 | Viciciv Technology | Programmable devices with convertibility to customizable devices |
| US20040004251A1 (en) * | 2002-07-08 | 2004-01-08 | Madurawe Raminda U. | Insulated-gate field-effect thin film transistors |
| EP1530849B1 (en) * | 2002-08-29 | 2018-10-24 | Callahan Cellular L.L.C. | Reconfigurable compute engine interconnect fabric |
| US7812458B2 (en) * | 2007-11-19 | 2010-10-12 | Tier Logic, Inc. | Pad invariant FPGA and ASIC devices |
| US8643162B2 (en) | 2007-11-19 | 2014-02-04 | Raminda Udaya Madurawe | Pads and pin-outs in three dimensional integrated circuits |
| US8084866B2 (en) | 2003-12-10 | 2011-12-27 | Micron Technology, Inc. | Microelectronic devices and methods for filling vias in microelectronic devices |
| US7030651B2 (en) | 2003-12-04 | 2006-04-18 | Viciciv Technology | Programmable structured arrays |
| US7622951B2 (en) * | 2004-02-14 | 2009-11-24 | Tabula, Inc. | Via programmable gate array with offset direct connections |
| US7126381B1 (en) | 2004-02-14 | 2006-10-24 | Herman Schmit | VPA interconnect circuit |
| US7489164B2 (en) * | 2004-05-17 | 2009-02-10 | Raminda Udaya Madurawe | Multi-port memory devices |
| SG120200A1 (en) | 2004-08-27 | 2006-03-28 | Micron Technology Inc | Slanted vias for electrical circuits on circuit boards and other substrates |
| US7530044B2 (en) | 2004-11-04 | 2009-05-05 | Tabula, Inc. | Method for manufacturing a programmable system in package |
| US7301242B2 (en) | 2004-11-04 | 2007-11-27 | Tabula, Inc. | Programmable system in package |
| US8201124B1 (en) | 2005-03-15 | 2012-06-12 | Tabula, Inc. | System in package and method of creating system in package |
| US7795134B2 (en) | 2005-06-28 | 2010-09-14 | Micron Technology, Inc. | Conductive interconnect structures and formation methods using supercritical fluids |
| US7262134B2 (en) | 2005-09-01 | 2007-08-28 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
| US7863187B2 (en) * | 2005-09-01 | 2011-01-04 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
| US20070045120A1 (en) * | 2005-09-01 | 2007-03-01 | Micron Technology, Inc. | Methods and apparatus for filling features in microfeature workpieces |
| KR100713121B1 (ko) * | 2005-09-27 | 2007-05-02 | 한국전자통신연구원 | 칩과 이를 이용한 칩 스택 및 그 제조방법 |
| US7262633B1 (en) * | 2005-11-11 | 2007-08-28 | Tabula, Inc. | Via programmable gate array with offset bit lines |
| KR100662873B1 (ko) * | 2006-01-03 | 2007-01-02 | 삼성전자주식회사 | 루프가속기 및 이를 포함하는 데이터 처리 시스템 |
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| US20070290333A1 (en) * | 2006-06-16 | 2007-12-20 | Intel Corporation | Chip stack with a higher power chip on the outside of the stack |
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| KR20080046892A (ko) * | 2006-11-23 | 2008-05-28 | 삼성전자주식회사 | 액정표시장치와 그 제조방법 |
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Also Published As
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|---|---|
| US20040177237A1 (en) | 2004-09-09 |
| EP1726042A2 (en) | 2006-11-29 |
| WO2005094240A2 (en) | 2005-10-13 |
| US20060195729A1 (en) | 2006-08-31 |
| US7282951B2 (en) | 2007-10-16 |
| US7126214B2 (en) | 2006-10-24 |
| WO2005094240A3 (en) | 2006-07-27 |
| EP1726042A4 (en) | 2009-04-15 |
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