JP2007510343A5 - - Google Patents
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- JP2007510343A5 JP2007510343A5 JP2006537280A JP2006537280A JP2007510343A5 JP 2007510343 A5 JP2007510343 A5 JP 2007510343A5 JP 2006537280 A JP2006537280 A JP 2006537280A JP 2006537280 A JP2006537280 A JP 2006537280A JP 2007510343 A5 JP2007510343 A5 JP 2007510343A5
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- JP
- Japan
- Prior art keywords
- circuit
- segment
- emphasis
- segments
- signal path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 230000003111 delayed effect Effects 0.000 claims 7
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/697,514 US7187206B2 (en) | 2003-10-30 | 2003-10-30 | Power savings in serial link transmitters |
| PCT/EP2004/052589 WO2005050936A1 (en) | 2003-10-30 | 2004-10-20 | Power savings in serial link transmitters |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007510343A JP2007510343A (ja) | 2007-04-19 |
| JP2007510343A5 true JP2007510343A5 (https=) | 2009-07-02 |
| JP4435170B2 JP4435170B2 (ja) | 2010-03-17 |
Family
ID=34573253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006537280A Expired - Fee Related JP4435170B2 (ja) | 2003-10-30 | 2004-10-20 | シリアルリンクトランスミッタにおける節電 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7187206B2 (https=) |
| EP (1) | EP1692831B1 (https=) |
| JP (1) | JP4435170B2 (https=) |
| CN (1) | CN1875592A (https=) |
| AT (1) | ATE454779T1 (https=) |
| DE (1) | DE602004025034D1 (https=) |
| WO (1) | WO2005050936A1 (https=) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7756197B1 (en) * | 2003-11-26 | 2010-07-13 | Pmc-Sierra, Inc. | Built in self test (BIST) for high-speed serial transceivers |
| US7342983B2 (en) * | 2004-02-24 | 2008-03-11 | Agere Systems, Inc. | Apparatus and method for digitally filtering spurious transitions on a digital signal |
| JP4756965B2 (ja) * | 2005-09-13 | 2011-08-24 | ルネサスエレクトロニクス株式会社 | 出力バッファ回路 |
| JP4788900B2 (ja) * | 2006-03-30 | 2011-10-05 | 日本電気株式会社 | Cml回路及びそれを用いたクロック分配回路 |
| JP5268412B2 (ja) * | 2008-04-22 | 2013-08-21 | 株式会社日立製作所 | 出力ドライバ回路装置 |
| JP2012253404A (ja) * | 2011-05-31 | 2012-12-20 | Renesas Electronics Corp | 半導体装置 |
| US8736306B2 (en) | 2011-08-04 | 2014-05-27 | Micron Technology, Inc. | Apparatuses and methods of communicating differential serial signals including charge injection |
| US8847628B1 (en) * | 2012-09-29 | 2014-09-30 | Integrated Device Technology Inc. | Current mode logic circuits with automatic sink current adjustment |
| US9231796B2 (en) | 2013-11-25 | 2016-01-05 | Globalfoundries Inc. | Power aware equalization in a serial communications link |
| US10680640B2 (en) * | 2016-12-21 | 2020-06-09 | Cirrus Logic, Inc. | Power-saving current-mode digital-to-analog converter (DAC) |
| US10972318B2 (en) * | 2018-10-31 | 2021-04-06 | Hughes Network Systems, Llc | Data stream processing device with reconfigurable data stream processing resources and data stream processing method |
| CN114759937B (zh) * | 2022-04-15 | 2023-08-22 | 中国人民解放军国防科技大学 | 一种合路器与驱动器融合的串口发射机 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE796751A (fr) | 1973-12-07 | 1973-09-14 | Sherman Stanley A | Filtre non lineaire |
| JPS6276316A (ja) | 1985-09-27 | 1987-04-08 | Victor Co Of Japan Ltd | デジタル・フイルタ |
| US5020078A (en) | 1989-08-11 | 1991-05-28 | Bell Communications Research, Inc. | Baudrate timing recovery technique |
| US5285116A (en) | 1990-08-28 | 1994-02-08 | Mips Computer Systems, Inc. | Low-noise high-speed output buffer and method for controlling same |
| JP3001014B2 (ja) | 1991-03-13 | 2000-01-17 | 富士通株式会社 | バイアス電圧発生回路 |
| US5452466A (en) | 1993-05-11 | 1995-09-19 | Teknekron Communications Systems, Inc. | Method and apparatus for preforming DCT and IDCT transforms on data signals with a preprocessor, a post-processor, and a controllable shuffle-exchange unit connected between the pre-processor and post-processor |
| US5479124A (en) | 1993-08-20 | 1995-12-26 | Nexgen Microsystems | Slew rate controller for high speed bus |
| GB2289808A (en) | 1994-05-19 | 1995-11-29 | Motorola Gmbh | CMOS driver with programmable switching speed |
| US5627487A (en) * | 1995-06-28 | 1997-05-06 | Micron Technology, Inc. | Charge conserving driver circuit for capacitive loads |
| US5862390A (en) | 1996-03-15 | 1999-01-19 | S3 Incorporated | Mixed voltage, multi-rail, high drive, low noise, adjustable slew rate input/output buffer |
| US6084907A (en) | 1996-12-09 | 2000-07-04 | Matsushita Electric Industrial Co., Ltd. | Adaptive auto equalizer |
| US5838177A (en) * | 1997-01-06 | 1998-11-17 | Micron Technology, Inc. | Adjustable output driver circuit having parallel pull-up and pull-down elements |
| US6294947B1 (en) | 1998-05-29 | 2001-09-25 | Agere Systems Guradian Corp. | Asymmetrical current steering output driver with compact dimensions |
| US6356606B1 (en) | 1998-07-31 | 2002-03-12 | Lucent Technologies Inc. | Device and method for limiting peaks of a signal |
| US6114844A (en) | 1999-05-28 | 2000-09-05 | Kendin Communications, Inc. | Universal output driver and filter |
| US6256235B1 (en) * | 2000-06-23 | 2001-07-03 | Micron Technology, Inc. | Adjustable driver pre-equalization for memory subsystems |
| US6456142B1 (en) | 2000-11-28 | 2002-09-24 | Analog Devices, Inc. | Circuit having dual feedback multipliers |
| US6999540B2 (en) | 2000-12-29 | 2006-02-14 | International Business Machines Corporation | Programmable driver/equalizer with alterable analog finite impulse response (FIR) filter having low intersymbol interference and constant peak amplitude independent of coefficient settings |
| US6288581B1 (en) | 2001-01-05 | 2001-09-11 | Pericom Semiconductor Corp. | Low-voltage differential-signalling output buffer with pre-emphasis |
| US6507225B2 (en) | 2001-04-16 | 2003-01-14 | Intel Corporation | Current mode driver with variable equalization |
| US20020153954A1 (en) | 2001-04-24 | 2002-10-24 | Hochschild James R. | Common-mode feedback circuit |
| US20020177266A1 (en) | 2001-05-24 | 2002-11-28 | Christian Klein | Selectable output edge rate control |
| US6597233B2 (en) * | 2001-05-25 | 2003-07-22 | International Business Machines Corporation | Differential SCSI driver rise time and amplitude control circuit |
-
2003
- 2003-10-30 US US10/697,514 patent/US7187206B2/en not_active Expired - Fee Related
-
2004
- 2004-10-20 DE DE602004025034T patent/DE602004025034D1/de not_active Expired - Lifetime
- 2004-10-20 CN CNA2004800318451A patent/CN1875592A/zh active Pending
- 2004-10-20 AT AT04791261T patent/ATE454779T1/de not_active IP Right Cessation
- 2004-10-20 JP JP2006537280A patent/JP4435170B2/ja not_active Expired - Fee Related
- 2004-10-20 EP EP04791261A patent/EP1692831B1/en not_active Expired - Lifetime
- 2004-10-20 WO PCT/EP2004/052589 patent/WO2005050936A1/en not_active Ceased
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