JP2007508701A5 - - Google Patents

Download PDF

Info

Publication number
JP2007508701A5
JP2007508701A5 JP2006534426A JP2006534426A JP2007508701A5 JP 2007508701 A5 JP2007508701 A5 JP 2007508701A5 JP 2006534426 A JP2006534426 A JP 2006534426A JP 2006534426 A JP2006534426 A JP 2006534426A JP 2007508701 A5 JP2007508701 A5 JP 2007508701A5
Authority
JP
Japan
Prior art keywords
power
robust
generating
routing
determining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006534426A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007508701A (ja
JP4456606B2 (ja
Filing date
Publication date
Priority claimed from US10/605,569 external-priority patent/US6861753B1/en
Application filed filed Critical
Publication of JP2007508701A publication Critical patent/JP2007508701A/ja
Publication of JP2007508701A5 publication Critical patent/JP2007508701A5/ja
Application granted granted Critical
Publication of JP4456606B2 publication Critical patent/JP4456606B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2006534426A 2003-10-09 2004-10-08 集積回路チップ内のボルテージアイランド上で電力ルーティングを行なうための方法、コンピュータープログラム、およびシステム Expired - Fee Related JP4456606B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/605,569 US6861753B1 (en) 2003-10-09 2003-10-09 Method and apparatus for performing power routing on a voltage island within an integrated circuit chip
PCT/US2004/033384 WO2005036606A2 (en) 2003-10-09 2004-10-08 Method and apparatus for performing power routing on a voltage island within an integrated circuit chip

Publications (3)

Publication Number Publication Date
JP2007508701A JP2007508701A (ja) 2007-04-05
JP2007508701A5 true JP2007508701A5 (enExample) 2007-11-08
JP4456606B2 JP4456606B2 (ja) 2010-04-28

Family

ID=34193454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006534426A Expired - Fee Related JP4456606B2 (ja) 2003-10-09 2004-10-08 集積回路チップ内のボルテージアイランド上で電力ルーティングを行なうための方法、コンピュータープログラム、およびシステム

Country Status (6)

Country Link
US (2) US6861753B1 (enExample)
EP (1) EP1671339A4 (enExample)
JP (1) JP4456606B2 (enExample)
KR (1) KR100850414B1 (enExample)
CN (1) CN100429664C (enExample)
WO (1) WO2005036606A2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7984398B1 (en) * 2004-07-19 2011-07-19 Synopsys, Inc. Automated multiple voltage/power state design process and chip description system
EP1638145A1 (en) * 2004-09-20 2006-03-22 Infineon Technologies AG Embedded switchable power ring
WO2006062505A1 (en) * 2004-12-06 2006-06-15 Bae Systems Information And Electronic Systems Integration Inc. Asic device with multiple power supply voltages
DE102005009163B4 (de) * 2005-02-25 2013-08-14 Infineon Technologies Ag Halbleiterbauteil mit einem Halbleiterchip, der Signalkontaktflächen und Versorgungskontaktflächen aufweist, sowie Verfahren zur Herstellung des Halbleiterbauteils
JP5528662B2 (ja) * 2007-09-18 2014-06-25 ソニー株式会社 半導体集積回路
TWI445150B (zh) * 2007-11-15 2014-07-11 Realtek Semiconductor Corp 電源供應網之規劃方法
US8161446B2 (en) * 2008-09-23 2012-04-17 Qualcomm Incorporated System and method of connecting a macro cell to a system power supply
US8407635B2 (en) * 2011-01-31 2013-03-26 Cadence Design Systems, Inc. System and method for automatic extraction of power intent from custom analog/custom digital/mixed signal schematic designs
CN102902347B (zh) * 2012-09-28 2015-08-19 宁波大学 一种片上系统的低功耗电压岛划分方法
CN103077278B (zh) * 2013-01-06 2015-11-18 宁波大学 一种片上系统的电压岛供电引脚分配方法
KR101538458B1 (ko) 2014-01-03 2015-07-23 연세대학교 산학협력단 3차원 매니코어 프로세서를 위한 전압섬 형성 방법
US10318694B2 (en) 2016-11-18 2019-06-11 Qualcomm Incorporated Adaptive multi-tier power distribution grids for integrated circuits
US10366199B2 (en) * 2017-04-11 2019-07-30 Qualcomm Incorporated Cell-based power grid (PG) architecture
US10235491B2 (en) * 2017-05-17 2019-03-19 International Business Machines Corporation Dynamic route keep-out in printed circuit board design
US10629533B2 (en) * 2018-03-13 2020-04-21 Toshiba Memory Corporation Power island segmentation for selective bond-out
CN111368493B (zh) * 2018-12-26 2023-03-14 杭州广立微电子股份有限公司 一种基于稀疏网格的自动版图布线生成方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6792582B1 (en) * 2000-11-15 2004-09-14 International Business Machines Corporation Concurrent logical and physical construction of voltage islands for mixed supply voltage designs
US6598206B2 (en) * 2001-05-10 2003-07-22 International Business Machines Corporation Method and system of modifying integrated circuit power rails
US6523150B1 (en) * 2001-09-28 2003-02-18 International Business Machines Corporation Method of designing a voltage partitioned wirebond package
US6493859B1 (en) 2001-10-01 2002-12-10 International Business Machines Corporation Method of wiring power service terminals to a power network in a semiconductor integrated circuit
US6538314B1 (en) * 2002-03-29 2003-03-25 International Business Machines Corporation Power grid wiring for semiconductor devices having voltage islands
US6820240B2 (en) * 2002-09-25 2004-11-16 International Business Machines Corporation Voltage island chip implementation
US6779163B2 (en) * 2002-09-25 2004-08-17 International Business Machines Corporation Voltage island design planning

Similar Documents

Publication Publication Date Title
JP2007508701A5 (enExample)
CN105740510B (zh) 基于网格-密度-关系的疏散人群行为仿真系统及其方法
JP2012518839A5 (enExample)
CN102903037A (zh) 配送中心选址的方法
WO2016169286A1 (zh) 一种离散制造系统的车间布局方法
DK1550085T3 (da) Fremgangsmåde til generering af en computerlæsbar model
CN100517346C (zh) 一种最优路径的寻径方法
CN102036484B (zh) 电路板排版方法、装置及电路板模板
CN109522651A (zh) 一种基于静态场和有偏行走的人群疏散模拟方法
EP1235164A3 (en) Method and apparatus for scalable interconnect solution
CN114329860B (zh) 道路规划方法、装置、存储介质及处理器
JP2008517467A5 (enExample)
JP2002334933A5 (enExample)
CN110909961A (zh) 基于bim的室内路径查询方法及装置
CN104899329A (zh) 一种采用最小外矩形框进行宗地四至查找的方法
CN105910614A (zh) 一种健康型的虚拟现实的步行导航方法与系统
CN109963254A (zh) 一种基于室内地图的蓝牙定位信标部署方法
RU2005115916A (ru) Выравнивание в списках, сформированных по шаблону
DE602006001465D1 (de) Verfahren und vorrichtung zur bestimmung einer route mit orten von interesse
CN101702169B (zh) 用于数字岸线演变分析的正交断面方法
CN117633964A (zh) 一种基于多智能体的城市开放空间自动设计方法与系统
CN106023317B (zh) 一种用于大数据测试的加权Voronoi图生成方法
CN106504129A (zh) 一种数据库建设方法及装置
CN109658513A (zh) 一种城市建筑能耗模型的简化方法
CN107392438A (zh) 一种公共交通便利指数的确定系统和方法