JP2007221125A - 導電素子を誘電体層に埋め込む方法およびプロセス - Google Patents
導電素子を誘電体層に埋め込む方法およびプロセス Download PDFInfo
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- JP2007221125A JP2007221125A JP2007029985A JP2007029985A JP2007221125A JP 2007221125 A JP2007221125 A JP 2007221125A JP 2007029985 A JP2007029985 A JP 2007029985A JP 2007029985 A JP2007029985 A JP 2007029985A JP 2007221125 A JP2007221125 A JP 2007221125A
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- 238000000034 method Methods 0.000 title claims abstract description 111
- 239000000758 substrate Substances 0.000 claims description 76
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 23
- 229920002120 photoresistant polymer Polymers 0.000 claims description 20
- 229910052802 copper Inorganic materials 0.000 claims description 17
- 239000010949 copper Substances 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 13
- 239000004020 conductor Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 12
- 238000009713 electroplating Methods 0.000 claims description 10
- 238000003825 pressing Methods 0.000 claims description 8
- 238000005553 drilling Methods 0.000 claims description 7
- 239000000853 adhesive Substances 0.000 claims description 6
- 230000001070 adhesive effect Effects 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 4
- 238000004146 energy storage Methods 0.000 claims description 2
- 239000000843 powder Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 14
- 238000012545 processing Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 195
- 238000007747 plating Methods 0.000 description 16
- 239000011347 resin Substances 0.000 description 11
- 229920005989 resin Polymers 0.000 description 11
- 230000001680 brushing effect Effects 0.000 description 7
- 239000011889 copper foil Substances 0.000 description 6
- 239000003365 glass fiber Substances 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 238000003475 lamination Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- WSFSSNUMVMOOMR-UHFFFAOYSA-N Formaldehyde Chemical compound O=C WSFSSNUMVMOOMR-UHFFFAOYSA-N 0.000 description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 238000001311 chemical methods and process Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 229920001940 conductive polymer Polymers 0.000 description 3
- 238000004070 electrodeposition Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 239000011133 lead Substances 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 238000010899 nucleation Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 239000011135 tin Substances 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- JYLNVJYYQQXNEK-UHFFFAOYSA-N 3-amino-2-(4-chlorophenyl)-1-propanesulfonic acid Chemical compound OS(=O)(=O)CC(CN)C1=CC=C(Cl)C=C1 JYLNVJYYQQXNEK-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- 239000003638 chemical reducing agent Substances 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 description 1
- FEWJPZIEWOKRBE-JCYAYHJZSA-N Dextrotartaric acid Chemical compound OC(=O)[C@H](O)[C@@H](O)C(O)=O FEWJPZIEWOKRBE-JCYAYHJZSA-N 0.000 description 1
- KCXVZYZYPLLWCC-UHFFFAOYSA-N EDTA Chemical compound OC(=O)CN(CC(O)=O)CCN(CC(O)=O)CC(O)=O KCXVZYZYPLLWCC-UHFFFAOYSA-N 0.000 description 1
- 229910002677 Pd–Sn Inorganic materials 0.000 description 1
- 101150080148 RR10 gene Proteins 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011152 fibreglass Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- ZMLDXWLZKKZVSS-UHFFFAOYSA-N palladium tin Chemical compound [Pd].[Sn] ZMLDXWLZKKZVSS-UHFFFAOYSA-N 0.000 description 1
- ACVYVLVWPXVTIT-UHFFFAOYSA-M phosphinate Chemical compound [O-][PH2]=O ACVYVLVWPXVTIT-UHFFFAOYSA-M 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 239000008262 pumice Substances 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000012783 reinforcing fiber Substances 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229940095064 tartrate Drugs 0.000 description 1
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
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- H05K2203/05—Patterning and lithography; Masks; Details of resist
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- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
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- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
- Y10T29/49135—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting and shaping, e.g., cutting or bending, etc.
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49149—Assembling terminal to base by metal fusion bonding
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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Abstract
【解決手段】プリント回路基板の層の製造の一部として形成される埋め込み型の導電素子を具える多層プリント回路基板の製造方法である。その後絶縁層と導電層を導電素子の上にプレスして、導電素子が導電層の面上に突出するようにする。加工プロセスを適用してこれらの突出部を除去して埋め込まれた導電素子を除去する。導電層の表面の上に導電アンダーコートを適用して、第2の回路パターンがこの導電アンダーコートの上に形成される。
【選択図】図10
Description
Claims (24)
- 多層プリント回路基板に導電素子を形成する方法であって:
第1の面を具える第1の基板を設けるステップと;
前記第1の基板の第1の面上に第1の導電回路パターンを形成するステップと;
前記第1の面上に第1の導電素子を形成するステップと;
前記第1の基板の第1の面、前記第1の導電回路パターン、および第1の導電素子の上に、第1の絶縁層と第1の導電層を、前記第1の絶縁層が前記第1の面に近接するよう形成するステップと;
前記第1の絶縁層の一部と前記第1の導電層の一部を除去して、前記第1の導電素子、前記第1の導電層、第2の面を規定する露出した第1の導電素子のいずれか1面以上を露出させるステップと;
前記第2の面の上に第1の導電アンダーコート層を形成するステップとを具える方法。 - 請求項1の方法において、第1の導電層と第1の導電素子との間に電気接続が形成されている方法。
- 請求項1の方法がさらに:
前記第1の導電素子に孔を穿孔するステップを具える方法。 - 請求項1の方法がさらに:
前記第1の導電アンダーコートの上に第2の導電回路パターンを形成するステップと;
前記第1の導電素子を、前記第1の導電回路パターンまたは第2の導電回路パターンの少なくとも一方に電気的に接続するステップとを具える方法。 - 請求項1の方法がさらに:
前記第1の面の上に、前記第1の導電素子が形成される箇所に開口が規定されたフォトレジスト層を設けるステップと;
前記第1の導電素子が形成された後に前記フォトレジスト層を除去するステップとを具える方法。 - 請求項1の方法がさらに、前記第1の絶縁層と前記第1の導電層は、
前記第1の絶縁層と前記第1の導電層を前記第1の基板の第1の面にプレスすることにより、前記第1の基板の第1の面上に形成され、これによりほぼ同じ圧力が前記第1の導電素子と第1の面に等しく加えられ、前記第1の導電素子が前記第1の絶縁層と前記第1の導電層の上に突出部を形成することを特徴とする方法。 - 請求項1の方法がさらに、前記第1の絶縁層と前記第1の導電層は、
前記第1の絶縁層と前記第1の基板の第1の面上でプレスして、これにより前記第1の導電素子に前記第1の面とほぼ等しい圧力が加わり、前記第1の絶縁層は第1の露出面を具え;
前記第1の露出面に導電材料を設けて前記第1の導電層を作成することにより、前記第1の基板の第1の面上に形成されることを特徴とする方法。 - 請求項1の方法がさらに、第1の基板が前記第1の面と反対側の第3の面を有し、さらに:
前記第3の面の上に第2の導電回路パターンを形成するステップと;
前記第2の面の上に、前記第3の面上の第2の導電回路パターンの高さより高い第2の導電素子を形成するステップと;
前記第1の基板の第3の面、前記第2の導電回路パターン、および前記第2の導電素子の上に、第2の絶縁層と第2の導電層を、前記第2の絶縁層が前記第3の面に近接するように形成するステップと;
前記第2の絶縁層の一部と前記第2の導電層の一部とを除去して、前記第2の導電素子、前記第2の導電層、第4の面を規定する露出した第2の導電素子のいずれか1面以上を露出させるステップと;
前記第4の面の上に第2の導電アンダーコート層を形成するステップとを具える方法。 - 請求項8の方法において、前記第1および第2の導電素子は、対向する第1および第3の面に同時に形成されることを特徴とする方法。
- 請求項1の方法はさらに:
前記第1の導電素子を上または下のいずれか1以上の電気回路、あるいは前記第1の導電素子のいずれかの端部に電気的に接続するステップを具える方法。 - 請求項1の方法において、前記第1の導電素子は、電磁気シールドとして、あるいはエネルギ保存デバイスとして動作するよう構成されていることを特徴とする方法。
- 請求項1の方法において、前記第1の導電素子は、導電性の金属、導電性の粘着剤、導電性のペーストのいずれか1以上を含むことを特徴とする方法。
- 請求項1の方法がさらに:
複数の導電素子を前記第1の面上に同時に形成し、前記複数の導電素子の少なくとも2つが異なる形状であることを特徴とする方法。 - 請求項13の方法において、前記第1の導電素子は、長円形、長方形、正方形、L字形、T字形、十字形のいずれかの形状に形成されることを特徴とする方法。
- 請求項1の方法において、第1の導電回路パターンは、フレキシブル回路、プリント回路、金属プリント回路、またはこれらの組合せのいずれかであることを特徴とする方法。
- 請求項1の方法において、前記第1の導電素子は、金属の電気メッキ、導電性の粘着剤の堆積、または電気メッキの後に導電素子をエッチング、のいずれかにより形成されることを特徴とする方法。
- 請求項1の方法において、前記第1の導電素子は、前記第1の絶縁層と第1の導電層を合わせた厚さより高い粉とを特徴とする方法。
- 多層プリント回路基板の層間に埋め込まれた導電素子を形成する方法であって:
第1の面を有する第1の基板を設けるステップと;
前記第1の面に感光材料の第1の層を堆積させるステップと;
前記感光材料の一部を露光して1またはそれ以上の開口を形成するステップと;
前記第1の層の開口に導電素子を形成するステップと;
残りの前記第1の層を除去して前記導電素子の1以上を露出させるステップと;
前記導電素子の上および周囲に誘電層を形成するステップとを具える方法。 - 請求項18の方法がさらに:
前記導電素子の上面を平削りして1またはそれ以上の導電素子の面を露出させるステップを具える方法。 - 請求項18の方法がさらに:
前記誘電層の上面に導電層を追加するステップと;
前記銅得電素子の上面を、前記導電層の上面まで平削りして1またはそれ以上の前記導電素子の面を露出させるステップとを具える方法。 - 請求項18の方法において、少なくとも1の導電素子が前記平削りの後に前記誘電層の下に露出されずに残っていることを特徴とする方法。
- 請求項18の方法において、前記導電素子は電気メッキにより形成されることを特徴とする方法。
- 多層回路基板であって:
第1の面を具える第1の基板と;
前記第1の基板の第1の面上に形成された第1の導電回路パターンと;
第1の基板の第1の面上に形成された第1の導電素子と;
前記第1の基板の第1の面の上に、前記導電回路パターンを覆って形成され、前記第1の導電素子を包み込む第1の絶縁層と;
前記第1の導電素子の1面以上が前記第1の絶縁層から露出していることを特徴とする多層回路基板。 - 請求項23の多層回路基板がさらに:
前記第1の絶縁層の上に形成された第2の導電回路パターンを具え、前記第1の導電素子が前記第1の導電回路パターンと前記第2の導電回路パターンに相互接続していることを特徴とする多層回路基板。
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US11/353,725 US7631423B2 (en) | 2006-02-13 | 2006-02-13 | Method and process for embedding electrically conductive elements in a dielectric layer |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008039925A1 (de) | 2007-08-28 | 2009-04-02 | Denso Corp., Kariya-shi | Reifendruckerfassungsvorrichtung zum selektiven Betrieb ausgewählter Transceiver |
JP2013247356A (ja) * | 2012-05-29 | 2013-12-09 | Zhuhai Advanced Chip Carriers & Electronic Substrates Solutions Technologies Co Ltd | 異なる寸法を有するビアを備えた多層電子構造体 |
JP2015216358A (ja) * | 2014-05-09 | 2015-12-03 | 律勝科技股▼分▲有限公司 | 回路基板及び多層回路基板 |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7776741B2 (en) * | 2008-08-18 | 2010-08-17 | Novellus Systems, Inc. | Process for through silicon via filing |
CN101770957B (zh) * | 2008-12-31 | 2011-09-07 | 欣兴电子股份有限公司 | 线路基板工艺 |
CN101896038B (zh) * | 2009-05-21 | 2012-08-08 | 南亚电路板股份有限公司 | 电路板结构及其制造方法 |
CN101958306B (zh) * | 2009-07-14 | 2012-08-29 | 日月光半导体制造股份有限公司 | 内埋线路基板的制造方法 |
US8198547B2 (en) | 2009-07-23 | 2012-06-12 | Lexmark International, Inc. | Z-directed pass-through components for printed circuit boards |
US10472730B2 (en) | 2009-10-12 | 2019-11-12 | Novellus Systems, Inc. | Electrolyte concentration control system for high rate electroplating |
CN102104007B (zh) * | 2009-12-21 | 2013-04-17 | 北大方正集团有限公司 | 一种特种电路板的制造方法和设备 |
US20120186080A1 (en) * | 2011-01-26 | 2012-07-26 | S.D. Warren Company | Creating conductivized traces for use in electronic devices |
US8943684B2 (en) | 2011-08-31 | 2015-02-03 | Lexmark International, Inc. | Continuous extrusion process for manufacturing a Z-directed component for a printed circuit board |
US8790520B2 (en) * | 2011-08-31 | 2014-07-29 | Lexmark International, Inc. | Die press process for manufacturing a Z-directed component for a printed circuit board |
US20130341078A1 (en) | 2012-06-20 | 2013-12-26 | Keith Bryan Hardin | Z-directed printed circuit board components having a removable end portion and methods therefor |
CN103517583B (zh) | 2012-06-27 | 2016-09-28 | 富葵精密组件(深圳)有限公司 | 多层电路板及其制作方法 |
KR20140067723A (ko) * | 2012-11-27 | 2014-06-05 | 삼성전기주식회사 | 절연층 도통방법 |
US9653370B2 (en) | 2012-11-30 | 2017-05-16 | Infineon Technologies Austria Ag | Systems and methods for embedding devices in printed circuit board structures |
TWI558276B (zh) * | 2012-12-27 | 2016-11-11 | 鴻海精密工業股份有限公司 | 電路板 |
MY181637A (en) | 2016-03-31 | 2020-12-30 | Qdos Flexcircuits Sdn Bhd | Single layer integrated circuit package |
US10692735B2 (en) | 2017-07-28 | 2020-06-23 | Lam Research Corporation | Electro-oxidative metal removal in through mask interconnect fabrication |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005045163A (ja) * | 2003-07-25 | 2005-02-17 | Toppan Printing Co Ltd | 多層回路板の製造方法 |
JP2006012870A (ja) * | 2004-06-22 | 2006-01-12 | Satoshi Ishiguro | スタックビア構造多層配線基板の製造方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2650471B1 (fr) | 1989-07-27 | 1991-10-11 | Bull Sa | Procede de formation de piliers du reseau multicouche d'une carte de connexion d'au moins un circuit integre de haute densite |
US5079069A (en) | 1989-08-23 | 1992-01-07 | Zycon Corporation | Capacitor laminate for use in capacitive printed circuit boards and methods of manufacture |
US5155655A (en) | 1989-08-23 | 1992-10-13 | Zycon Corporation | Capacitor laminate for use in capacitive printed circuit boards and methods of manufacture |
KR930010063B1 (ko) | 1990-03-19 | 1993-10-14 | 가부시끼가이샤 히다찌세이사꾸쇼 | 다층배선기판 및 그 제조 방법 |
CA2109687A1 (en) | 1993-01-26 | 1995-05-23 | Walter Schmidt | Method for the through plating of conductor foils |
US5736681A (en) | 1993-09-03 | 1998-04-07 | Kabushiki Kaisha Toshiba | Printed wiring board having an interconnection penetrating an insulating layer |
US6025995A (en) * | 1997-11-05 | 2000-02-15 | Ericsson Inc. | Integrated circuit module and method |
US6063647A (en) | 1997-12-08 | 2000-05-16 | 3M Innovative Properties Company | Method for making circuit elements for a z-axis interconnect |
US6713685B1 (en) | 1998-09-10 | 2004-03-30 | Viasystems Group, Inc. | Non-circular micro-via |
JP3183653B2 (ja) * | 1999-08-26 | 2001-07-09 | ソニーケミカル株式会社 | フレキシブル基板 |
JP4322402B2 (ja) | 2000-06-22 | 2009-09-02 | 大日本印刷株式会社 | プリント配線基板及びその製造方法 |
JP2002374068A (ja) | 2001-06-14 | 2002-12-26 | Kyocera Chemical Corp | 多層プリント配線板の製造方法 |
JP2003051678A (ja) | 2001-08-03 | 2003-02-21 | Kyocera Chemical Corp | 多層プリント配線板および多層プリント配線板の製造方法 |
US20030064325A1 (en) | 2001-10-03 | 2003-04-03 | Unitech Printed Circuit Board Corp. | Method of manufacturing printed circuit board having wiring layers electrically connected via solid cylindrical copper interconnecting bodies |
KR100462835B1 (ko) | 2002-10-24 | 2004-12-23 | 대덕전자 주식회사 | 금속 범프를 이용한 인쇄 회로 기판 제조 방법 |
US7320173B2 (en) | 2003-02-06 | 2008-01-22 | Lg Electronics Inc. | Method for interconnecting multi-layer printed circuit board |
-
2006
- 2006-02-13 US US11/353,725 patent/US7631423B2/en active Active
-
2007
- 2007-02-06 SG SG200700819-6A patent/SG135106A1/en unknown
- 2007-02-09 JP JP2007029985A patent/JP5213094B2/ja not_active Expired - Fee Related
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- 2007-02-12 TW TW096105048A patent/TWI531289B/zh not_active IP Right Cessation
- 2007-02-12 KR KR1020070014388A patent/KR101062095B1/ko active IP Right Grant
- 2007-02-13 CN CN2007100792528A patent/CN101022703B/zh not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005045163A (ja) * | 2003-07-25 | 2005-02-17 | Toppan Printing Co Ltd | 多層回路板の製造方法 |
JP2006012870A (ja) * | 2004-06-22 | 2006-01-12 | Satoshi Ishiguro | スタックビア構造多層配線基板の製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008039925A1 (de) | 2007-08-28 | 2009-04-02 | Denso Corp., Kariya-shi | Reifendruckerfassungsvorrichtung zum selektiven Betrieb ausgewählter Transceiver |
JP2013247356A (ja) * | 2012-05-29 | 2013-12-09 | Zhuhai Advanced Chip Carriers & Electronic Substrates Solutions Technologies Co Ltd | 異なる寸法を有するビアを備えた多層電子構造体 |
JP2015216358A (ja) * | 2014-05-09 | 2015-12-03 | 律勝科技股▼分▲有限公司 | 回路基板及び多層回路基板 |
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JP5213094B2 (ja) | 2013-06-19 |
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TW200803675A (en) | 2008-01-01 |
KR20070081770A (ko) | 2007-08-17 |
TWI531289B (zh) | 2016-04-21 |
RU2007105901A (ru) | 2008-08-20 |
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US20070187237A1 (en) | 2007-08-16 |
US7631423B2 (en) | 2009-12-15 |
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