JP2007173775A - Circuit board structure and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board structure and its manufacturing method. <P>SOLUTION: A carrier board is prepared, and then an insulating protective layer is formed over the carrier board, and then a plurality of openings are formed in the insulating protective layer to expose the carrier board. Then, a circuit structure is formed on the surface of the insulating protective layer and the openings, and further a dielectric layer is formed over the insulating protective layer and the circuit structure. Then a plurality of openings are formed in the dielectric layer to expose a part of the circuit structure, and then the carrier board is removed to form a coreless circuit board; thereby, the thickness of the circuit board is made smaller, and contribution can be made to the reduction in the size and improvement in the performance of a package product, and further, can cope with the requirement of miniaturization of electronic apparatuses. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a circuit board structure and a manufacturing method thereof, and more particularly to a coreless circuit board structure and a manufacturing method thereof.

With the progress of semiconductor package technology, various package forms have been developed for semiconductor devices. As a conventional semiconductor device, for example, a semiconductor element of an integrated circuit is mainly attached to a package substrate or a lead frame,
A semiconductor element is electrically connected to the package substrate or the lead frame, and further packaging is performed with a resin.

Among these, ball grid array (BGA) packages such as PBGA (Plastic Ball Grid Array), EBGA (Enhanced Ball Grid Array), and FCBGA (Flip Chip Ball Grid Array) are leading-edge technologies for semiconductor packages. As a feature, a plurality of solder balls arranged in a grid pattern on the back surface of the package substrate are mounted using a self-alignment technology by mounting a semiconductor element using a single package substrate. Demand for highly integrated semiconductor chips by allowing more I / O connections to be accommodated on a carrier board of semiconductor elements of the same unit area. In response, the entire package unit is soldered with these solder balls and electrically connected to an external device.

Also, in order to meet the demand for high-efficiency chip operations such as microprocessors, chip sets, graphic chips, etc., even for wired circuit boards, functions such as chip signal transmission, frequency band improvement, resistance control are improved Therefore, it is necessary to realize the development of high I / O number package members. However, in order to cope with the development trend of downsizing, multi-function, high speed and high frequency of semiconductor packages, circuit boards for semiconductor chip packages have been developed in the direction of finer circuits and smaller hole diameters. The current circuit board manufacturing process has been reduced from the conventional 100μm circuit size to 30μm, including line width, space between lines, aspect ratio, etc., and higher circuit accuracy Research and development are being conducted with the goal of obtaining

  In order to improve the wiring accuracy of circuit boards for semiconductor chip packages, the industry has developed a build-up technology. This is because a plurality of dielectric layers and circuit layers are alternately laminated on the surface of a core circuit board using a build-up technology, and conductive vias are provided in the dielectric layers. The upper and lower circuit layers can be electrically connected to each other. This build-up process is a factor that affects the circuit density of the circuit board.

  1A to 1H show a conventional method for manufacturing a build-up circuit board. First, as shown in FIG. 1-A, for example, an insulating layer 100 made of resin-coated copper foil (RCC) and having a thin metal layer is prepared, and a plurality of through holes 102 are formed therein. Has been.

As shown in FIG. 1-B, a metal layer 103 is formed on the surface of the insulating layer 100 and the hole wall of the through hole 102 by copper plating.
As shown in FIG. 1-C, a conductive or non-conductive plug material 11 (for example, an insulating ink or a copper-containing conductive paste) is filled to fill the voids of the through-holes 102, so that plating through holes ( PTH) 102a is formed to electrically connect the metal layers 103 on the upper and lower surfaces of the insulating layer 100.

  Thereafter, as shown in FIG. 1-D, the excess plug material 11 is removed by a buffing process to maintain the flatness of the circuit surface of the core circuit board. As shown in FIG. 1E, finally, the patterning process is performed on the copper foil and the metal layer 103 on both surfaces of the insulating layer 100, thereby forming the structure of the core circuit board 10 of the inner circuit layer 104 having both surfaces. Yes.

Thereafter, as shown in FIG. 1-F, a dielectric layer 12 is further formed on the inner circuit layer 104 on the upper and lower surfaces of the core circuit board 10, and this is performed using a laser drilling technique. A plurality of openings 120 are formed in the dielectric layer 12 and used as an inner layer circuit layer 104 communicating with the core circuit board 10 in a subsequent electroplating process.

Subsequently, as shown in FIG. 1-G, a conductive layer 13 is formed on the surface of the dielectric layer 12 and the opening 120 by an electroless copper plating method, and a resist pattern layer 14 is formed on the conductive layer 13. After the formation, electroplating is performed to form a circuit layer 15 on the surface of the conductive layer 13.

  Thereafter, as shown in FIG. 1-H, the resist pattern layer 14 is removed and etching is performed, and the conductive layer 13 previously covered under the resist pattern layer 14 is removed. In this way, a circuit board having a multilayer circuit layer is manufactured by repeatedly forming a dielectric layer and a buildup layer using these processes.

  However, in the manufacturing process of the circuit board having the above-described multilayer circuit, the core circuit board is formed by performing the circuit manufacturing process on the core with the insulating layer structure having a thin metal layer coated on the surface as a core. Thereafter, a multilayer circuit board having a required design is formed by further performing a build-up process on the core circuit board.

Therefore, it is difficult to effectively reduce the thickness of the finally formed multilayer circuit board, and it is difficult to meet the demand for downsizing the structure of the semiconductor package. If the thickness of the core is extremely reduced, for example, to 60 μm or less, the productivity of the multilayer circuit board will face severe problems, and the yield in the circuit board manufacturing process will be greatly reduced. Become.

In addition, since the core circuit board includes a plug process and a brushing process in the manufacturing process, the manufacturing cost of the circuit board is increased. Of particular importance is the fact that a plurality of plated through holes (PTH) are formed in the core circuit board. Usually, the plated through hole has a hole diameter of about 100 μm or more and is formed by a metal layer etching method. On the other hand, the hole diameter of the conductive via is about 50 μm and can be formed by an electroplating method. Therefore, the production of the plated through hole is relatively disadvantageous for forming a fine circuit structure.

  Furthermore, in the above-described multilayer circuit board manufacturing process, a multilayer circuit board can be completed only after a core circuit board is prepared in advance and a dielectric layer and a circuit layer are formed on the core circuit board. Therefore, the steps of the manufacturing process become complicated, the process time increases, and at the same time, the manufacturing cost increases accordingly.

  For this reason, a circuit board structure capable of avoiding disadvantages such as an increase in thickness of a circuit board, a low wiring density, a decrease in yield, a process complexity, an increase in manufacturing time, and a manufacturing cost in the prior art, and its How to provide a manufacturing method has become a challenge that is awaited for the industry.

  Therefore, in view of the circumstances as described above, it is a main object of the present invention to provide a circuit board structure that can reduce the thickness of the circuit board and meet the demand for miniaturization, and a manufacturing method thereof. .

Moreover, this invention makes it a subject to provide the circuit board structure which can improve the wiring density of a circuit board, and its manufacturing method.
Furthermore, an object of the present invention is to provide a circuit board structure and a manufacturing method thereof that can simplify the manufacturing process, improve the yield, shorten the process time, and reduce the manufacturing cost.

  In order to solve the above problems, a method of manufacturing a circuit board structure according to the present invention includes a step of preparing a carrier board, forming an insulating protective layer on the carrier board, and forming a plurality of openings in the insulating protective layer. A step of exposing the carrier board; a step of forming a circuit structure on a surface and an opening of the insulating protective layer; a dielectric layer formed on the insulating protective layer and the circuit structure; and a plurality of openings in the dielectric layer And exposing a part of the circuit structure.

The circuit structure includes a wiring pattern layer formed on the surface of the insulating protective layer and a conductive structure in the opening of the insulating protective layer.
Further, according to the design, a build-up structure can be further formed on the dielectric layer, and the build-up structure has a plurality of conductive vias for being electrically connected to the circuit structure. By being formed, it is possible to form a multilayer circuit structure.

  Furthermore, in this method of manufacturing a circuit board structure, the carrier board is further removed, and a fine concave structure is formed on the exposed surface of the conductive structure by an etching method. Alternatively, bumps protruding from the surface of the insulating protective layer are formed through a patterning process, and used as a structure for electrical connection.

Further, by forming an adhesive layer on the surface of the bump, it is possible to prevent oxidation on the surface of the bump.
An insulating protective layer may be further formed on the surface of the build-up structure, and a plurality of openings may be provided on the surface of the insulating protective layer to expose the connection pads of the build-up structure.

Finally, the carrier board can be further removed to expose the surface of the conductive structure formed in the opening of the insulating protective layer.
Still another embodiment of the manufacturing method of the present invention includes a step of preparing a carrier board, a step of forming an insulating protective layer on the carrier board, forming a plurality of openings in the insulating protective layer, and exposing the carrier board; Forming a conductive structure in the opening of the insulating protective layer, forming a wiring pattern layer on the surface of the insulating protective layer and the top surface of the conductive structure, and electrically connecting the wiring pattern layer to the conductive structure And a step of forming a dielectric layer on the insulating protective layer and the wiring pattern layer, forming a plurality of openings in the dielectric layer, and exposing a part of the wiring pattern layer.

  According to the above-described manufacturing method, a build-up structure is further formed in the dielectric layer, and a plurality of conductive vias to be electrically connected to the wiring pattern layer are formed in the build-up structure. An insulating protective layer may be further formed on the surface of the up-structure, a plurality of openings may be provided on the surface of the insulating protective layer, and the connection pads of the build-up structure may be exposed.

Thereafter, the carrier board is removed, and the surface of the conductive structure formed in the opening of the insulating protective layer and in contact with the wiring pattern layer is exposed.
A circuit board structure according to the present invention has a plurality of openings, an insulating protective layer in which a conductive structure is formed in these openings, a wiring pattern layer formed on a surface of the insulating protective layer by a patterning step, and the insulating And a dielectric layer formed on the surface of the protective layer and the wiring pattern layer and having a plurality of openings for exposing a part of the wiring pattern layer.

  Another circuit board structure according to the present invention includes an insulating protective layer having a plurality of openings, a conductive structure formed in the openings, and a surface of the insulating protective layer formed by a patterning process. A wiring pattern layer electrically connected to the conductive structure in the opening, and a dielectric formed on the surface of the insulating protection layer and the wiring pattern layer, and having an opening for exposing a part of the wiring pattern layer A body layer.

  Compared with the prior art, the circuit board structure and the manufacturing method thereof according to the present invention mainly forms an insulating protective layer having a plurality of openings in a carrier board, forms a conductive structure in these openings, and the surface of the insulating protective layer. Forming a wiring pattern layer on the insulating protection layer and the wiring pattern layer, and forming a plurality of openings for exposing a part of the wiring pattern layer in the dielectric layer. Forming a build-up structure electrically connected to the wiring pattern layer on the dielectric layer, and finally forming a coreless circuit board structure by removing the carrier board And consist of

  As a result, it is possible to reduce the thickness of the circuit board, contribute to the reduction of the size of the package product and the improvement of the electrical performance, and thus to meet the demand for downsizing of the electronic equipment, and therefore As in the prior art, it is possible to avoid the disadvantage that the thickness of the package product increases due to the build-up on the core substrate and the circuit board is formed, and the size of the package product cannot be reduced.

Further, the circuit board structure according to the present invention does not need to electrically connect the interlayer circuit using the plated through hole (PTH), and only the conductive structure formed in the dielectric layer is used for the circuit board interlayer circuit. Realizes electrical connection, thereby increasing the wiring density on the surface of the circuit board, and reducing the wiring density on the surface of the circuit board to avoid the location of plated through holes, as in the prior art The disadvantage of this can be avoided.

  Furthermore, in the circuit board structure according to the present invention, a build-up process is further performed directly on the wiring pattern layer to form a build-up structure, whereby the build-up structure is connected via a conductive via in the dielectric layer. It can be electrically connected to the wiring pattern layer, and a multilayer circuit board structure can be formed more efficiently.

  In the following, embodiments of the present invention will be described using specific specific examples. It should be noted that those skilled in the art can easily understand other advantages and effects of the present invention based on the contents described in this specification. The present invention can be implemented or applied by other different specific embodiments, and each item in the present specification is also based on different viewpoints and applications without departing from the gist of the present invention. Various modifications and changes can be made.

2A to 2I are schematic cross-sectional views for explaining in detail the first embodiment of the method of manufacturing the circuit board structure according to the present invention.
First, as shown in FIG. 2A, a carrier board 20 that is an insulating plate 202 having a metal layer 201 on its surface is prepared. Of these, the insulating plate 202 may be made of an organic material, and the metal layer 201 is most preferably copper, but is not limited thereto.

Subsequently, as shown in FIG. 2B, an insulating protective layer 22 which is, for example, a photosensitive dielectric material or a solder resist layer is formed on the metal layer 201 of the carrier board 20, and the insulating protective layer 22 has a metal A plurality of openings 220 for exposing a part of the layer 201 are formed.

As shown in FIG. 2C, the surface of the insulating protective layer 22 and the opening 220 thereof have a metal layer 201 as a current path for electroplating, whereby the surface of the insulating protective layer 22 and the opening 220 thereof are electroplated. A metal layer 23 is formed. The metal layer 23 is most preferably a copper material, but is not limited thereto.

In addition, before the metal layer 23 is formed on the surface of the insulating protective layer 22, a conductive metal layer (not shown) needs to be formed on the surfaces of the insulating protective layer 22 and the opening 220. By using the path, the metal layer 23 is formed by electroplating.

As shown in FIG. 2-D, the metal layer 23 is then formed as a circuit structure 24 by a patterning process. The patterning process in the present invention is a generally known technique such as conventional exposure, development and etching, or a circuit structure 24 is formed on the surface of the insulating protective layer 22 by a resist pattern layer (not shown). Further, it can be formed by electroplating through a conductive metal layer, but detailed description is omitted here.

The circuit structure 24 includes a wiring pattern layer 240 formed on the surface of the insulating protective layer 22 and a conductive structure 241 formed in the opening 220 of the insulating protective layer.
As shown in FIG. 2E, a dielectric layer 25 is further formed in the insulating protective layer 22 and the circuit structure 24, and a plurality of openings 250 are formed on the dielectric layer 25, and a part of the wiring pattern layer 240 is formed. Expose. The dielectric layer 25 may be, for example, any one of an organic thin film dielectric material, a liquid organic resin material, or a combination thereof. The materials mentioned above are ABF (Ajinomoto Build-up Film), BCB (Benzocyclo-buthene), LCP (Liquid Crystal Polymer), PI (Poly-imide), PPE (Poly (phenylene ether)), PTFE (Poly (tetra-tetra- fluoroethylene)), FR4, FR5, BT (Bismaleimide Triazine), aramid, or other photosensitive or non-photosensitive organic resin, or a mixture of epoxy resin and glass fiber. In this way, a basic circuit board structure is constructed and subsequently used according to different usage demands.

As shown in FIG. 2F, a buildup structure 26 is further formed in the dielectric layer 25. The buildup structure 26 includes a dielectric layer 261, a circuit layer 262 stacked on the dielectric layer 261, and a dielectric. A conductive via 263 formed in the layer 261, and the conductive via 263 is electrically connected to the wiring pattern layer 240, and an insulating protective layer 27 is further formed on the surface of the build-up structure 26. A plurality of openings 270 are provided on the surface of 27 to expose the build-up structure 26 as connection pads 264. The connection pads 264 are connected to conductive elements (not shown) such as conductive bumps or metal wires, for example. These conductive elements can be used for electrical connection with a semiconductor element (not shown) connected to the surface of the circuit board.

Finally, as shown in FIG. 2G, the carrier board 20 is removed, and the conductive structure 241 in the opening 220 of the insulating protective layer 22 is exposed to the outside. As a method of removing the carrier board 20, first, the insulating plate 202 is removed by a physical or chemical method, and then the metal layer 201 is removed by a chemical etching method, and the carrier board 20 is formed in the opening 220 of the insulating protective layer 22. In addition, the conductive structure 241 that is in contact with the metal layer 201 is etched to form a micro-recess structure 241 ′ that is recessed inward.

FIG. 2-H shows another embodiment of removing the carrier board 20 in the present invention. First, the insulating plate 202 on the carrier board 20 is removed, and then the exposed metal layer 201 is formed on the surface of the conductive structure 241 as a bump 201 ′ protruding from the surface of the insulating protective layer 22 through a patterning process.

As shown in FIG. 2I, an adhesive layer 28 is further formed on the surface of the bump 201 '. The adhesive layer 28 is any one of tin, lead, nickel, palladium, silver, gold, or an alloy thereof, or a multilayer metal of tin-lead, nickel-gold, nickel-palladium-gold, or organic It consists of a solderability preservative (OSP), and different materials may be used depending on usage demands.

The circuit board structure according to the present invention formed by the above-described manufacturing method includes an insulating protective layer 22 having a plurality of openings 220 in which a conductive structure 241 is formed, and a wiring pattern formed on the surface of the insulating protective layer 22 by a patterning process. And a dielectric layer 25 having a plurality of openings 250 formed on the surfaces of the insulating protective layer 22 and the wiring pattern layer 240 and exposing a part of the wiring pattern layer 240. Yes. Of these, the conductive structure 241 can be further etched to form a micro-concave structure 241 ′ that is recessed inward. Alternatively, a bump 201 ′ protruding from the surface of the insulating protective layer 22 can be formed on the surface of the conductive structure 241 by a patterning process.

  FIGS. 3A to 3F are cross-sectional views schematically showing a second embodiment of the method for producing a circuit board structure according to the present invention. The second embodiment of the present invention differs from the first embodiment in that the carrier board is a metal plate.

  First, as shown in FIG. 3A, a carrier board 30 made of a metal material is prepared. An insulating protective layer 31 is formed on at least one surface of the carrier board 30, and a plurality of openings 310 are formed in the insulating protective layer 31 to expose the carrier board 30.

As shown in FIG. 3B, a circuit structure 32 including a conductive structure 321 and a wiring pattern layer 322 is formed in each of the opening 310 of the insulating protective layer 31 and the surface of the insulating protective layer 31. The conductive structure 321 and the wiring pattern layer 322 are preferably metal copper layers.

  The manufacturing process technology for forming the conductive structure 321 and the wiring pattern layer 322 can be completed by a conventional patterning process of exposure, development and etching or an electroplating method as described in the first embodiment.

Before forming the conductive structure 321 and the wiring pattern layer 322 on the surface of the insulating protective layer 31, it is necessary to previously form a conductive metal layer (not shown) on the surfaces of the insulating protective layer 31 and the opening 310. That is, by using the conductive metal layer as a current path, a conductive structure 321 and a wiring pattern layer 322 are formed by electroplating in a resist pattern layer (not shown) provided on the surface of the insulating protective layer 31. .

  It is also possible to form one metal layer on the surface of the insulating protective layer 31 by electroplating, and further form the wiring pattern layer 322 and the conductive structure 321 by a patterning process of exposure, development and etching.

As shown in FIG. 3C, a dielectric layer 33 is formed on the insulating protective layer 31 and the wiring pattern layer 322, and a plurality of openings 330 are formed in the dielectric layer 33, and a part of the lower layer is formed thereunder. The circuit structure 32 is exposed.

Subsequently, as shown in FIG. 3D, a buildup structure 34 is formed in the dielectric layer 33. The build-up structure 34 includes at least one dielectric layer 341, a circuit layer 342 laminated on the dielectric layer 341, and a plurality of conductive vias 343 formed in the dielectric layer 341. These conductive vias 343 is electrically connected to the wiring pattern layer 322.

Further, an insulating protective layer 35 is further formed on the surface of the buildup structure 34, and a plurality of openings 350 are provided on the surface of the insulating protective layer 35 to expose the connection pads 344 of the buildup structure 34. The connection pad 344 is used for forming a conductive element (not shown) such as a conductive bump. Thereby, a circuit board structure having a multilayer circuit is completed.

Finally, as shown in FIG. 3E, the carrier board 30 is removed to expose the conductive structure 321 in the opening 310 of the insulating protective layer 31. The method of removing the carrier board 30 is as described above, and the end face of the conductive structure 321 and the surface of the insulating protective layer 31 are made to coincide. Alternatively, the surface of the conductive structure 321 may be etched to form a micro-concave structure (not shown) recessed inside,
A bump protruding from the surface of the insulating protective layer 31 may be formed on the surface of the conductive structure 321 by a patterning process.

As shown in FIG. 3F, an adhesive layer 36 is formed on the end surface of the conductive structure 321. The materials used for the adhesive layer 36 are as described above, and detailed description thereof is omitted here.
FIG. 4-A to FIG. 4-F are schematic cross-sectional views for illustrating in detail the third embodiment of the circuit board manufacturing method according to the present invention.

First, as shown to FIG. 4-A, the carrier board 40 which is a metal material is prepared. An insulating protective layer 41 is formed on the carrier board 40, a plurality of openings 410 are formed in the insulating protective layer 41 to expose the carrier board 40, and then a conductive structure 42 is formed in the openings 410 of the insulating protective layer 41. .

Subsequently, as shown in FIG. 4B, a wiring pattern layer 43 which is, for example, a copper pattern layer is formed on each surface of the conductive structure 42 and the insulating protective layer 41, and a part of the wiring pattern layer 43 is a conductive structure. Electrically connected to 42. Among them, before forming the wiring pattern layer 43 on the surfaces of the insulating protective layer 41 and the conductive structure 42, it is necessary to previously form a conductive metal layer (not shown) on the surfaces of the insulating protective layer 41 and the conductive structure 42. is there.

  That is, by forming the resist pattern layer (not shown) on the surface of the insulating protective layer 41 using the conductive metal layer as a current path, the wiring pattern layer 43 is formed by electroplating in the patterning step. Further, the wiring pattern layer 43 can be formed by providing a metal layer on the surfaces of the insulating protective layer 41 and the conductive structure 42 by electroplating, and further by patterning processes of exposure, development and etching.

As shown in FIG. 4C, a dielectric layer 44 is formed on the surfaces of the wiring pattern layer 43 and the insulating protective layer 41, and a plurality of openings 440 are formed in the dielectric layer 44 by a patterning process. The wiring pattern layer 43 is exposed.

  As shown in FIG. 4D, a buildup structure 45 is formed on the surface of the dielectric layer 44, and the buildup structure 45 is electrically connected to the wiring pattern layer 43. The build-up structure 45 penetrates the at least one dielectric layer 451, the circuit layer 452 laminated on the dielectric layer 451, and the dielectric layer 451, and electrically connects the circuit layer 452 to the wiring pattern layer 43. And a plurality of conductive vias 453 used for the above.

The circuit layer on the outer surface of the build-up structure 45 is formed with a plurality of connection pads 454 used for forming a conductive element (not shown), and the outer-layer circuit layer of the build-up structure 45 further includes the outer-layer circuit. An insulating protective layer 46 having a plurality of openings 460 for exposing the connection pads 454 is formed. For example, a nickel-gold layer, OSP, or an adhesive layer (not shown) made of a soldering material is formed on the exposed surface of the connection pad 454.

  As shown in FIG. 4E, the carrier board 40 can then be removed, thereby exposing the insulating protective layer 41 and the conductive structure 42 in the bottom layer. Then, a surface treatment such as forming a solder material or a nickel-gold layer is performed on the end face portion of the conductive structure 42 exposed from the insulating protective layer 41, thereby completing a circuit board structure having a multilayer circuit.

The circuit board structure obtained by the manufacturing method of the third embodiment of the circuit board structure according to the present invention mainly includes an insulating protective layer 41 having a plurality of openings 410 and end faces formed in these openings 410 and exposed, for example, A conductive structure 42 on which an adhesive layer for forming a soldering material or a nickel-gold layer is formed, and a circuit structure is formed by a patterning process, formed on the surface of the insulating protective layer 41, and in the opening 410 of the insulating protective layer 41 A wiring pattern layer 43 that is electrically connected to a certain conductive structure 42, and an opening 440 that is formed on the surface of the insulating protection layer 41 and the metal layer and exposes a part of the wiring pattern layer 43 is formed. And a dielectric layer 44.

  In addition, a buildup structure 45 is formed on the surface of the dielectric layer 44, and the buildup structure 45 is electrically connected to the wiring pattern layer 43. The build-up structure 45 has at least one dielectric layer 451, a circuit layer 452 stacked on the dielectric layer 451, and penetrates the dielectric layer 451 to electrically connect the circuit layer 452 to the wiring pattern layer 43. A plurality of conductive vias 453.

On the outer circuit layer of the build-up structure 45, an insulating protective layer 46 having a plurality of openings 460 for exposing the connection pads 454 of the outer circuit layer is formed. The connection pads 454 are used to form conductive elements (not shown) such as conductive bumps, thereby completing a circuit board structure having a multilayer circuit.

  For this reason, the circuit board structure and the manufacturing method thereof according to the present invention are mainly formed on the carrier board by an insulating protective layer having a plurality of openings and a patterning process, and the conductive structure formed in the openings of the insulating protective layer. A step of forming a circuit structure including: a step of forming a dielectric layer on the surfaces of the insulating protective layer and the metal layer; and forming a build-up structure on the dielectric layer; and the build-up structure Electrically connecting to the circuit structure that has undergone the patterning step through conductive vias provided in the dielectric layer, and then removing the carrier board, thereby forming a coreless circuit board structure. Forming a process. As a result, it is possible to reduce the thickness of the circuit board, contribute to the reduction of the size of the package product and the improvement of the performance, and to meet the demand for downsizing of the electronic equipment. It is possible to avoid the disadvantages such as the technology that the thickness of the package product increases due to the build-up on the core substrate to form the circuit board, and the size of the package product cannot be reduced.

Further, the circuit board structure according to the present invention does not need to electrically connect the interlayer circuit using the plated through hole (PTH), and only the conductive structure formed in the dielectric layer is used for the circuit board interlayer circuit. Disadvantages of realizing electrical connection and thus increasing the wiring density on the surface of the circuit board and reducing the wiring density on the surface of the circuit board to avoid the location of plated through holes as in the prior art Can be avoided.

  The embodiments described above are merely examples for explaining the principle and the effect of the present invention, and do not limit the scope in which the present invention can be implemented. Those skilled in the art can make modifications to the above-described embodiments without departing from the spirit and technical idea of the present invention. Accordingly, the scope of the present invention is defined by the appended claims.

It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed the manufacturing method of the conventional buildup circuit board typically. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically the 1st Example of the manufacturing method of the circuit board structure concerning this invention. It is sectional drawing which showed typically other embodiment which removes a carrier board in the 1st Example of the manufacturing method of the circuit board structure concerning this invention. Furthermore, it is sectional drawing which showed typically the process of forming the contact bonding layer on the surface of bump. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 2nd Example of the manufacturing method of the circuit board structure which concerns on this invention. It is sectional drawing which showed typically the 3rd Example of the manufacturing method of the circuit board structure based on this invention. It is sectional drawing which showed typically the 3rd Example of the manufacturing method of the circuit board structure based on this invention. It is sectional drawing which showed typically the 3rd Example of the manufacturing method of the circuit board structure based on this invention. It is sectional drawing which showed typically the 3rd Example of the manufacturing method of the circuit board structure based on this invention. It is sectional drawing which showed typically the 3rd Example of the manufacturing method of the circuit board structure based on this invention.

Explanation of symbols

10 …… Core circuit board
11 …… Plug material
12, 25, 261, 33, 341, 44, 451 …… Dielectric layer
13 …… Conductive layer
14 …… Resist pattern layer
15, 262, 342, 452 …… Circuit layer
20, 30, 40 …… Carrier board
22, 27, 31, 35, 41, 46 …… Insulation protective layer
24, 32 …… Circuit structure
26, 34, 45 …… Build-up structure
28, 36 …… Adhesive layer
241、321、42 …… Conductive structure
240, 322, 43 …… Wiring pattern layer
100 …… Insulation layer
102 …… Through hole
102a …… Plating through hole
103, 201, 23 …… Metal layer
104 …… Inner circuit layer
120 …… Open
201´ …… Bump
202 …… Insulation plate
220, 250, 270 …… Opening
241´ …… Micro concave structure
263, 343, 453 …… Conductive via
264, 344, 454 …… Connection pad
310, 330, 350 …… Open
410, 440, 460 …… Open

Claims (43)

Preparing a carrier board;
Forming an insulating protective layer on the carrier board, forming a plurality of openings in the insulating protective layer, and exposing the carrier board;
Forming a circuit structure on the surface and opening of the insulating protective layer;
Forming a dielectric layer in the insulating protective layer and the circuit structure, forming an opening in the dielectric layer, and exposing a part of the circuit structure;
A method for producing a circuit board structure, comprising:   The method for manufacturing a circuit board structure according to claim 1, wherein the carrier board is made of a metal material.   2. The method of manufacturing a circuit board structure according to claim 1, wherein the carrier board is formed by adhering an insulating plate to a surface on which an insulating protective layer is not formed.   The circuit according to claim 1, wherein the circuit structure includes a wiring pattern layer formed on a surface of the insulating protective layer and a conductive structure in an opening of the insulating protective layer. Manufacturing method of the substrate structure.   Before forming the wiring pattern layer and the conductive structure on the surface and opening of the insulating protective layer, forming a conductive metal layer in advance and forming the wiring pattern layer and the conductive structure using the conductive metal layer as a current path The method of manufacturing a circuit board structure according to claim 4, further comprising:   6. The method according to claim 5, further comprising a step of forming a conductive structure and a wiring pattern layer by electroplating on a resist pattern layer disposed on a surface of the insulating protective layer using the conductive metal layer as a current path. Circuit board structure manufacturing method.   The method further comprises: forming a metal layer on the surface of the insulating protective layer by electroplating, and then forming a wiring pattern layer and a conductive structure through a patterning process of exposure, development and etching. Item 6. A process for producing a circuit board structure according to Item 5.   2. The method of claim 1, further comprising: forming a build-up structure in the dielectric layer, and forming a plurality of conductive vias in the build-up structure to be electrically connected to the wiring pattern layer. The manufacturing method of the circuit board structure in any one of -3.   The method further comprises forming an insulating protective layer on the surface of the build-up structure, forming a plurality of openings on the surface of the insulating protective layer, and exposing the connection pads of the build-up structure. A method for manufacturing a circuit board structure according to claim 8.   9. The circuit board structure according to claim 8, wherein the build-up structure includes a dielectric layer, a circuit layer laminated on the dielectric layer, and a conductive via formed in the dielectric layer. The manufacturing method.   4. The circuit board structure according to claim 1, wherein after the carrier board is removed, the surface of the conductive structure is further etched to form a micro-concave structure recessed inward. 5. Manufacturing method. 4. The circuit board structure according to claim 1, wherein after the carrier board is removed, bumps protruding from the surface of the insulating protective layer are further formed on the surface of the conductive structure by a patterning process. The manufacturing method.   The method of manufacturing a circuit board structure according to claim 12, further comprising a step of forming an adhesive layer on a surface of the bump.   The method for manufacturing a circuit board structure according to claim 13, wherein the adhesive layer is made of any one of a combination of tin, lead, nickel, palladium, silver, and gold, or an alloy thereof.   14. The method of manufacturing a circuit board structure according to claim 13, wherein the adhesive layer is made of any one of tin-lead, nickel-gold, and nickel-palladium-gold multilayer metal. The method of manufacturing a circuit board structure according to claim 13, wherein the adhesive layer is made of an organic soldering preservative (OSP). Preparing a carrier board;
Forming an insulating protective layer on the carrier board, forming a plurality of openings in the insulating protective layer, and exposing the carrier board;
Forming a conductive structure in the opening of the insulating protective layer;
Forming a wiring pattern layer on the surface of the insulating protective layer and the top surface of the conductive structure, and electrically connecting the wiring pattern layer to the conductive structure;
Forming a dielectric layer in the insulating protective layer and the wiring pattern layer, forming an opening in the dielectric layer, and exposing a part of the wiring pattern layer;
A method for producing a circuit board structure, comprising:   The method of manufacturing a circuit board structure according to claim 17, wherein the carrier board is made of a metal material.   18. The circuit board according to claim 17, wherein a conductive metal layer is formed in advance on the surfaces of the insulating protective layer and the conductive structure before forming a wiring pattern layer on the surfaces of the insulating protective layer and the conductive structure. Structure manufacturing method.   The method further comprises: forming a metal layer on the surface of the insulating protective layer and the conductive structure by electroplating, and then forming a wiring pattern layer by a patterning process of exposure, development and etching. The manufacturing method of the circuit board structure in any one of 17-19.   20. The method of manufacturing a circuit board structure according to claim 19, further comprising a step of forming a resist pattern layer on a surface of the insulating protective layer and forming a wiring pattern layer from the conductive metal layer by electroplating.   18. The method according to claim 17, further comprising: forming a buildup structure in the dielectric layer, and forming a plurality of conductive vias in the buildup structure to be electrically connected to the wiring pattern layer. The manufacturing method of the circuit board structure in any one of -19.   The method further comprises forming an insulating protective layer on the surface of the build-up structure, forming a plurality of openings on the surface of the insulating protective layer, and exposing the connection pads of the build-up structure. A method for manufacturing a circuit board structure according to claim 22. The circuit according to claim 22, wherein the build-up structure includes a dielectric layer, a circuit layer stacked on the dielectric layer, and a conductive via formed in the dielectric layer. Manufacturing method of the substrate structure.   18. The circuit board structure according to claim 17, further comprising a step of removing the carrier board and exposing a surface of a conductive structure formed in the opening of the insulating protective layer and in contact with the wiring pattern layer. The manufacturing method. An insulating protective layer having a plurality of openings, in which a conductive structure is formed; and
A wiring pattern layer formed on the surface of the insulating protective layer by a patterning step and electrically connected to the conductive structure in the opening of the insulating protective layer;
A dielectric layer formed on a surface of the insulating protective layer and the wiring pattern layer, and formed with a plurality of openings for exposing a part of the wiring pattern layer;
A circuit board structure comprising:   The build-up structure is further formed in the dielectric layer, and a plurality of conductive vias are formed in the build-up structure to be electrically connected to the wiring pattern layer. Circuit board structure.   28. The insulation protective layer is further formed on the surface of the buildup structure, and a plurality of openings for exposing the connection pads of the buildup structure are provided on the surface of the insulation protection layer. Circuit board structure as described.   28. The circuit of claim 27, wherein the build-up structure includes a dielectric layer, a circuit layer stacked on the dielectric layer, and a conductive via formed in the dielectric layer. Board structure.   27. The circuit board structure according to claim 26, wherein the exposed surface of the conductive structure in the opening of the insulating protective layer has a micro-concave structure.   27. The circuit board structure according to claim 26, wherein a bump protruding from the surface of the insulating protective layer is formed on the exposed surface of the conductive structure in the opening of the insulating protective layer.   32. The circuit board structure according to claim 31, wherein an adhesive layer is formed on a surface of the bump.   The circuit board structure according to claim 32, wherein the adhesive layer is made of any one of a combination of tin, lead, nickel, palladium, silver and gold, or an alloy thereof.   The circuit board structure according to claim 32, wherein the adhesive layer is made of any one of tin-lead, nickel-gold, and nickel-palladium-gold multilayer metal. The circuit board structure according to claim 32, wherein the adhesive layer comprises an organic soldering preservative (OSP). An insulating protective layer having a plurality of openings;
A conductive structure formed in the opening;
A wiring pattern layer formed on the surface of the insulating protective layer by a patterning step and electrically connected to a conductive structure in the opening of the insulating protective layer;
A dielectric layer formed on the surface of the insulating protective layer and the wiring pattern layer, and having an opening for exposing a part of the wiring pattern layer; and
A circuit board structure comprising:   The build-up structure is further formed in the dielectric layer, and a plurality of conductive vias are formed in the build-up structure to be electrically connected to the wiring pattern layer. Circuit board structure.   The insulating protection layer is further formed on the surface of the buildup structure, and a plurality of openings for exposing the connection pads of the buildup structure are provided on the surface of the insulation protection layer. Circuit board structure.   38. The circuit of claim 37, wherein the build-up structure includes a dielectric layer, a circuit layer stacked on the dielectric layer, and a conductive via formed in the dielectric layer. Board structure.   37. The circuit board structure according to claim 36, wherein an adhesive layer is formed on a surface of the conductive structure.   41. The circuit board structure according to claim 40, wherein the adhesive layer is made of any one of a combination of tin, lead, nickel, palladium, silver and gold, or an alloy thereof.   The circuit board structure according to claim 40, wherein the adhesive layer is made of any one of a multilayer metal of tin-lead, nickel-gold, nickel-palladium-gold. 41. The circuit board structure of claim 40, wherein the adhesive layer comprises an organic soldering preservative (OSP).

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