WO2023106208A1 - Wiring board with support, method for manufacturing wiring board with support, and method for manufacturing electronic component mounting board - Google Patents

Wiring board with support, method for manufacturing wiring board with support, and method for manufacturing electronic component mounting board Download PDF

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Publication number
WO2023106208A1
WO2023106208A1 PCT/JP2022/044419 JP2022044419W WO2023106208A1 WO 2023106208 A1 WO2023106208 A1 WO 2023106208A1 JP 2022044419 W JP2022044419 W JP 2022044419W WO 2023106208 A1 WO2023106208 A1 WO 2023106208A1
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WIPO (PCT)
Prior art keywords
layer
wiring conductor
forming
insulating layer
wiring
Prior art date
Application number
PCT/JP2022/044419
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French (fr)
Japanese (ja)
Inventor
慎也 喜多村
晃樹 小松
和晃 川下
隼斗 中川
豪志 信國
Original Assignee
Mgcエレクトロテクノ株式会社
米沢ダイヤエレクトロニクス株式会社
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Publication of WO2023106208A1 publication Critical patent/WO2023106208A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present invention relates to a wiring board with a support, a method for manufacturing the same, and a method for manufacturing an electronic component mounting board using the same.
  • the present invention has been made based on such problems, and provides a wiring board with a support capable of suppressing breakage during separation and removal of the support, a method for manufacturing the same, and electronic component mounting using the same. It aims at providing the manufacturing method of a board
  • a wiring board with a support comprising a support provided with a first metal layer having a peeling means on at least one surface side of a core resin layer, and a wiring board provided on the first metal layer.
  • the wiring board has a first insulating layer provided on and in contact with the first metal layer, and a first wiring conductor provided on and in contact with the first insulating layer, The first insulating layer is provided with a first non-through hole extending from the first wiring conductor to the first metal layer corresponding to the terminal position of the wiring board,
  • a wiring substrate with support wherein a first connection via connected to the first wiring conductor is formed on an inner wall of the first non-through hole.
  • a plating step of forming a first connection via connecting between the second metal layer and the first metal layer a pattern plating step of performing pattern plating after forming a resist pattern on the second metal layer; a first wiring conductor forming step of removing the resist pattern and further removing the exposed second metal layer by etching to form a first wiring conductor;
  • a method for manufacturing a wiring board with a support a plating step of forming a first connection via connecting between the second metal layer and the first metal layer.
  • a method for manufacturing a wiring board with a support [7] The method for manufacturing a wiring board with support according to [5] or [6], wherein the thickness of the first metal layer from the end face of the first insulating layer side to the peeling means is 6 ⁇ m or more.
  • each step of the method for manufacturing a wiring board with a support according to [5] or [6] After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor; A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed.
  • a second wiring conductor forming step of forming a second wiring conductor a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board on which the first wiring conductor and the second wiring conductor are formed; a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step; a mounting step of mounting a semiconductor element on the wiring board after the first metal layer removing step;
  • a method of manufacturing an electronic component mounting board including [9] The method for manufacturing an electronic component mounting board according to [8], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
  • a solder resist layer forming step of forming a solder resist layer so that the second wiring conductor is partially exposed.
  • an (m+2)th insulating layer is formed on the (m+1)th insulating layer and the (m+1)th wiring conductor.
  • the (m+2)-th wiring conductor forming step of forming the (m+2)-th wiring conductor by applying at least one of electrolytic plating and electroless plating to the surface in which the through holes are formed is repeated in this order n times, and the build
  • each step of the method for manufacturing a wiring board with a support according to [5] or [6] After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor; A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed.
  • a second wiring conductor forming step of forming a second wiring conductor a mounting step of mounting a semiconductor element on a wiring board on which the first wiring conductor and the second wiring conductor are formed; a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board after the mounting step; a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
  • a method of manufacturing an electronic component mounting board including [16] The method for manufacturing an electronic component mounting board according to [15], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
  • the first insulating layer in which the first non-through holes are formed corresponding to the terminal positions is provided on and in contact with the first metal layer, and Since the first wiring conductor is provided in contact with the substrate, the wiring substrate can be reinforced by the first insulating layer, and damage to the wiring substrate can be suppressed when the support is separated and removed. .
  • the first insulating layer since the first insulating layer has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
  • the wiring board is reinforced and damaged when the core resin layer is separated and removed by the peeling means. can be further suppressed.
  • FIG. 1 is a diagram showing the configuration of a wiring board with a support according to an embodiment of the present invention; FIG. 1. It is a figure showing each process of the 1st manufacturing method of the wiring board with a support body shown in FIG. It is a figure showing each process following FIG. 1. It is a figure showing each process of the 2nd manufacturing method of the wiring board with a support body shown in FIG. 1. It is a figure showing each process of the 1st manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG. 1. It is a figure showing each process of the 2nd manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG.
  • FIG. 1 shows the configuration of a wiring board 1 with a support according to one embodiment of the present invention.
  • This wiring board 1 with a support includes a support 10 provided with a first metal layer 12 having peeling means on at least one surface of a core resin layer 11, and a and a wiring board 20 .
  • the wiring board 1 with support is obtained by providing the wiring board 20 on the support 10 .
  • the wiring board 1 with a support is also called a printed wiring board with a support or a package board with a support, and has a printed wiring board or a package board for mounting a semiconductor element as the wiring board 20 .
  • a printed wiring board or a package board for mounting a semiconductor element constitutes an electronic component mounting board by mounting an electronic component element such as a semiconductor element, for example.
  • the wiring board 20 is not limited to one on which semiconductor elements are mounted, and may be one on which surface-mounted electronic components such as LED (Light Emitting Diode) elements, capacitors, resistors, coils, and the like are mounted.
  • LED Light Emitting Diode
  • the supporting body 10 is for increasing the rigidity of the wiring board 20, suppressing warpage, and improving handleability in the manufacturing process of the wiring board 20 or the mounting process of the semiconductor element.
  • the support 10 has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means. Note that FIG. 1 shows the case where the first metal layer 12 is provided on one side of the core resin layer 11 . Although not shown, the first metal layer 12 may be provided on both sides of the core resin layer 11 .
  • the core resin layer 11 is not particularly limited. It can be composed of a material or the like.
  • the thickness of the core resin layer 11 is appropriately set as desired, and is not particularly limited, but is preferably 1 ⁇ m or more, for example. This is because if the thickness of the core resin layer 11 is less than 1 ⁇ m, the wiring substrate 20 may be defectively molded.
  • Prepreg is made by impregnating or coating a base material with an insulating material such as a resin composition.
  • the substrate is not particularly limited, and known substrates can be used as appropriate.
  • Materials constituting the substrate include, for example, inorganic fibers such as E-glass, D-glass, S-glass, and Q-glass; organic fibers such as polyimide, polyester, or tetrafluoroethylene; and mixtures thereof.
  • the substrate is not particularly limited, and for example, those having a shape such as woven fabric, nonwoven fabric, roving, chopped strand mat, surfacing mat and the like can be used as appropriate.
  • the material and shape of the base material are selected according to the intended use and performance of the molded article, and if necessary, it is possible to use one or more kinds of materials and shapes.
  • the thickness of the base material is not particularly limited as long as the thickness of the core resin layer 11 is within the range described above.
  • the base material one surface-treated with a silane coupling agent or the like or one subjected to mechanical fiber opening treatment can be used, and these base materials are suitable in terms of heat resistance, moisture resistance, and workability. is.
  • the insulating material is not particularly limited, and a known resin composition used as an insulating material for printed wiring boards or package substrates for mounting semiconductor elements can be appropriately selected and used.
  • a thermosetting resin having good heat resistance and chemical resistance can be used as a base.
  • the thermosetting resin is not particularly limited, and examples thereof include polyimide resins, phenol resins, epoxy resins, cyanate resins, maleimide resins, modified polyphenylene ethers, bismaleimide triazine resins, isocyanate resins, benzocyclobutene resins and vinyl resins. be done. These thermosetting resins may be used singly or in combination of two or more.
  • the polyimide resin is not particularly limited, and commercially available products can be appropriately selected and used.
  • a solvent-soluble polyimide resin synthesized by the production method described in JP-A-2005-15629 or a block-copolymerized polyimide resin can be used.
  • block copolymer polyimide resins include block copolymer polyimide resins described in International Publication WO2010-073952.
  • the block copolymerized polyimide resin comprises structure A in which an imide oligomer comprising a second structural unit is bound to the end of an imide oligomer comprising a first structural unit, and a second structural unit.
  • Block copolymerized polyimide resin having a structure in which Structure B, in which an imide oligomer composed of a first structural unit is bonded to the end of the imide oligomer, is alternately repeated. Note that the second structural unit is different from the first structural unit.
  • These block copolymer polyimide resins are produced by reacting a tetracarboxylic dianhydride and a diamine in a polar solvent to form an imide oligomer, and then further tetracarboxylic dianhydride and another diamine or another tetracarboxylic acid. It can be synthesized by a sequential polymerization reaction in which an acid dianhydride and a diamine are added and imidized.
  • One type of these polyimide resins may be used alone, or two or more types may be mixed and used.
  • the phenolic resin is not particularly limited, and one or more in one molecule (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, more preferably 2 or 3, still more preferably 2 ), generally known compounds or resins having a phenolic hydroxy group can be used.
  • bisphenol A type phenol resin bisphenol E type phenol resin, bisphenol F type phenol resin, bisphenol S type phenol resin, phenol novolak resin, bisphenol A novolac type phenol resin, glycidyl ester type phenol resin, aralkyl novolac type phenol resin, biphenyl Aralkyl-type phenolic resins, cresol novolac-type phenolic resins, polyfunctional phenolic resins, naphthol resins, naphthol novolak resins, polyfunctional naphthol resins, anthracene-type phenolic resins, naphthalene skeleton-modified novolac-type phenolic resins, phenol aralkyl-type phenolic resins, naphthol aralkyl-type phenolic resins Phenol resins, dicyclopentadiene type phenol resins, biphenyl type phenol resins, alicyclic phenol resins, polyol type phenol resin
  • thermosetting resins epoxy resins are excellent in heat resistance, chemical resistance, and electrical properties, and are relatively inexpensive, so they can be suitably used as insulating materials.
  • the epoxy resin one or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) epoxy groups per molecule.
  • cresol novolak type epoxy resin bisphenol A novolac type epoxy resin
  • diglycidyl ether of biphenol diglycidyl ether of naphthalenediol
  • diglycidyl ether of phenols diglycidyl ether of alcohols
  • Alkyl-substituted products, halides, and hydrogenated products thereof are included.
  • One type of these epoxy resins may be used alone, or two or more types may be mixed and used.
  • the curing agent used with this epoxy resin can be used without limitation as long as it cures the epoxy resin. Phosphorus compounds and halides thereof may be mentioned.
  • These epoxy resin curing agents may be used singly or in combination of two or more.
  • a cyanate resin is a resin that, when heated, produces a cured product with repeating units of triazine rings, and the cured product has excellent dielectric properties. For this reason, it is suitable especially when high-frequency characteristics are required.
  • the cyanate resin one or more (preferably 2 to 12, more preferably 2 to 6, more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) cyanato groups per molecule ( It is not particularly limited as long as it is a compound or resin having an aromatic moiety substituted with a cyanate ester group) in the molecule, but examples include 2,2-bis(4-cyanatophenyl)propane, bis(4-cyanato phenyl)ethane, 2,2-bis(3,5dimethyl-4-cyanatophenyl)methane, 2,2-(4-cyanatophenyl)-1,1,1,3,3,3-hexafluoropropane , ⁇ , ⁇ '-bis(4-cyanatophenyl)-m-di
  • cyanate resins such as cyanate ester compounds may be used singly or in combination of two or more. A part of the cyanate ester compound may be previously oligomerized into a trimer or a pentamer.
  • a curing catalyst or curing accelerator can be used in combination with the cyanate resin.
  • the curing catalyst for example, metals such as manganese, iron, cobalt, nickel, copper and zinc can be used.
  • organic metal salts such as 2-ethylhexanoate and octylate, and acetylacetone Mention may be made of organometallic complexes such as complexes.
  • Curing catalysts may be used singly or in combination of two or more.
  • Phenols are preferably used as the curing accelerator, and monofunctional phenols such as nonylphenol and paracumylphenol; bifunctional phenols such as bisphenol A, bisphenol F and bisphenol S; or phenol novolak and cresol novolak. can be used.
  • a hardening accelerator may be used individually by 1 type, and may be used in mixture of 2 or more types.
  • the maleimide resin has 1 or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) maleimide groups in one molecule.
  • a generally known compound or resin can be used as long as it has a compound or resin.
  • Modified polyphenylene ether is useful from the viewpoint that it can improve the dielectric properties of the cured product.
  • Modified polyphenylene ethers include, for example, poly(2,6-dimethyl-1,4-phenylene) ether, an alloyed polymer of poly(2,6-dimethyl-1,4-phenylene) ether and polystyrene, poly(2 ,6-dimethyl-1,4-phenylene)ether and styrene-butadiene copolymer, alloyed polymer of poly(2,6-dimethyl-1,4-phenylene)ether and styrene-maleic anhydride copolymer, poly Alloyed polymers of (3,6-dimethyl-1,4-phenylene) ether and polyamides, alloyed polymers of poly(2,6-dimethyl-1,4-phenylene) ethers and styrene-butadiene-acrylonitrile copolymers, oligophenylene
  • the isocyanate resin is not particularly limited, and includes, for example, an isocyanate resin obtained by a dehydrohalogenation reaction between a phenol and a cyanogen halide.
  • isocyanate resins include 4,4'-diphenylmethane diisocyanate MDI, polymethylene polyphenyl polyisocyanate, tolylene diisocyanate, and hexamethylene diisocyanate.
  • One type of these isocyanate resins may be used alone, or two or more types may be mixed and used.
  • the benzocyclobutene resin is not particularly limited as long as it contains a cyclobutene skeleton, but for example, divinylsiloxane-bisbenzocyclobutene (manufactured by Dow Chemical Co.) can be used.
  • divinylsiloxane-bisbenzocyclobutene manufactured by Dow Chemical Co.
  • One type of these benzocyclobutene resins may be used alone, or two or more types may be mixed and used.
  • the vinyl resin is not particularly limited as long as it is a polymer or copolymer of vinyl monomers.
  • Vinyl monomers are not particularly limited, and examples include (meth)acrylic acid ester derivatives, vinyl ester derivatives, maleic acid diester derivatives, (meth)acrylamide derivatives, styrene derivatives, vinyl ether derivatives, vinyl ketone derivatives, olefin derivatives, maleimide derivatives, (Meth)acrylonitrile may be mentioned. These vinyl resins may be used singly or in combination of two or more.
  • the resin composition used as the insulating material can also be blended with a thermoplastic resin in consideration of dielectric properties, impact resistance, film processability, and the like.
  • the thermoplastic resin is not particularly limited, and examples thereof include fluororesin, polycarbonate, polyetherimide, polyetheretherketone, polyacrylate, polyamide, polyamideimide, and polybutadiene.
  • One type of thermoplastic resin may be used alone, or two or more types may be mixed and used.
  • the fluororesin is not particularly limited, and examples thereof include polytetrafluoroethylene, polychlorotrifluoroethylene, polyvinylidene fluoride, and polyvinyl fluoride.
  • One type of these fluororesins may be used alone, or two or more types may be mixed and used.
  • polyamide-imide resins are useful from the viewpoint of excellent moisture resistance and good adhesion to metals.
  • the raw material for the polyamideimide resin is not particularly limited, but examples of the acidic component include trimellitic anhydride and trimellitic anhydride monochloride, and examples of the amine component include metaphenylenediamine, paraphenylenediamine, 4 ,4'-diaminodiphenyl ether, 4,4'-diaminodiphenylmethane, bis[4-(aminophenoxy)phenyl]sulfone, 2,2'-bis[4-(4-aminophenoxy)phenyl]propane and the like.
  • the polyamide-imide resin may be modified with siloxane to improve drying properties, and in this case, siloxane diamine can be used as the amino component. Considering film processability, it is preferable to use a polyamide-imide resin having a molecular weight of 50,000 or more.
  • thermoplastic resins have been described as insulating materials mainly used for prepregs, these thermoplastic resins are not limited to use as prepregs.
  • the core resin layer 11 may be formed by processing a film (film material) using the thermoplastic resin described above.
  • a filler may be mixed in the resin composition used as the insulating material.
  • fillers include, but are not limited to, alumina, white carbon, titanium white, titanium oxide, zinc oxide, magnesium oxide, metal oxides (including hydrates) such as zirconium oxide, aluminum hydroxide, boehmite, Metal hydroxides such as magnesium hydroxide, silicas such as natural silica, fused silica, synthetic silica, amorphous silica, aerosil, and hollow silica, inorganic materials such as clay, kaolin, talc, mica, glass powder, quartz powder, and Shirasu balloons
  • organic fillers organic fillers
  • organic fillers organic fillers
  • These fillers may be used singly or in combination of two or more.
  • the resin composition used as an insulating material may contain an organic solvent.
  • the organic solvent is not particularly limited, and aromatic hydrocarbon solvents such as benzene, toluene, xylene and trimethylbenzene; ketone solvents such as acetone, methyl ethyl ketone and methylinobutyl ketone; and tetrahydrofuran.
  • Ether solvents aromatic hydrocarbon solvents such as benzene, toluene, xylene and trimethylbenzene
  • ketone solvents such as acetone, methyl ethyl ketone and methylinobutyl ketone
  • tetrahydrofuran Ether solvents
  • alcohol solvents such as isopropanol and butanol
  • ether alcohol solvents such as 2-methoxyethanol and 2-butoxyethanol
  • N-methylpyrrolidone N,N-dimethylformamide and N,N-dimethylacetamide
  • the amount of the solvent in the varnish when producing the prepreg is preferably in the range of 40% by mass to 80% by mass with respect to the entire resin composition. Further, the viscosity of the varnish is desirably in the range of 20 cP to 100 cP (20 mPa ⁇ s to 100 mPa ⁇ s).
  • the resin composition used as an insulating material may contain a flame retardant.
  • flame retardants include, but are not limited to, bromine compounds such as decabromodiphenyl ether, tetrabromobisphenol A, tetrabromophthalic anhydride, and tribromophenol, triphenyl phosphate, trixylyl phosphate, and clay.
  • Known and customary flame retardants such as phosphorus compounds such as dildiphenyl phosphate, red phosphorus and modified products thereof, antimony compounds such as antimony trioxide and antimony pentoxide, triazine compounds such as melamine, cyanuric acid and melamine cyanurate can be used. can.
  • additives such as the above-mentioned curing agent, curing accelerator, thermoplastic particles, coloring agents, ultraviolet opaque agents, antioxidants, reducing agents, etc. Additives and fillers can be added.
  • the prepreg is, for example, a resin composition (varnish is added so that the amount of the resin composition attached to the base material described above is 20% by mass or more and 90% by mass or less in terms of resin content in the prepreg after drying. ) is impregnated or coated on the substrate, and then dried by heating at a temperature of 100° C. or higher and 200° C. or lower for 1 minute to 30 minutes to obtain a prepreg in a semi-cured state (B stage state).
  • GHPL-830NS product name
  • GHPL-830NSF product name
  • the insulating film material can be composed of, for example, the resin composition of the insulating material described in the prepreg, and can be obtained by processing these resin compositions into a film.
  • the first metal layer 12 can be composed of, for example, a metal foil with a carrier.
  • the metal foil with a carrier is, for example, laminated with a metal foil on a carrier via a release layer, which is a release means.
  • a commercial product can also be used for the metal foil with a carrier, for example, MT18SD-HT5 (product name) manufactured by Mitsui Mining & Smelting Co., Ltd. can be used.
  • the thickness of the first metal layer 12 is appropriately set as desired, and is not particularly limited.
  • the carrier can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of uniformity of thickness and corrosion resistance of the foil.
  • the thickness of the carrier is thicker than the thickness of the metal foil, and can be, for example, 3 ⁇ m or more and 100 ⁇ m or less, preferably 5 ⁇ m or more and 50 ⁇ m or less, and more preferably 6 ⁇ m or more and 30 ⁇ m or less.
  • the release layer is for allowing the carrier and the metal foil to be easily separated.
  • Materials for the release layer are not particularly limited, and various well-known materials can be used as appropriate.
  • organic materials include nitrogen-containing organic compounds, sulfur-containing organic compounds, and carboxylic acids.
  • nitrogen-containing organic compound include triazole compounds, imidazole compounds, etc. Among them, triazole compounds are preferable because they tend to have stable peelability.
  • triazole compounds include 1,2,3-benzotriazole, carboxybenzotriazole, N',N'-bis(benzotriazolylmethyl)urea, 1H-1,2,4-triazole and 3-amino- 1H-1,2,4-triazole and the like.
  • Examples of sulfur-containing organic compounds include mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol, and the like.
  • Examples of carboxylic acids include monocarboxylic acids, dicarboxylic acids, and the like.
  • Inorganic materials include metals or alloys of at least one of Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn, and oxides thereof.
  • the thickness of the release layer can be, for example, 1 nm or more and 1 ⁇ m or less, preferably 5 nm or more and 500 nm or less.
  • the metal foil can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of thickness uniformity and corrosion resistance of the foil.
  • the thickness of the metal foil is not particularly limited because it is appropriately set as desired.
  • the first metal layer 12 may be provided with the carrier on the core resin layer 11 side, or may be provided with the metal foil on the core resin layer 11 side.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means is preferably 6 ⁇ m or more. , is more preferably 10 ⁇ m or more, and more preferably 15 ⁇ m or more. This is because the wiring board 20 can be reinforced and damaged when at least the core resin layer 11 is separated and removed in the core resin layer separation and removal step described later.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means is preferably 70 ⁇ m or less. It is more preferably 50 ⁇ m or less, and even more preferably 30 ⁇ m or less. This is because it takes time to remove the remaining first metal layer 12 in the step of removing the first metal layer, which will be described later.
  • the first metal layer 12 can also be composed of a metal foil having a peeling layer as a peeling means.
  • the release layer is laminated so as to face the core resin layer 11 side.
  • the release layer include a layer containing at least a silicon compound.
  • the release layer can be formed by applying a silicon compound composed of a single silane compound or a combination of multiple silane compounds onto a metal foil.
  • the means for applying the silicon compound is not particularly limited, and for example, known means such as coating can be used.
  • An antirust treatment can be applied to the surface of the metal foil to be adhered to the release layer (to form an antirust treatment layer).
  • Rust prevention treatment can be performed using any one of nickel, tin, zinc, chromium, molybdenum, cobalt, or alloys thereof.
  • the thickness of the release layer is not particularly limited, but is preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 80 nm or less, and particularly preferably 20 nm or more and 60 nm or less, from the viewpoint of removability and peelability.
  • the metal foil a copper foil is preferable from the viewpoint of uniformity of thickness and corrosion resistance of the foil.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means for example, the thickness from the later-described first insulating layer 21 side end face to the peeling means is as described above. It is preferable to
  • the support 10 can be produced, for example, by stacking the core resin layer 11 and the first metal layer 12 and bonding them under heat and pressure.
  • the thickness of the support 10 can be, for example, 20 ⁇ m or more and 1000 ⁇ m or less, preferably 20 ⁇ m or more and 950 ⁇ m or less, and more preferably 20 ⁇ m or more and 900 ⁇ m or less.
  • the wiring board 20 has a first insulating layer 21 provided on and in contact with the first metal layer 12 and a first wiring conductor 22 provided on and in contact with the first insulating layer 21 . are doing.
  • the first insulating layer is provided with first non-through holes 21 ⁇ /b>A extending from the first wiring conductors 22 to the first metal layer 12 corresponding to the terminal positions of the wiring board 20 .
  • the terminal positions of the wiring board 20 are, for example, positions of external connection terminals when the wiring board 20 is mounted on an electronic device by soldering or the like.
  • a first connection via 21B connected to the first wiring conductor 22 is formed on the inner wall of the first non-through hole 21A.
  • the first connection via 21B is made of metal such as copper, for example.
  • the wiring board 20 includes, for example, a second insulating layer 23 on the first insulating layer 21 and the first wiring conductors 22, and a second wiring provided on the second insulating layer 23. and a conductor 24 .
  • the second insulating layer 23 is provided with, for example, a second non-through hole 23A reaching the first wiring conductor 22 .
  • a second connection via 23B for connecting the first wiring conductor 22 and the second wiring conductor 24 is formed on the inner wall of the second non-through hole 23A.
  • the second connection via 23B is made of metal such as copper, for example.
  • the wiring board 20 includes the (m+2)th insulating layer 25 on the second insulating layer 23 and the second wiring conductor 24 and the (m+2)th insulating layer 25 provided on the (m+2)th insulating layer 25 .
  • m+2) wiring conductors 26 may be stacked n times in this order.
  • m and n are integers of 1 or more, provided that m ⁇ n.
  • the number n of repetitions, that is, the number of layers to be stacked is appropriately set as desired, and is not particularly limited. Note that FIG. 1 shows a case where the number of repetitions n is three.
  • the (m+2)-th insulating layer 25 is provided with, for example, (m+2)-th non-through holes 25A reaching the (m+1)-th wiring conductors 22 and 25 .
  • An (m+2)th connection via 25B for connecting the (m+1)th wiring conductors 22 and 25 and the (m+2)th wiring conductor 26 is formed on the inner wall of the (m+2)th non-through hole 25A.
  • the (m+2)th connection via 25B is made of metal such as copper, for example.
  • the second wiring conductor 24 or the second The solder resist layer 27 may be provided so that the (n+2) wiring conductors 26 are partially exposed.
  • the portion of the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 is a terminal, for example, an internal connection terminal to which a semiconductor element is connected.
  • a protective plating layer 28 made of a gold plating layer or the like may be formed on the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 .
  • the first insulating layer 21 reinforces the wiring substrate 20 to suppress damage when the support 10 is separated, and functions as a solder resist layer after separation.
  • the first insulating layer 21 contains, for example, an insulating resin material, and can be composed of the insulating film material described in the core resin layer 11, prepreg, or the like.
  • the insulating resin material preferably has a glass transition temperature of 150° C. or higher. This is because if the glass transition temperature is lower than 150° C., the wiring substrate 20 may be damaged due to swelling during the processing process.
  • materials with excellent heat resistance such as polyimide resin, epoxy resin, cyanate resin, maleimide resin, modified polyphenylene ether, bismaleimide triazine resin, polyamideimide resin, polyamide
  • a nylon resin which is a resin, and a fluororesin.
  • the first insulating layer 21 may be composed of one layer, or may be composed of two or more layers made of different materials. When it is composed of two or more layers, film materials or prepregs made of different materials may be laminated, or film materials and prepregs may be laminated.
  • the thickness of the first insulating resin layer 21 is appropriately set as desired. is more preferable, and 1 ⁇ m or more and 9 ⁇ m or less is even more preferable. This is for reducing the total thickness of the wiring board 20 .
  • the first wiring conductor 22 is made of metal such as copper, for example.
  • the thickness of the first wiring conductor 22 is appropriately set as desired, and is not particularly limited. is more preferred.
  • the pattern width of the first wiring conductor 22 is not particularly limited, and the width can be appropriately selected according to the application. can do.
  • the second insulating layer 23 and the (m+2)-th insulating layer 25 are not particularly limited, but are made of, for example, the same material as the core resin layer 11 (eg, prepreg or insulating film material). be able to.
  • the thicknesses of the second insulating layer 23 and the (m+2)th insulating layer 25 are appropriately set as desired, and are not particularly limited. 50 ⁇ m or less is preferable, and 5 ⁇ m or more and 20 ⁇ m or less is more preferable.
  • the second wiring conductor 24 and the (m+2)th wiring conductor 26 are made of metal such as copper, for example.
  • the thickness and pattern width of the second wiring conductor 24 and the (m+2)th wiring conductor 26 are not particularly limited because they are appropriately set as desired. can be done.
  • the first manufacturing method of the wiring board 1 with a support includes, for example, a support preparing step, a first laminate forming step, a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, and a first wiring conductor forming step in this order, followed by a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and plating finishing.
  • the steps may be included in this order.
  • FIG. 2(A) it has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means.
  • a support 10 is prepared (support preparing step). Specifically, for example, a metal foil with a carrier or a metal foil having a release layer is placed on at least one side of the core resin layer 11 and heated and pressed to form the support 10 .
  • First laminate forming step> the surface of the first metal layer 12 of the support 10 is subjected to a roughening treatment as an adhesion treatment for obtaining adhesion to the first insulating layer 21 .
  • the roughening treatment is not particularly limited, and known means can be appropriately used, for example, means using a copper surface roughening liquid.
  • the first insulating layer 21 and the first metal foil 41 are formed in this order. Arrange, heat and pressurize to laminate (first laminate forming step).
  • the metal foil with a resin layer with a carrier is formed into a resin layer. (that is, the first insulating layer 21) is placed in contact with the first metal layer 12, and the first insulating layer 21 and the first metal foil 41 are separated by heating and pressurizing and separating the carrier. Laminate.
  • a portion of the first metal foil 41 is removed by etching to form the first non-through holes 21A in the first insulating layer 21.
  • a mask 42 is formed (mask forming step). Specifically, for example, a dry film resist is laminated on the first metal foil 41, exposed and developed to form a resist pattern, scum is removed, and then the first metal foil 41 is etched. Then, a mask 42 is formed and the resist pattern is removed.
  • the exposure and development of the dry film resist, scum removal, etching, and removal of the resist pattern are not particularly limited, and can be carried out using known means and devices.
  • ⁇ Blind hole forming step> Next, for example, as shown in FIG. 2D, the portions of the first insulating layer 21 that are not covered with the mask 42 are removed to form the first non-through holes 21A (non-through holes forming process).
  • the formation of the first non-through holes 21A can be performed, for example, by desmear treatment using an aqueous solution of sodium permanganate or the like, or laser processing using a carbon dioxide laser or the like. In the case of laser processing, after laser processing, desmear treatment is performed as necessary.
  • ⁇ Mask removal process> After forming the first non-through holes 21A, the mask 42 is removed, for example, as shown in FIG. 2(E).
  • the removal of the mask 42 can be performed, for example, by etching using an aqueous solution of ferric chloride.
  • Plating process After removing the mask 42, for example, as shown in FIG. to form a second metal layer 43 on the first insulating layer 21 and form a first connection via 21B connecting between the second metal layer 43 and the first metal layer 12. (plating process).
  • the method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed.
  • Plating is preferably electroless plating, and electrolytic plating may be performed in addition to electroless plating.
  • pattern plating step After forming a resist pattern 44 on the second metal layer 43, pattern plating is performed to form a pattern plating layer 45 (pattern plating step).
  • the resist pattern 44 can be formed, for example, by laminating a dry film resist, printing a circuit pattern on the dry film resist, and developing it. Printing and development are not particularly limited, and can be carried out using known means and devices. Pattern plating can be performed, for example, by pattern electroplating. Pattern electroplating is also not particularly limited, and known methods can be used as appropriate.
  • a first wiring conductor 22 is formed from the pattern plating layer 45 (first wiring conductor forming step).
  • the removal of the resist pattern 44 can be performed using known means and devices.
  • Etching of the second metal layer 43 can be performed, for example, by flash etching.
  • ⁇ Second Insulating Layer Forming Step/Second Wiring Conductor Forming Step> After forming the first wiring conductor 22, for example, as shown in FIG. , and a second wiring conductor 24 is formed thereon. Specifically, first, for example, the surface of the first wiring conductor 22 is subjected to roughening treatment as adhesion treatment for obtaining adhesion to the second insulating layer 23 . Next, for example, on the first insulating layer 21 and the first wiring conductor 22, a metal foil with a resin layer and a carrier is arranged so that the resin layer is in contact with the first wiring conductor 22, and heated and pressurized, By peeling off the carrier, the second insulating layer 23 and the second metal foil are laminated in this order.
  • the metal foil with a carrier with a resin layer is obtained by, for example, laminating a resin layer on the metal foil side of the metal foil with a carrier, the resin layer serving as the second insulating layer 23, and the metal foil serving as the second metal foil. (second insulating layer forming step).
  • a second non-through hole 23A reaching the first wiring conductor 22 is formed in the second metal foil and the second insulating layer 23 by laser processing using a carbon dioxide laser or the like. , desmear treatment using an aqueous solution of sodium permanganate or the like.
  • the second wiring conductor 24 is formed by a known method such as a subtractive method or a semi-additive method.
  • the subtractive method for example, first, at least one of electroless plating and electrolytic plating is applied to the surface on which the second non-through hole 23A is formed, and the first wiring is formed on the inner wall of the second non-through hole 23A.
  • a second connection via 23B connecting the conductor 22 and the second metal foil is formed, the thickness of the second metal foil is increased, and the surface is smoothed as necessary.
  • a dry film resist or the like is laminated, a negative mask is attached, a circuit pattern is printed, and an etching resist is formed by development.
  • the thickened second metal foil is etched using an etching resist as a mask to form the second wiring conductors 24, and the etching resist is removed (second wiring conductor forming step).
  • the second metal foil is completely removed by etching or the like to expose the first insulating layer 22 .
  • electroless plating is performed, for example, to form the second connection vias 23B on the inner walls of the second non-through holes 23A and form an electroless plating layer on the first insulating layer 22 .
  • a resist layer is provided by thermocompression bonding a dry film on the electroless plated layer, exposure and development are performed, a resist pattern is formed, and scum (resist residue) is removed.
  • an electrolytic plated layer is formed on the surface of the electroless copper plated layer by electrolytic plating, and after removing the resist pattern, the exposed electroless plated layer is etched, and electroless A second wiring conductor 24 consisting of a plated layer and an electrolytic plating layer is formed (second wiring conductor forming step).
  • ⁇ Build-up process> After forming the second insulating layer 23 and the second wiring conductor 24, for example, as shown in FIG. The process may be repeated n times to form a buildup structure having (n+2) layers of wiring conductors. Specifically, for example, the (m+2)th insulating layer forming the (m+2)th insulating layer 25 on the (m+1)th insulating layers 23 and 25 and the (m+1)th wiring conductors 24 and 26 Formation step, forming the (m+2)th non-through hole 25A reaching the (m+1)th wiring conductors 24 and 26 in the (m+2)th insulating layer 25, and forming the (m+2)th non-through hole 25A At least one of electrolytic plating and electroless plating is applied to the coated surface to form the (m+2)th wiring conductor 26, and the (m+2)th wiring conductor forming step is performed n times in this order to form a buildup structure. (build-up process). m and n are integers of 1 or more, provided
  • solder Resist Layer Forming Step> After forming the second insulating layer 23 and the second wiring conductor 24, or after forming the (n+2)th insulating layer 25 and the (n+2)th wiring conductor 26, for example, a second The solder-resist layer 27 is formed so that the second wiring conductor 24 or the (n+2)-th wiring conductor 26 is partially exposed (solder-resist layer forming step).
  • a method for forming the solder resist layer 27 is not particularly limited, and known means can be appropriately employed.
  • a protective plating layer 28 is formed, for example, on the second wiring conductor 24 or the (n+2)-th wiring conductor 26 exposed from the solder-resist layer 27 . Thereby, the wiring substrate 1 with the support shown in FIG. 1 is obtained.
  • FIG. 4 shows the steps of the second manufacturing method of the wiring board 1 with support.
  • the second manufacturing method includes, for example, a support preparing step, a first laminate forming step, a non-through hole forming step, a plating step, and a first wiring conductor forming step in this order, and further , a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step in this order.
  • a support preparing process, a first laminate forming process, a second insulating layer forming process, a second wiring conductor forming process, a build-up process, a solder resist layer forming process, and a plating finishing process are the same as the first manufacturing method. Therefore, each step different from the first manufacturing method, that is, the non-through hole forming step, the plating step, and the first wiring conductor forming step will be described.
  • ⁇ Blind hole forming step> After laminating the first insulating layer 21 and the first metal foil 41, for example, as shown in FIG. 4D-2, a laser such as a carbon dioxide laser is irradiated from the surface of the first metal foil 41. Then, the first metal foil 41 and the first insulating layer 21 are perforated to form the first non-through holes 21A reaching the first metal layer 12 (non-through hole forming step). Next, desmear processing is performed as necessary.
  • first non-through holes 21A for example, as shown in FIG.
  • At least one of plating and electrolytic plating is applied to form first connection vias 21B for connecting the first metal layer 12 and the first metal foil 41 to the inner walls of the first non-through holes 21A, and the first connection vias 21B are formed. to increase the thickness of the metal foil 41 (plating step).
  • the surface is leveled as necessary.
  • the method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed.
  • a dry film resist or the like is laminated on the first metal foil 41, a negative mask is pasted thereon, a circuit pattern is printed, and developed. An etching resist is formed.
  • the thickened first metal foil 41 is etched using an etching resist as a mask to form the first wiring conductors 22, and the etching resist is removed (first wiring conductor forming step).
  • the wiring board 1 with a support can be manufactured by the second manufacturing method as well as the first manufacturing method.
  • the wiring board 1 with support can be used for manufacturing an electronic component mounting board.
  • FIG. 5 shows the steps of the first manufacturing method of the electronic component mounting board.
  • a first method for manufacturing an electronic component mounting board includes, for example, a step of manufacturing a wiring board 1 with a support, a core resin layer separating and removing step, a first metal layer removing step, and a mounting step in this order. I'm in.
  • the manufacturing process of the wiring board with support 1 can include each process of the first manufacturing method or the second manufacturing method of the wiring board with support 1 described above, and at least includes the process of preparing the support to the second manufacturing method. At least a wiring conductor forming step is included.
  • the core resin layer 11 is separated and removed from the wiring board 20 (core resin layer separating and removing step). Specifically, for example, the core resin layer 11 is separated and removed from the wiring substrate 20 on which at least the first wiring conductors 22 and the second wiring conductors 24 are formed. Separation and removal of the core resin layer 11 is performed, for example, by peeling with a peeling means (for example, a peeling layer or a peeling layer). Either physical means or chemical means can be employed for peeling, but it is preferable to apply physical force to the peeling means and peel by physical means, for example.
  • a peeling means for example, a peeling layer or a peeling layer
  • the core resin layer 11 and, in some cases, part of the first metal layer 12 are peeled off. At least part of the peeling means of the first metal layer 12 may be peeled together with at least the core resin layer 11, or may remain without being peeled off.
  • first metal layer removing step After separating and removing the core resin layer 11, for example, as shown in FIG. 5B, the remaining first metal layer 12 is removed (first metal layer removing step).
  • the means for removing the first metal layer 12 is not particularly limited, but it can be removed using, for example, a sulfuric acid-based or hydrogen peroxide-based etchant.
  • the sulfuric acid-based or hydrogen peroxide-based etchant is not particularly limited, and those used in the industry can be used.
  • the wiring board 20 can be reinforced by the first insulating layer 21, so that the wiring board 20 is prevented from being damaged when the support 10 is separated and removed. can do.
  • the first insulating layer 21 since the first insulating layer 21 has openings at the terminal positions and covers the rest, it can be used without forming a solder resist layer.
  • a protective plating layer 29 is formed on the first connection via 21B exposed from the first insulating layer 21. .
  • the second wiring conductor 24 or the (n+2)th wiring conductor 24 exposed from the solder-resist layer 27 is formed.
  • the protective plating layer 28 may be formed together with the protective plating layer 29 .
  • the semiconductor element 30 is mounted on the wiring substrate 20 via the solder balls 31 (mounting step).
  • the method of mounting the semiconductor element 30 on the wiring board 20 is not limited to the method using solder balls, and for example, a method of mounting a bare chip by ball bonding of gold wires to aluminum electrodes can be used.
  • FIG. 5 shows the case where one semiconductor element 30 is mounted, a plurality of semiconductor elements 30 may be mounted, and electronic components other than the semiconductor elements 30 may be mounted.
  • FIG. 6 shows the steps of the second manufacturing method of the wiring board 1 with support.
  • the second method for manufacturing an electronic component mounting board includes, for example, a process of manufacturing a wiring board 1 with a support, a mounting process (see FIG. 6A), and a core resin layer separating and removing process (see FIG. 6B). ) and a first metal layer removing step in this order. That is, the second manufacturing method of the electronic component mounting board is the same as the first manufacturing method of the electronic component mounting board except that the semiconductor element 30 is mounted before the support 10 is separated and removed. The contents of each step are as described above.
  • the first insulating layer 21 having the first non-through holes 21A corresponding to the terminal positions is provided on and in contact with the first metal layer 12, and Since the first wiring conductor 22 is provided on and in contact with the first insulating layer 21, the wiring board 20 can be reinforced by the first insulating layer 21, and the support 10 is separated and removed. It is possible to suppress damage to the wiring board 20 over time.
  • the first insulating layer 21 since the first insulating layer 21 has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
  • Example 1 After manufacturing the wiring board 1 with the support as follows, the support 10 was separated and removed from the wiring board 20 .
  • ⁇ Support Preparing Step> See FIG. 2(A)
  • a prepreg (thickness: 0.100 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS ST56) that is B-staged by impregnating a glass cloth (glass fiber) with a bismaleimide triazine resin (BT resin) is used as a core resin layer 11.
  • BT resin bismaleimide triazine resin
  • an ultra-thin copper foil with a carrier copper foil having a thickness of 18 ⁇ m as the first metal layer 12 (ultra-thin copper foil; thickness 5 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18SD-H -T5) is placed so that the carrier copper foil side is in contact with the core resin layer 11, and vacuum pressing is performed under the conditions of a temperature of 220 ⁇ 2 ° C., a pressure of 3 ⁇ 0.2 MPa, and a holding time of 60 minutes to form the core resin layer.
  • a support 10 having a first metal layer 12 provided on both sides of 11 was produced.
  • the resin composition was diluted with N-methyl-2-pyrrolidone, and the resulting varnish was coated with a bar coater using an ultrathin copper foil with a carrier copper foil having a thickness of 18 ⁇ m (ultrathin copper foil (metal layer); thickness 3 ⁇ m: Mitsui Metal Mining Co., Ltd., product name: MT18FL) was applied to the matte surface side.
  • the coating film is dried by heating at 180° C. for 10 minutes to form a first insulating layer 21 having a thickness of 2.5 ⁇ m on the ultra-thin metal foil with a carrier. was made.
  • the glass transition temperature of the resin material forming the first insulating layer 21 is 260.degree.
  • the surface of the first metal layer 12 of the support 10 was roughened using a copper surface roughening liquid CZ-8101 (manufactured by MEC Co., Ltd., product name).
  • CZ-8101 manufactured by MEC Co., Ltd., product name.
  • the ultra-thin copper foil with a carrier copper foil with a resin layer was placed so that the resin layer (that is, the first insulating layer 21) was in contact with the first metal layer 12, and the pressure was 3 ⁇ 0.2 MPa. Vacuum pressing was performed under conditions of a temperature of 220 ⁇ 2° C. and a holding time of 60 minutes. Thereafter, the carrier copper foil with a thickness of 18 ⁇ m was peeled off, and the first insulating layer 21 and the first metal foil 41 with a thickness of 3 ⁇ m were laminated on the first metal layer 12 .
  • ⁇ Mask Forming Process> (See FIG. 2(C)) A dry film resist was laminated on the first metal foil 41, exposed and developed to form a resist pattern.
  • RD-1207 manufactured by Hitachi Chemical Co., Ltd. with a thickness of 7 ⁇ m was used as a dry film resist, and an ONC apparatus was used as a laminator.
  • the lamination pressure was 0.4 MPa and the lamination temperature was 110°C.
  • INPREX3650 manufactured by ADTEC Engineering Co., Ltd. was used for exposure.
  • a potassium carbonate aqueous solution was used for development after exposure.
  • An apparatus manufactured by Tokyo Kakoki Co., Ltd. was used at a liquid temperature of 30°C. Descumming was then performed.
  • Scum removal was performed by plasma cleaning using an apparatus of Nordson Advanced Technologies, Inc. Argon, nitrogen, oxygen, and tetrafluoromethane were used as gases. Subsequently, the first metal foil 41 was etched to form a mask 42, and the resist pattern was removed. Etching used hydrochloric acid and cupric chloride aqueous solution. R-100S manufactured by Mitsubishi Gas Chemical Co., Ltd. was used to remove the resist pattern. A spray type apparatus manufactured by Tokyo Kakoki Co., Ltd. was used for the steps from development to etching and peeling.
  • ⁇ Non-through hole forming step> (see FIG. 2(D))
  • desmear treatment is performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C. and a concentration of 55 ⁇ 10 g/L to remove the portion of the first insulating layer 21 not covered with the mask 42 .
  • a first non-through hole 21A reaching the first metal layer 12 was formed.
  • an up-death process manufactured by Uyemura & Co., Ltd. was used for the desmearing process.
  • the swelling liquid used was Updes MDS-37
  • the etching liquid used was a mixture of Updes MDE-40 and ELC-SH
  • the neutralization used Updes MDN-62 The temperature of the etching tank was set at 80° C., and the immersion was performed for 10 minutes.
  • ⁇ Mask removal step> (see FIG. 2(E)) After forming the first non-through holes 21A, the mask 42 was removed by etching with an aqueous solution of ferric chloride to expose the first insulating layer 21 over the entire surface.
  • the surface of the first insulating layer 21 was electroless copper plated to a thickness of 0.4 ⁇ m to 0.8 ⁇ m to form a second metal layer 43 .
  • the chemical solution a mixture of Sulcup PEA manufactured by Uyemura & Co., Ltd. and formaldehyde was used.
  • the chemical solution temperature of the electroless copper plating was 36° C., and the processing time was 10 minutes.
  • the inner walls of the first non-through holes 21A were connected by plating, and the first metal layer 12 and the second metal layer 43 were electrically connected by the first connection vias 21B.
  • ⁇ Pattern Plating Process> (See FIG. 3(G))
  • a dry film resist LDF515F (Nikko Materials Co., Ltd.) having a thickness of 15 ⁇ m is applied to the second metal layer 43 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa. product name) was laminated.
  • the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 .
  • a pattern plating layer 45 was formed by performing pattern electrolytic copper plating of about 5 ⁇ m to 15 ⁇ m on a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L.
  • an ultra-thin copper foil with a carrier copper foil with a resin layer (ultra-thin copper foil (metal layer); thickness 3 ⁇ m, resin layer thickness 0.015 mm;
  • a carrier copper foil thickness of 18 ⁇ m: manufactured by Mitsubishi Gas Chemical Co., Ltd., product name: CRS381NSI) is placed so that the resin layer is in contact with the first wiring conductor 22, and the pressure is 3 ⁇ 0.2 MPa, the temperature is 220 ⁇ 2 ° C., and the temperature is maintained.
  • the second insulating layer 23 and the second metal foil having a thickness of 3 ⁇ m were laminated on the first wiring conductor 22 by vacuum pressing for 60 minutes and peeling off the carrier copper foil.
  • electroless copper plating was applied to a thickness of 0.4 ⁇ m to 0.8 ⁇ m
  • electrolytic copper plating was applied to a thickness of 5 ⁇ m to 20 ⁇ m.
  • a second connection via 23B for connecting the first wiring conductor 22 and the second metal foil is formed on the inner wall of the second non-through hole 23A, and the thickness of the second metal foil is increased.
  • the surface of the second metal foil was smoothed, and a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated under the conditions of a temperature of 110 ⁇ 10 ° C. and a pressure of 0.50 ⁇ 0.02 MPa. .
  • a negative mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the etching resist was removed using an aqueous sodium hydroxide solution to form the second wiring conductor 24 .
  • solder Resist Layer Forming Step> After stacking the fifth insulating layer 25 and the fifth wiring conductor 26, a solder resist layer 27 having a thickness of 10 ⁇ m was formed thereon so that the fifth wiring conductor 26 was partially exposed.
  • a protective plating layer 28 was formed on the fifth wiring conductor 26 exposed from the solder resist layer 27 .
  • a wiring board 1 with a support was obtained (see FIG. 1).
  • first metal layer removal step> (see FIGS. 5A and 5B) Physical force was applied to the interface between the ultra-thin copper foil of the first metal layer 12 and the carrier copper foil of the obtained wiring board 1 with a support, and at least the core resin layer 11 was peeled off and removed. Next, the remaining first metal layer 12 (ultrathin copper foil) was removed using a perhydrate sulfuric acid-based soft etchant to obtain a set of wiring boards 20 . No breakage was found in the wiring board 20 obtained in Example 1, and a good wiring board 20 was obtained.
  • Example 2 In the same manner as in Example 1, a support preparation step, a first laminate formation step, and a mask formation step were performed (see FIGS. 2A to 2C).
  • the carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) is used instead of desmear treatment to form the first non-through hole 21A.
  • a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer/second wiring conductor forming step, a build-up step, and a solder resist layer were carried out to obtain a wiring board 1 with a support (see FIGS. 2(E) to 3(J) and FIG. 1).
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 2, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 3 In the same manner as in Example 1, the support preparation step and the first laminate formation step were performed (see FIGS. 2A and 2B). Next, a carbon dioxide laser is irradiated from the surface of the first metal foil 41 using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation. A hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)). Subsequently, desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C.
  • a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa.
  • a mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG.
  • Example 2 After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 3, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 4 In the same manner as in Example 1, a support preparation step, a first laminate formation step, a mask formation step, a non-through hole formation step, a mask removal step, a plating step, a pattern plating step, and a first wiring conductor formation. Steps were performed (see FIGS. 2A to 3H).
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 ⁇ m (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side.
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 4, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 5 A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)).
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 ⁇ m (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side.
  • the first insulating layer in the same manner as in Example 1 except that it was placed in contact with and vacuum pressed under the conditions of a temperature of 220 ⁇ 2 ° C., a pressure of 3 ⁇ 0.2 MPa, and a holding time of 60 minutes. 21 and the first metal foil 41 were laminated (first laminate forming step; see FIG. 2(B)).
  • the glass transition temperature of the resin material contained in the first insulating layer 21 is 270.degree.
  • a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer and a second wiring were carried out to obtain a wiring board 1 with a support (see FIGS. 2(C) to 3(J) and FIG. 1).
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 5, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 6 A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)).
  • the resin composition for forming the first insulating layer 21 in Example 1 oligophenylene ether resin (product name: OPE-2St2200, manufactured by Mitsubishi Gas Chemical Company, Inc.) 15.0 parts by mass, polyimide resin (product name: Neoprim (registered trademark) S100, manufactured by Mitsubishi Gas Chemical Co., Ltd.) 49.9 parts by mass, 2,2-bis-(4-(4-maleimidophenoxy)phenyl) propane (product name: BMI-80, K-I Kasei Co., Ltd.) 34.9 parts by mass, 2,4,5-triphenylimidazole (manufactured by Tokyo Chemical Industry Co., Ltd.) 0.2 parts by mass) in the same manner as in Example 1, carrier copper with a resin layer A foil-attached ultra-thin copper foil was prepared and laminated on the surface of the first metal layer 12, and then the carrier copper foil was peeled off
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL -830NS SV63), and on top of that, an ultra-thin copper foil with a carrier copper foil (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL),
  • the ultra-thin copper foil side was placed in contact with the prepreg and vacuum pressed under the conditions of a pressure of 3 ⁇ 0.2 MPa, a temperature of 220 ⁇ 2° C., and a holding time of 60 minutes to separate the carrier copper foil.
  • the first insulating layer 21 having a two-layer structure of the resin layer and the prepreg and the first metal foil 41 were laminated on the first metal layer 12 (first laminate forming step; FIG. 2(B)).
  • the glass transition temperature of the resin material forming the resin layer of the first insulating layer 21 is 260°C, and the glass transition temperature of the resin material contained in the prepreg is 270°C.
  • the surface of the first metal foil 41 is irradiated with a carbon dioxide laser using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation.
  • a hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)).
  • desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C. and a concentration of 55 ⁇ 10 g/L.
  • electroless copper plating was applied to a thickness of 0.4 ⁇ m to 0.8 ⁇ m, and electrolytic copper plating was applied to a thickness of 5 ⁇ m to 20 ⁇ m.
  • a first connection via 21B connecting the first metal layer 12 and the first metal foil 41 is formed on the inner wall of the first non-through hole 21A, and the thickness of the first metal foil 41 is reduced. increased (plating process; see FIG. 4 (F-2)). After that, the surface of the first metal foil 41 was smoothed.
  • a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa.
  • a mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG.
  • Example 2 After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 6, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 1 A support preparation step was carried out in the same manner as in Example 1. Next, in the pattern plating step, the first metal layer 12 of the support 10 is subjected to temperature A dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) having a thickness of 15 ⁇ m was laminated under conditions of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa. After the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 .
  • LDF515F manufactured by Nikko Materials Co., Ltd., product name
  • a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L was used to perform pattern electrolytic copper plating to a thickness of about 5 ⁇ m to 15 ⁇ m to form a pattern plating layer 45 .
  • the resist pattern 44 was peeled off using an amine-based resist stripper. After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step and a build-up step were carried out. Next, an attempt was made to separate and remove the support without carrying out the solder resist layer forming step, but the wiring board was damaged and no wiring board could be obtained.
  • the wiring board 20 can be reinforced by the first insulating layer 21, and damage to the wiring board 20 can be suppressed when the core resin layer 11 is separated and removed. Do you get it.
  • It can be used for printed wiring boards and package substrates for mounting semiconductor devices.
  • SYMBOLS 1... Wiring board with support, 10... Support, 11... Core resin layer, 12... First metal layer, 20... Wiring board, 21... First insulating layer, 21A... First non-through hole, 21B 1st connection via 22 1st wiring conductor 23 2nd insulating layer 23A 2nd non-through hole 23B 2nd connection via 24 2nd wiring conductor 25 (m+2)-th insulating layer, 25A... (m+2)-th non-through hole, 25B... (m+2)-th connection via, 26... (m+2)-th wiring conductor, 27... solder resist layer, 28, 29... protection Plating layer 30 Semiconductor element 31 Solder ball 41 First metal foil 42 Mask 43 Second metal layer 44 Resist pattern 45 Pattern plating layer

Abstract

Provided are: a wiring board with a support with which breakage when separating and removing the support can be suppressed; a method for manufacturing the same; and a method for manufacturing an electronic component mounting board using the same. The present invention comprises: a support (10) in which a first metal layer (12) having a peeling means is provided on at least one surface side of a core resin layer (11); and a wiring board (20) provided on the first metal layer (12). The wiring board (20) has a first insulation layer (21) provided in contact with the top of the first metal layer (12), and a first wiring conductor (22) provided in contact with the top of the first insulation layer (21). The first insulation layer (21) is provided with a first partial-through hole (21A) corresponding to a terminal position of the wiring board (20). A first connection via (21B) connected to the first wiring conductor (22) is formed on an inner wall of the first partial-through hole (21A).

Description

支持体付き配線基板、支持体付き配線基板の製造方法、及び、電子部品実装基板の製造方法Wiring board with support, method for manufacturing wiring board with support, and method for manufacturing electronic component mounting board
 本発明は、支持体付き配線基板及びその製造方法、並びに、それを用いた電子部品実装基板の製造方法に関する。 The present invention relates to a wiring board with a support, a method for manufacturing the same, and a method for manufacturing an electronic component mounting board using the same.
 電子機器、通信機器及びパーソナルコンピューターなどに広く用いられる半導体パッケージの高機能化及び小型化は、近年、益々加速している。それに伴い、半導体パッケージにおけるプリント配線板及び半導体素子搭載用パッケージ基板の薄型化が要求されている。薄型化したプリント配線板及び半導体素子搭載用パッケージ基板としては、例えば、支持体に絶縁層と配線導体とを積層して配線基板を形成した後、配線基板から支持体を剥離したいわゆるコアレス基板が知られている(例えば、特許文献1参照)。 In recent years, the sophistication and miniaturization of semiconductor packages, which are widely used in electronic devices, communication devices, personal computers, etc., are accelerating more and more. Along with this, there is a demand for thinner printed wiring boards and package substrates for mounting semiconductor elements in semiconductor packages. As thin printed wiring boards and package substrates for mounting semiconductor elements, for example, there is a so-called coreless substrate obtained by laminating an insulating layer and wiring conductors on a support to form a wiring board, and then peeling off the support from the wiring board. known (see, for example, Patent Document 1).
国際公開WO2020/121652号公報International publication WO2020/121652
 しかしながら、このようなコアレス基板では、絶縁層や配線導体の厚みが薄くなるに従い、支持体を分離除去する際に絶縁層や配線導体が破損してしまう場合があるという問題があった。 However, in such a coreless substrate, as the thickness of the insulating layer and the wiring conductor becomes thinner, there is a problem that the insulating layer and the wiring conductor may be damaged when the support is separated and removed.
 本発明は、このような問題に基づきなされたものであり、支持体を分離除去する際における破損を抑制することができる支持体付き配線基板及びその製造方法、並びに、それを用いた電子部品実装基板の製造方法を提供することを目的とする。 The present invention has been made based on such problems, and provides a wiring board with a support capable of suppressing breakage during separation and removal of the support, a method for manufacturing the same, and electronic component mounting using the same. It aims at providing the manufacturing method of a board|substrate.
 本発明は以下の通りである。
[1]
 コア樹脂層の少なくとも一方の面側に剥離手段を有する第1の金属層が設けられた支持体と、前記第1の金属層の上に設けられた配線基板とを備えた支持体付き配線基板であって、
 前記配線基板は、前記第1の金属層の上に接して設けられた第1の絶縁層と、前記第1の絶縁層の上に接して設けられた第1の配線導体とを有し、
 前記第1の絶縁層には、前記配線基板の端子位置に対応して、前記第1の配線導体から前記第1の金属層に達する第1の非貫通孔が設けられ、
 前記第1の非貫通孔の内壁には前記第1の配線導体に接続された第1の接続ビアが形成された、支持体付き配線基板。
[2]
 前記第1の絶縁層は絶縁性の樹脂材料を含んでおり、前記樹脂材料のガラス転移温度は150℃以上である、[1]記載の支持体付き配線基板。
[3]
 前記第1の絶縁層の厚みは、9μm以下である、[1]記載の支持体付き配線基板。
[4]
 前記第1の金属層における前記第1の絶縁層の側の端面から前記剥離手段までの厚みが、6μm以上である、[1]記載の支持体付き配線基板。
The present invention is as follows.
[1]
A wiring board with a support, comprising a support provided with a first metal layer having a peeling means on at least one surface side of a core resin layer, and a wiring board provided on the first metal layer. and
The wiring board has a first insulating layer provided on and in contact with the first metal layer, and a first wiring conductor provided on and in contact with the first insulating layer,
The first insulating layer is provided with a first non-through hole extending from the first wiring conductor to the first metal layer corresponding to the terminal position of the wiring board,
A wiring substrate with support, wherein a first connection via connected to the first wiring conductor is formed on an inner wall of the first non-through hole.
[2]
The wiring board with support according to [1], wherein the first insulating layer contains an insulating resin material, and the resin material has a glass transition temperature of 150° C. or higher.
[3]
The wiring board with support according to [1], wherein the first insulating layer has a thickness of 9 μm or less.
[4]
The wiring board with support according to [1], wherein the thickness from the end surface of the first metal layer on the first insulating layer side to the peeling means is 6 μm or more.
[5]
 コア樹脂層と、前記コア樹脂層の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層と、を有する支持体を準備する支持体準備工程と、
 前記第1の金属層の上に、第1の絶縁層と、第1の金属箔と、をこの順で配置し、加熱及び加圧して積層する第1の積層体形成工程と、
 前記第1の金属箔の一部をエッチングにより除去し、前記第1の絶縁層に第1の非貫通孔を形成するためのマスクを形成するマスク形成工程と、
 前記第1の絶縁層のうち、前記マスクで覆われていない部分を除去し、第1の非貫通孔を形成する非貫通孔形成工程と、
 前記第1の非貫通孔を形成した後、前記マスクを除去するマスク除去工程と、
 前記第1の絶縁層の表面及び前記第1の非貫通孔の内壁に対して無電解めっき及び電解めっきの少なくとも一方を施して、前記第1の絶縁層上に第2の金属層を形成すると共に、前記第2の金属層と前記第1の金属層との層間を接続する第1の接続ビアを形成するめっき工程と、
 前記第2の金属層上にレジストパターンを形成した後、パターンめっきを施すパターンめっき工程と、
 前記レジストパターンを除去し、さらに露出した前記第2の金属層をエッチングで除去して、第1の配線導体を形成する第1の配線導体形成工程と、
 を含む支持体付き配線基板の製造方法。
[6]
 コア樹脂層と、前記コア樹脂層の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層と、を有する支持体を準備する支持体準備工程と、
 前記第1の金属層の上に、第1の絶縁層と、第1の金属箔と、をこの順で配置し、加熱及び加圧して積層する第1の積層体形成工程と、
 前記第1の金属箔の表面からレーザーを照射して前記第1の金属箔及び前記第1の絶縁層を穴開けし、前記第1の金属層に到達する第1の非貫通孔を形成する非貫通孔形成工程と、
 前記第1の非貫通孔の内壁に対して無電解めっき及び電解めっきの少なくとも一方を施して、前記第1の金属箔と前記第1の金属層との層間を接続する第1の接続ビアを形成するめっき工程と、
 前記第1の金属箔をパターニングして第1の配線導体を形成する第1の配線導体形成工程と、
 を含む支持体付き配線基板の製造方法。
[7]
 前記第1の金属層における前記第1の絶縁層の側の端面から前記剥離手段までの厚みを6μm以上とする、[5]又は[6]記載の支持体付き配線基板の製造方法。
[5]
a support preparation step of preparing a support having a core resin layer and a first metal layer provided on at least one side of the core resin layer and provided with a peeling means;
a first laminate forming step of placing a first insulating layer and a first metal foil in this order on the first metal layer and laminating them by heating and pressurizing;
a mask forming step of removing a portion of the first metal foil by etching to form a mask for forming a first non-through hole in the first insulating layer;
a non-through hole forming step of removing a portion of the first insulating layer not covered with the mask to form a first non-through hole;
a mask removing step of removing the mask after forming the first non-through hole;
At least one of electroless plating and electrolytic plating is applied to the surface of the first insulating layer and the inner wall of the first non-through hole to form a second metal layer on the first insulating layer. a plating step of forming a first connection via connecting between the second metal layer and the first metal layer;
a pattern plating step of performing pattern plating after forming a resist pattern on the second metal layer;
a first wiring conductor forming step of removing the resist pattern and further removing the exposed second metal layer by etching to form a first wiring conductor;
A method for manufacturing a wiring board with a support.
[6]
a support preparation step of preparing a support having a core resin layer and a first metal layer provided on at least one side of the core resin layer and provided with a peeling means;
a first laminate forming step of placing a first insulating layer and a first metal foil in this order on the first metal layer and laminating them by heating and pressurizing;
A laser is irradiated from the surface of the first metal foil to perforate the first metal foil and the first insulating layer to form a first non-through hole reaching the first metal layer. a non-through hole forming step;
At least one of electroless plating and electrolytic plating is applied to the inner wall of the first non-through hole to form a first connection via connecting between the first metal foil and the first metal layer. a plating process to form;
a first wiring conductor forming step of patterning the first metal foil to form a first wiring conductor;
A method for manufacturing a wiring board with a support.
[7]
The method for manufacturing a wiring board with support according to [5] or [6], wherein the thickness of the first metal layer from the end face of the first insulating layer side to the peeling means is 6 μm or more.
[8]
 [5]又は[6]記載の支持体付き配線基板の製造方法の各工程と、
 前記第1の配線導体形成工程の後、第1の絶縁層及び第1の配線導体の上に、第2の絶縁層を形成する第2の絶縁層形成工程と、
 前記第2の絶縁層に前記第1の配線導体に達する第2の非貫通孔を形成し、前記第2の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第2の配線導体を形成する第2の配線導体形成工程と、
 前記第1の配線導体及び前記第2の配線導体を形成した配線基板から、前記コア樹脂層を分離除去するコア樹脂層分離除去工程と、
 前記コア樹脂層分離除去工程の後、前記第1の金属層を除去する第1の金属層除去工程と、
 前記第1の金属層除去工程の後、前記配線基板に半導体素子を実装する実装工程と、
 を含む電子部品実装基板の製造方法。
[9]
 前記第1の金属層除去工程の後、前記第1の接続ビアの上に保護めっき層を形成するめっき仕上げ工程を更に含む、[8]記載の電子部品実装基板の製造方法。
[10]
 前記第2の配線導体形成工程と前記コア樹脂層分離除去工程との間に、前記第2の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、[8]記載の電子部品実装基板の製造方法。
[11]
 前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第2の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、[10]記載の電子部品実装基板の製造方法。
[12]
 前記第2の配線導体形成工程と前記コア樹脂層分離除去工程との間に、第(m+1)の絶縁層及び第(m+1)の配線導体の上に、第(m+2)の絶縁層を形成する第(m+2)の絶縁層形成工程、及び、前記第(m+2)の絶縁層に前記第(m+1)の配線導体に達する第(m+2)の非貫通孔を形成し、前記第(m+2)の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第(m+2)の配線導体を形成する第(m+2)の配線導体形成工程を、この順にn回繰り返し行い、ビルドアップ構造を形成するビルドアップ工程(m及びnは1以上の整数、但し、m≦n)を更に含む、[8]記載の電子部品実装基板の製造方法。
[13]
 前記ビルドアップ工程と前記コア樹脂層分離除去工程との間に、前記第(m+2)の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、[12]記載の電子部品実装基板の製造方法。
[14]
 前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第(m+2)の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、[13]記載の電子部品実装基板の製造方法。
[8]
each step of the method for manufacturing a wiring board with a support according to [5] or [6];
After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor;
A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed. , a second wiring conductor forming step of forming a second wiring conductor;
a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board on which the first wiring conductor and the second wiring conductor are formed;
a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
a mounting step of mounting a semiconductor element on the wiring board after the first metal layer removing step;
A method of manufacturing an electronic component mounting board including
[9]
The method for manufacturing an electronic component mounting board according to [8], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
[10]
Between the second wiring conductor forming step and the core resin layer separating and removing step, a solder resist layer forming step of forming a solder resist layer so that the second wiring conductor is partially exposed. [8] A method for manufacturing an electronic component mounting board according to the above.
[11]
The method for manufacturing an electronic component mounted board according to [10], further comprising a plating finishing step of forming a protective plating layer on the second wiring conductor between the solder resist layer forming step and the mounting step.
[12]
Between the second wiring conductor forming step and the core resin layer separating and removing step, an (m+2)th insulating layer is formed on the (m+1)th insulating layer and the (m+1)th wiring conductor. forming an (m+2)-th insulating layer forming step, and forming an (m+2)-th non-through hole reaching the (m+1)-th wiring conductor in the (m+2)-th insulating layer; The (m+2)-th wiring conductor forming step of forming the (m+2)-th wiring conductor by applying at least one of electrolytic plating and electroless plating to the surface in which the through holes are formed is repeated in this order n times, and the build The method for manufacturing an electronic component mounting board according to [8], further including a build-up step (m and n are integers equal to or greater than 1, where m≦n) for forming a build-up structure.
[13]
Further comprising, between the build-up step and the core resin layer separating and removing step, a solder-resist layer forming step of forming a solder-resist layer so that the (m+2)-th wiring conductor is partially exposed, [12 ] The method for manufacturing the electronic component mounting board according to the above.
[14]
Manufacture of an electronic component mounting board according to [13], further comprising a plating finishing step of forming a protective plating layer on the (m+2)th wiring conductor between the solder resist layer forming step and the mounting step. Method.
[15]
 [5]又は[6]記載の支持体付き配線基板の製造方法の各工程と、
 前記第1の配線導体形成工程の後、第1の絶縁層及び第1の配線導体の上に、第2の絶縁層を形成する第2の絶縁層形成工程と、
 前記第2の絶縁層に前記第1の配線導体に達する第2の非貫通孔を形成し、前記第2の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第2の配線導体を形成する第2の配線導体形成工程と、
 前記第1の配線導体及び前記第2の配線導体を形成した配線基板に、半導体素子を実装する実装工程と、
 前記実装工程の後、前記配線基板から前記コア樹脂層を分離除去するコア樹脂層分離除去工程と、
 前記コア樹脂層分離除去工程の後、前記第1の金属層を除去する第1の金属層除去工程と、
 を含む電子部品実装基板の製造方法。
[16]
 前記第1の金属層除去工程の後、前記第1の接続ビアの上に保護めっき層を形成するめっき仕上げ工程を更に含む、[15]記載の電子部品実装基板の製造方法。
[17]
 前記第2の配線導体形成工程と前記実装工程との間に、前記第2の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、[15]記載の電子部品実装基板の製造方法。
[18]
 前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第2の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、[17]記載の電子部品実装基板の製造方法。
[19]
 前記第2の配線導体形成工程と前記実装工程との間に、第(m+1)の絶縁層及び第(m+1)の配線導体の上に、第(m+2)の絶縁層を形成する第(m+2)の絶縁層形成工程、及び、前記第(m+2)の絶縁層に前記第(m+1)の配線導体に達する第(m+2)の非貫通孔を形成し、前記第(m+2)の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第(m+2)の配線導体を形成する第(m+2)の配線導体形成工程を、この順にn回繰り返し行い、ビルドアップ構造を形成するビルドアップ工程(m及びnは1以上の整数、但し、m≦n)を更に含む、[15]記載の電子部品実装基板の製造方法。
[20]
 前記ビルドアップ工程と前記実装工程との間に、前記第(m+2)の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、[19]記載の電子部品実装基板の製造方法。
[21]
 前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第(m+2)の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、[20]記載の電子部品実装基板の製造方法。
[15]
each step of the method for manufacturing a wiring board with a support according to [5] or [6];
After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor;
A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed. , a second wiring conductor forming step of forming a second wiring conductor;
a mounting step of mounting a semiconductor element on a wiring board on which the first wiring conductor and the second wiring conductor are formed;
a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board after the mounting step;
a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
A method of manufacturing an electronic component mounting board including
[16]
The method for manufacturing an electronic component mounting board according to [15], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
[17]
[15], further comprising, between the second wiring conductor forming step and the mounting step, a solder resist layer forming step of forming a solder resist layer so that the second wiring conductor is partially exposed. A method for manufacturing an electronic component mounting board.
[18]
The method for manufacturing an electronic component mounted board according to [17], further comprising a plating finishing step of forming a protective plating layer on the second wiring conductor between the solder resist layer forming step and the mounting step.
[19]
forming an (m+2)th insulating layer on the (m+1)th insulating layer and the (m+1)th wiring conductor between the second wiring conductor forming step and the mounting step; and forming an (m+2)-th non-through hole reaching the (m+1)-th wiring conductor in the (m+2)-th insulating layer, and forming the (m+2)-th non-through hole At least one of electrolytic plating and electroless plating is applied to the coated surface to form the (m+2)th wiring conductor, and the (m+2)th wiring conductor forming step is repeated in this order n times to form a buildup structure. The method for manufacturing an electronic component mounting board according to [15], further comprising a build-up step (m and n are integers of 1 or more, where m≦n).
[20]
The electronic device according to [19], further comprising a solder-resist layer forming step of forming a solder-resist layer so that the (m+2)-th wiring conductor is partially exposed between the build-up step and the mounting step. A method of manufacturing a component mounting board.
[21]
Manufacture of an electronic component mounting board according to [20], further comprising a plating finishing step of forming a protective plating layer on the (m+2)th wiring conductor between the solder resist layer forming step and the mounting step. Method.
 本発明によれば、第1の金属層の上に接して、端子位置に対応して第1の非貫通孔が形成された第1の絶縁層を設け、かつ、第1の絶縁層の上に接して第1の配線導体を設けるようにしたので、第1の絶縁層により配線基板を補強することができ、支持体を分離除去する際に配線基板が破損することを抑制することができる。また、第1の絶縁層により端子位置の部分を開口し、それ以外を覆っているので、ソルダーレジスト層を形成する必要がなく、工程を簡素化することができる。 According to the present invention, the first insulating layer in which the first non-through holes are formed corresponding to the terminal positions is provided on and in contact with the first metal layer, and Since the first wiring conductor is provided in contact with the substrate, the wiring substrate can be reinforced by the first insulating layer, and damage to the wiring substrate can be suppressed when the support is separated and removed. . In addition, since the first insulating layer has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
 更に、第1の金属層における第1の絶縁層の側の端面から剥離手段までの厚みを6μm以上とすれば、剥離手段においてコア樹脂層を分離除去する際に、配線基板を補強して破損をより抑制することができる。 Furthermore, if the thickness of the first metal layer from the end face of the first insulating layer side to the peeling means is 6 μm or more, the wiring board is reinforced and damaged when the core resin layer is separated and removed by the peeling means. can be further suppressed.
本発明の一実施形態に係る支持体付き配線基板の構成を表す図である。1 is a diagram showing the configuration of a wiring board with a support according to an embodiment of the present invention; FIG. 図1に示した支持体付き配線基板の第1の製造方法の各工程を表す図である。1. It is a figure showing each process of the 1st manufacturing method of the wiring board with a support body shown in FIG. 図2に続く各工程を表す図である。It is a figure showing each process following FIG. 図1に示した支持体付き配線基板の第2の製造方法の各工程を表す図である。1. It is a figure showing each process of the 2nd manufacturing method of the wiring board with a support body shown in FIG. 図1に示した支持体付き配線基板を用いた電子部品実装基板の第1の製造方法の各工程を表す図である。1. It is a figure showing each process of the 1st manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG. 図1に示した支持体付き配線基板を用いた電子部品実装基板の第2の製造方法の各工程を表す図である。1. It is a figure showing each process of the 2nd manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG.
 以下、本発明を実施するための形態(以下、「実施形態」という。)について詳細に説明するが、本発明はこれに限定されるものではなく、その要旨を逸脱しない範囲で様々な変形が可能である。 Hereinafter, the mode for carrying out the present invention (hereinafter referred to as "embodiment") will be described in detail, but the present invention is not limited to this, and various modifications can be made without departing from the scope of the invention. It is possible.
[支持体付き配線基板]
 図1は、本発明の一実施形態に係る支持体付き配線基板1の構成を表すものである。この支持体付き配線基板1は、コア樹脂層11の少なくとも一方の面に剥離手段を有する第1の金属層12が設けられた支持体10と、第1の金属層12の上に設けられた配線基板20とを備えている。すなわち、支持体付き配線基板1は、支持体10に配線基板20を設けたものである。支持体付き配線基板1は、例えば、支持体付きプリント配線板又は支持体付きパッケージ基板とも言い、配線基板20としてプリント配線板又は半導体素子搭載用パッケージ基板を備えている。プリント配線板又は半導体素子搭載用パッケージ基板は、例えば、半導体素子等の電子部品素子を実装することで電子部品実装基板を構成するものである。配線基板20は、半導体素子を搭載するものに限られず、例えば、LED(Light Emitting Diode)素子、コンデンサ、抵抗、コイル等の表面実装型電子部品素子などを搭載するものであってもよい。
[Wiring board with support]
FIG. 1 shows the configuration of a wiring board 1 with a support according to one embodiment of the present invention. This wiring board 1 with a support includes a support 10 provided with a first metal layer 12 having peeling means on at least one surface of a core resin layer 11, and a and a wiring board 20 . In other words, the wiring board 1 with support is obtained by providing the wiring board 20 on the support 10 . The wiring board 1 with a support is also called a printed wiring board with a support or a package board with a support, and has a printed wiring board or a package board for mounting a semiconductor element as the wiring board 20 . A printed wiring board or a package board for mounting a semiconductor element constitutes an electronic component mounting board by mounting an electronic component element such as a semiconductor element, for example. The wiring board 20 is not limited to one on which semiconductor elements are mounted, and may be one on which surface-mounted electronic components such as LED (Light Emitting Diode) elements, capacitors, resistors, coils, and the like are mounted.
<支持体>
 支持体10は、配線基板20の製造プロセス又は半導体素子の実装プロセスにおいて、配線基板20の剛性を高めて、反りを抑制すると共に、ハンドリング性を高めるためのものである。支持体10は、コア樹脂層11と、コア樹脂層11の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層12とを有している。なお、図1では、コア樹脂層11の一方の面側に、第1の金属層12が設けられた場合を示している。図示しないが、第1の金属層12はコア樹脂層11の両面に設けるようにしてもよい。
<Support>
The supporting body 10 is for increasing the rigidity of the wiring board 20, suppressing warpage, and improving handleability in the manufacturing process of the wiring board 20 or the mounting process of the semiconductor element. The support 10 has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means. Note that FIG. 1 shows the case where the first metal layer 12 is provided on one side of the core resin layer 11 . Although not shown, the first metal layer 12 may be provided on both sides of the core resin layer 11 .
(コア樹脂層)
 コア樹脂層11は、特に限定されるものではないが、例えば、ガラスクロス等の基材に熱硬化性樹脂等の絶縁性の樹脂材料(絶縁材料)を含浸させたプリプレグや、絶縁性のフィルム材等により構成することができる。コア樹脂層11の厚みは、所望に応じて適宜設定されるため、特に限定されないが、例えば、1μm以上であることが好ましい。コア樹脂層11の厚みが1μm未満であると、配線基板20が成形不良となる場合があるからである。
(core resin layer)
The core resin layer 11 is not particularly limited. It can be composed of a material or the like. The thickness of the core resin layer 11 is appropriately set as desired, and is not particularly limited, but is preferably 1 μm or more, for example. This is because if the thickness of the core resin layer 11 is less than 1 μm, the wiring substrate 20 may be defectively molded.
 “プリプレグ”は樹脂組成物等の絶縁材料を基材に含浸又は塗工してなるものである。基材としては、特に限定されず、周知のものを適宜使用することができる。基材を構成する材料としては、例えば、Eガラス、Dガラス、Sガラス又はQガラス等の無機繊維;ポリイミド、ポリエステル又はテトラフルオロエチレン等の有機繊維;及びそれらの混合物等が挙げられる。基材は、特に限定されるものではないが、例えば、織布、不織布、ロービング、チョップドストランドマット、サーフェシングマット等の形状を有するものを適宜用いることができる。基材の材質及び形状は、目的とする成形物の用途や性能により選択され、必要により単独もしくは2種類以上の材質及び形状の使用も可能である。 "Prepreg" is made by impregnating or coating a base material with an insulating material such as a resin composition. The substrate is not particularly limited, and known substrates can be used as appropriate. Materials constituting the substrate include, for example, inorganic fibers such as E-glass, D-glass, S-glass, and Q-glass; organic fibers such as polyimide, polyester, or tetrafluoroethylene; and mixtures thereof. The substrate is not particularly limited, and for example, those having a shape such as woven fabric, nonwoven fabric, roving, chopped strand mat, surfacing mat and the like can be used as appropriate. The material and shape of the base material are selected according to the intended use and performance of the molded article, and if necessary, it is possible to use one or more kinds of materials and shapes.
 基材の厚みは、コア樹脂層11の厚みが上述した範囲になれば特に制限はない。また、基材としては、シランカップリング剤等で表面処理したものや機械的に開繊処理を施したものを用いることができ、これら基材は耐熱性や耐湿性、加工性の面から好適である。 The thickness of the base material is not particularly limited as long as the thickness of the core resin layer 11 is within the range described above. In addition, as the base material, one surface-treated with a silane coupling agent or the like or one subjected to mechanical fiber opening treatment can be used, and these base materials are suitable in terms of heat resistance, moisture resistance, and workability. is.
 絶縁材料としては、特に限定されず、プリント配線板又は半導体素子搭載用パッケージ基板の絶縁材料として用いられる公知の樹脂組成物を適宜選定して用いることができる。樹脂組成物としては、耐熱性、耐薬品性の良好な熱硬化性樹脂をベースとして用いることができる。熱硬化性樹脂としては、特に限定されず、例えば、ポリイミド樹脂、フェノール樹脂、エポキシ樹脂、シアネート樹脂、マレイミド樹脂、変性ポリフェニレンエーテル、ビスマレイミドトリアジン樹脂、イソシアネート樹脂、ベンゾシクロブテン樹脂及びビニル樹脂が挙げられる。これらの熱硬化性樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The insulating material is not particularly limited, and a known resin composition used as an insulating material for printed wiring boards or package substrates for mounting semiconductor elements can be appropriately selected and used. As the resin composition, a thermosetting resin having good heat resistance and chemical resistance can be used as a base. The thermosetting resin is not particularly limited, and examples thereof include polyimide resins, phenol resins, epoxy resins, cyanate resins, maleimide resins, modified polyphenylene ethers, bismaleimide triazine resins, isocyanate resins, benzocyclobutene resins and vinyl resins. be done. These thermosetting resins may be used singly or in combination of two or more.
 ポリイミド樹脂としては、特に限定されず、市販の製品を適宜選定して用いることができる。例えば、特開2005-15629号公報に記載の製造方法によって合成される溶媒可溶性ポリイミド樹脂や、ブロック共重合ポリイミド樹脂を用いることができる。ブロック共重合体ポリイミド樹脂としては、例えば、国際公開WO2010-073952号公報に記載のブロック共重合体ポリイミド樹脂を挙げることができる。具体的には、ブロック共重合ポリイミド樹脂は、第一の構造単位からなるイミドオリゴマーの末端に第二の構造単位からなるイミドオリゴマーが結合している構造A、及び、第二の構造単位からなるイミドオリゴマーの末端に第一の構造単位からなるイミドオリゴマーが結合している構造B、が交互に繰り返される構造を有する共重合ポリイミド樹脂であれば、特に限定されない。なお、第二の構造単位は、第一の構造単位とは異なる。これらのブロック共重合ポリイミド樹脂は、極性溶媒中で、テトラカルボン酸二無水物とジアミンとを反応させイミドオリゴマーとした後、更にテトラカルボン酸二無水物と別のジアミン、或いは、別のテトラカルボン酸二無水物とジアミンを加え、イミド化する逐次重合反応によって合成することができる。これらのポリイミド樹脂は、1種類を単独で用いてもよいし、2種以上を混合して用いてもよい。 The polyimide resin is not particularly limited, and commercially available products can be appropriately selected and used. For example, a solvent-soluble polyimide resin synthesized by the production method described in JP-A-2005-15629 or a block-copolymerized polyimide resin can be used. Examples of block copolymer polyimide resins include block copolymer polyimide resins described in International Publication WO2010-073952. Specifically, the block copolymerized polyimide resin comprises structure A in which an imide oligomer comprising a second structural unit is bound to the end of an imide oligomer comprising a first structural unit, and a second structural unit. There is no particular limitation as long as it is a copolymerized polyimide resin having a structure in which Structure B, in which an imide oligomer composed of a first structural unit is bonded to the end of the imide oligomer, is alternately repeated. Note that the second structural unit is different from the first structural unit. These block copolymer polyimide resins are produced by reacting a tetracarboxylic dianhydride and a diamine in a polar solvent to form an imide oligomer, and then further tetracarboxylic dianhydride and another diamine or another tetracarboxylic acid. It can be synthesized by a sequential polymerization reaction in which an acid dianhydride and a diamine are added and imidized. One type of these polyimide resins may be used alone, or two or more types may be mixed and used.
 フェノール樹脂としては、特に限定されず、1分子中に1個以上(好ましくは2~12、より好ましくは2~6、さらに好ましくは2~4、一層好ましくは2または3、より一層好ましくは2)のフェノール性ヒドロキシ基を有する化合物又は樹脂であれば、一般に公知のものを使用できる。例えば、ビスフェノールA型フェノール樹脂、ビスフェノールE型フェノール樹脂、ビスフェノールF型フェノール樹脂、ビスフェノールS型フェノール樹脂、フェノールノボラック樹脂、ビスフェノールAノボラック型フェノール樹脂、グリシジルエステル型フェノール樹脂、アラルキルノボラック型フェノール樹脂、ビフェニルアラルキル型フェノール樹脂、クレゾールノボラック型フェノール樹脂、多官能フェノール樹脂、ナフトール樹脂、ナフトールノボラック樹脂、多官能ナフトール樹脂、アントラセン型フェノール樹脂、ナフタレン骨格変性ノボラック型フェノール樹脂、フェノールアラルキル型フェノール樹脂、ナフトールアラルキル型フェノール樹脂、ジシクロペンタジエン型フェノール樹脂、ビフェニル型フェノール樹脂、脂環式フェノール樹脂、ポリオール型フェノール樹脂、リン含有フェノール樹脂及び水酸基含有シリコーン樹脂類が挙げられる。これらのフェノール樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The phenolic resin is not particularly limited, and one or more in one molecule (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, more preferably 2 or 3, still more preferably 2 ), generally known compounds or resins having a phenolic hydroxy group can be used. For example, bisphenol A type phenol resin, bisphenol E type phenol resin, bisphenol F type phenol resin, bisphenol S type phenol resin, phenol novolak resin, bisphenol A novolac type phenol resin, glycidyl ester type phenol resin, aralkyl novolac type phenol resin, biphenyl Aralkyl-type phenolic resins, cresol novolac-type phenolic resins, polyfunctional phenolic resins, naphthol resins, naphthol novolak resins, polyfunctional naphthol resins, anthracene-type phenolic resins, naphthalene skeleton-modified novolac-type phenolic resins, phenol aralkyl-type phenolic resins, naphthol aralkyl-type phenolic resins Phenol resins, dicyclopentadiene type phenol resins, biphenyl type phenol resins, alicyclic phenol resins, polyol type phenol resins, phosphorus-containing phenol resins and hydroxyl group-containing silicone resins can be mentioned. These phenol resins may be used singly or in combination of two or more.
 熱硬化性樹脂の中でも、エポキシ樹脂は耐熱性、耐薬品性及び電気特性に優れ、比較的安価であることから、絶縁材料として好適に用いることができる。エポキシ樹脂としては、1分子中に1個以上(好ましくは2~12、より好ましくは2~6、さらに好ましくは2~4、一層好ましくは2または3、より一層好ましくは2)のエポキシ基を有する化合物または樹脂であれば特に限定されず、例えば、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールS型エポキシ樹脂、脂環式エポキシ樹脂、脂肪族鎖状エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、ビスフェノールAノボラック型エポキシ樹脂、ビフェノールのジグリシジルエテール化物、ナフタレンジオールのジグリシジルエテール化物、フェノール類のジグリシジルエテール化物、アルコール類のジグリシジルエテール化物、及びこれらのアルキル置換体、ハロゲン化物、水素添加物が挙げられる。これらのエポキシ樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。また、このエポキシ樹脂とともに用いる硬化剤はエポキシ樹脂を硬化させるものであれば、限定することなく使用でき、例えば、多官能フェノール類、多官能アルコール類、アミン類、イミダゾール化合物、酸無水物、有機リン化合物及びこれらのハロゲン化物が挙げられる。これらのエポキシ樹脂硬化剤は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。  Among thermosetting resins, epoxy resins are excellent in heat resistance, chemical resistance, and electrical properties, and are relatively inexpensive, so they can be suitably used as insulating materials. As the epoxy resin, one or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) epoxy groups per molecule. There are no particular limitations as long as the compound or resin has , cresol novolak type epoxy resin, bisphenol A novolac type epoxy resin, diglycidyl ether of biphenol, diglycidyl ether of naphthalenediol, diglycidyl ether of phenols, diglycidyl ether of alcohols, and Alkyl-substituted products, halides, and hydrogenated products thereof are included. One type of these epoxy resins may be used alone, or two or more types may be mixed and used. In addition, the curing agent used with this epoxy resin can be used without limitation as long as it cures the epoxy resin. Phosphorus compounds and halides thereof may be mentioned. These epoxy resin curing agents may be used singly or in combination of two or more.
 シアネート樹脂は、加熱によりトリアジン環を繰り返し単位とする硬化物を生成する樹脂であり、硬化物は誘電特性に優れる。このため、特に高周波特性が要求される場合などに好適である。シアネート樹脂としては、1分子中に1個以上(好ましくは2~12、より好ましくは2~6、さらに好ましくは2~4、一層好ましくは2または3、より一層好ましくは2)のシアナト基(シアン酸エステル基)により置換された芳香族部分を分子中に有する化合物または樹脂であれば特に限定されないが、例えば、2,2-ビス(4-シアナトフェニル)プロパン、ビス(4-シアナトフェニル)エタン、2,2-ビス(3,5ジメチル-4-シアナトフェニル)メタン、2,2-(4-シアナトフェニル)-1,1,1,3,3,3-ヘキサフルオロプロパン、α,α’-ビス(4-シアナトフェニル)-m-ジイソプロピルベンゼン、フェノールノボラック及びアルキルフェノールノボラックのシアネートエステル化物等が挙げられる。その中でも、2,2-ビス(4-シアナトフェニル)プロパンは、硬化物の誘電特性と硬化性とのバランスが特に良好であり、コスト的にも安価であるため好ましい。これらシアネートエステル化合物等のシアネート樹脂は、1種類を単独で用いてもよく、2種類以上を混合して用いてもよい。また、前記シアネートエステル化合物は予め一部が三量体や五量体にオリゴマー化されていてもよい。 A cyanate resin is a resin that, when heated, produces a cured product with repeating units of triazine rings, and the cured product has excellent dielectric properties. For this reason, it is suitable especially when high-frequency characteristics are required. As the cyanate resin, one or more (preferably 2 to 12, more preferably 2 to 6, more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) cyanato groups per molecule ( It is not particularly limited as long as it is a compound or resin having an aromatic moiety substituted with a cyanate ester group) in the molecule, but examples include 2,2-bis(4-cyanatophenyl)propane, bis(4-cyanato phenyl)ethane, 2,2-bis(3,5dimethyl-4-cyanatophenyl)methane, 2,2-(4-cyanatophenyl)-1,1,1,3,3,3-hexafluoropropane , α,α'-bis(4-cyanatophenyl)-m-diisopropylbenzene, cyanate esters of phenol novolak and alkylphenol novolak. Among them, 2,2-bis(4-cyanatophenyl)propane is preferable because the balance between the dielectric properties and the curability of the cured product is particularly good and the cost is low. These cyanate resins such as cyanate ester compounds may be used singly or in combination of two or more. A part of the cyanate ester compound may be previously oligomerized into a trimer or a pentamer.
 さらに、シアネート樹脂に対して硬化触媒や硬化促進剤を併用することもできる。硬化触媒としては、例えば、マンガン、鉄、コバルト、ニッケル、銅、亜鉛等の金属類を用いることができ、具体的には、2-エチルヘキサン酸塩、オクチル酸塩等の有機金属塩やアセチルアセトン錯体などの有機金属錯体を挙げることができる。硬化触媒は、1種類を単独で使用してもよいし、2種類以上を混合して使用してもよい。 Furthermore, a curing catalyst or curing accelerator can be used in combination with the cyanate resin. As the curing catalyst, for example, metals such as manganese, iron, cobalt, nickel, copper and zinc can be used. Specifically, organic metal salts such as 2-ethylhexanoate and octylate, and acetylacetone Mention may be made of organometallic complexes such as complexes. Curing catalysts may be used singly or in combination of two or more.
 また、硬化促進剤としてはフェノール類を使用することが好ましく、ノニルフェノール、パラクミルフェノールなどの単官能フェノールや、ビスフェノールA、ビスフェノールF、ビスフェノールSなどの二官能フェノール、又は、フェノールノボラック、クレゾールノボラックなどの多官能フェノールなどを用いることができる。硬化促進剤は、1種類を単独で使用してもよいし、2種類以上を混合して使用してもよい。 Phenols are preferably used as the curing accelerator, and monofunctional phenols such as nonylphenol and paracumylphenol; bifunctional phenols such as bisphenol A, bisphenol F and bisphenol S; or phenol novolak and cresol novolak. can be used. A hardening accelerator may be used individually by 1 type, and may be used in mixture of 2 or more types.
 マレイミド樹脂としては、1分子中に1個以上(好ましくは2~12、より好ましくは2~6、さらに好ましくは2~4、一層好ましくは2または3、より一層好ましくは2)のマレイミド基を有する化合物または樹脂であれば、一般に公知のものを使用できる。例えば、4,4-ジフェニルメタンビスマレイミド、フェニルメタンマレイミド、m-フェニレンビスマレイミド、2,2-ビス(4-(4-マレイミドフェノキシ)-フェニル)プロパン、3,3-ジメチル-5,5-ジエチル-4,4-ジフェニルメタンビスマレイミド、4-メチル-1,3-フェニレンビスマレイミド、1,6-ビスマレイミド-(2,2,4-トリメチル)ヘキサン、4,4-ジフェニルエーテルビスマレイミド、4,4-ジフェニルスルフォンビスマレイミド、1,3-ビス(3-マレイミドフェノキシ)ベンゼン、1,3-ビス(4-マレイミドフェノキシ)ベンゼン、ポリフェニルメタンマレイミド、ノボラック型マレイミド、ビフェニルアラルキル型マレイミド、及びこれらマレイミド化合物のプレポリマー、もしくはマレイミド化合物とアミン化合物のプレポリマーが挙げられるが、特に制限されるものではない。これらのマレイミド樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The maleimide resin has 1 or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) maleimide groups in one molecule. A generally known compound or resin can be used as long as it has a compound or resin. For example, 4,4-diphenylmethanebismaleimide, phenylmethanemaleimide, m-phenylenebismaleimide, 2,2-bis(4-(4-maleimidophenoxy)-phenyl)propane, 3,3-dimethyl-5,5-diethyl -4,4-diphenylmethanebismaleimide, 4-methyl-1,3-phenylenebismaleimide, 1,6-bismaleimide-(2,2,4-trimethyl)hexane, 4,4-diphenyletherbismaleimide, 4,4 -diphenylsulfone bismaleimide, 1,3-bis(3-maleimidophenoxy)benzene, 1,3-bis(4-maleimidophenoxy)benzene, polyphenylmethanemaleimide, novolac-type maleimide, biphenylaralkyl-type maleimide, and these maleimide compounds or a prepolymer of a maleimide compound and an amine compound, but is not particularly limited. One type of these maleimide resins may be used alone, or two or more types may be mixed and used.
 変性ポリフェニレンエーテルは、硬化物の誘電特性を向上させることができるという観点から、有用である。変性ポリフェニレンエーテルとしては、例えば、ポリ(2,6-ジメチル-1,4-フェニレン)エーテル、ポリ(2,6-ジメチル-1,4-フェニレン)エーテルとポリスチレンとのアロイ化ポリマー、ポリ(2,6ジメチル-1,4-フェニレン)エーテルとスチレン-ブタジエンコポリマーとのアロイ化ポリマー、ポリ(2,6-ジメチル-1,4-フェニレン)エーテルとスチレン-無水マレイン酸コポリマのアロイ化ポリマー、ポリ(3,6-ジメチル-1,4-フェニレン)エーテルとポリアミドとのアロイ化ポリマー、ポリ(2,6-ジメチル-1、4-フェニレン)エーテルとスチレン-ブタジエン-アクリロニトリルコポリマーとのアロイ化ポリマー、オリゴフェニレンエーテルなどが挙げられる。また、ポリフェニレンエーテルに反応性や重合性を付与するために、ポリマー鎖末端にアミン基、エポキシ基、カルボン基、スチリル基などの官能基を導入したり、ポリマー鎖側鎖にアミン基、エポキシ基、カルボキシル基、スチリル基、メタクリル基などの官能基を導入してもよい。 Modified polyphenylene ether is useful from the viewpoint that it can improve the dielectric properties of the cured product. Modified polyphenylene ethers include, for example, poly(2,6-dimethyl-1,4-phenylene) ether, an alloyed polymer of poly(2,6-dimethyl-1,4-phenylene) ether and polystyrene, poly(2 ,6-dimethyl-1,4-phenylene)ether and styrene-butadiene copolymer, alloyed polymer of poly(2,6-dimethyl-1,4-phenylene)ether and styrene-maleic anhydride copolymer, poly Alloyed polymers of (3,6-dimethyl-1,4-phenylene) ether and polyamides, alloyed polymers of poly(2,6-dimethyl-1,4-phenylene) ethers and styrene-butadiene-acrylonitrile copolymers, oligophenylene ether and the like. In addition, in order to impart reactivity and polymerizability to polyphenylene ether, functional groups such as amine groups, epoxy groups, carboxylic groups, and styryl groups are introduced into the polymer chain ends, and amine groups and epoxy groups are introduced into the polymer chain side chains. , a carboxyl group, a styryl group, and a methacryl group may be introduced.
 イソシアネート樹脂としては、特に限定されず、例えば、フェノール類とハロゲン化シアンとの脱ハロゲン化水素反応により得られるイソシアネート樹脂がある。イソシアネート樹脂としては、例えば、4,4’-ジフェニルメタンジイソシアネートMDI、ポリメチレンポリフェニルポリイソシアネート、トリレンジイソシアネート、ヘキサメチレンジイソシアネートが挙げられる。これらのイソシアネート樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The isocyanate resin is not particularly limited, and includes, for example, an isocyanate resin obtained by a dehydrohalogenation reaction between a phenol and a cyanogen halide. Examples of isocyanate resins include 4,4'-diphenylmethane diisocyanate MDI, polymethylene polyphenyl polyisocyanate, tolylene diisocyanate, and hexamethylene diisocyanate. One type of these isocyanate resins may be used alone, or two or more types may be mixed and used.
 ベンゾシクロブテン樹脂としては、シクロブテン骨格を含む樹脂であれば特に限定されないが、例えば、ジビニルシロキサン-ビスベンゾシクロブテン(ダウケミカル社製)を用いることができる。これらのベンゾシクロブテン樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The benzocyclobutene resin is not particularly limited as long as it contains a cyclobutene skeleton, but for example, divinylsiloxane-bisbenzocyclobutene (manufactured by Dow Chemical Co.) can be used. One type of these benzocyclobutene resins may be used alone, or two or more types may be mixed and used.
 ビニル樹脂としては、ビニルモノマーの重合体もしくは共重合体であれば特に限定されない。ビニルモノマーとしては、特に制限されず、例えば、(メタ)アクリル酸エステル誘導体、ビニルエステル誘導体、マレイン酸ジエステル誘導体、(メタ)アクリルアミド誘導体、スチレン誘導体、ビニルエーテル誘導体、ビニルケトン誘導体、オレフィン誘導体、マレイミド誘導体、(メタ)アクリロニトリルが挙げられる。これらのビニル樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The vinyl resin is not particularly limited as long as it is a polymer or copolymer of vinyl monomers. Vinyl monomers are not particularly limited, and examples include (meth)acrylic acid ester derivatives, vinyl ester derivatives, maleic acid diester derivatives, (meth)acrylamide derivatives, styrene derivatives, vinyl ether derivatives, vinyl ketone derivatives, olefin derivatives, maleimide derivatives, (Meth)acrylonitrile may be mentioned. These vinyl resins may be used singly or in combination of two or more.
 絶縁材料として用いられる樹脂組成物には、誘電特性、耐衝撃性及びフィルム加工性などを考慮して、熱可塑性樹脂をブレンドすることもできる。熱可塑性樹脂としては、特に限定されず、例えば、フッ素樹脂、ポリカーボネート、ポリエーテルイミド、ポリエーテルエーテルケトン、ポリアクリレート、ポリアミド、ポリアミドイミド、ポリブタジエンなどを挙げることができる。熱可塑性樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。また、フッ素樹脂は、特に限定されず、例えば、ポリテトラフルオロエチレン、ポリクロロトリフルオロエチレン、ポリフッ化ビニリデン及びポリフッ化ビニルが挙げられる。これらのフッ素樹脂は、1種類を単独で用いてもよいし、2種類以上を混合して用いてもよい。 The resin composition used as the insulating material can also be blended with a thermoplastic resin in consideration of dielectric properties, impact resistance, film processability, and the like. The thermoplastic resin is not particularly limited, and examples thereof include fluororesin, polycarbonate, polyetherimide, polyetheretherketone, polyacrylate, polyamide, polyamideimide, and polybutadiene. One type of thermoplastic resin may be used alone, or two or more types may be mixed and used. Moreover, the fluororesin is not particularly limited, and examples thereof include polytetrafluoroethylene, polychlorotrifluoroethylene, polyvinylidene fluoride, and polyvinyl fluoride. One type of these fluororesins may be used alone, or two or more types may be mixed and used.
 熱可塑性樹脂の中でも、耐湿性に優れ、更に金属に対する接着剤が良好な観点から、ポリアミドイミド樹脂が有用である。ポリアミドイミド樹脂の原料は、特に限定されるものではないが、酸性分としては、無水トリメリット酸、無水トリメリット酸モノクロライドが挙げられ、アミン成分としては、メタフェニレンジアミン、パラフェニレンジアミン、4,4’-ジアミノジフェニルエーテル、4,4’-ジアミノジフェニルメタン、ビス[4-(アミノフェノキシ)フェニル]スルホン、2,2’-ビス[4-(4-アミノフェノキシ)フェニル]プロパンなどが挙げられる。ポリアミドイミド樹脂は、乾燥性を向上させるためにシロキサン変性としてもよく、この場合、アミノ成分としてシロキサンジアミンを用いることができる。ポリアミドイミド樹脂は、フィルム加工性を考慮すると、分子量が5万以上のものを用いるのが好ましい。 Among thermoplastic resins, polyamide-imide resins are useful from the viewpoint of excellent moisture resistance and good adhesion to metals. The raw material for the polyamideimide resin is not particularly limited, but examples of the acidic component include trimellitic anhydride and trimellitic anhydride monochloride, and examples of the amine component include metaphenylenediamine, paraphenylenediamine, 4 ,4'-diaminodiphenyl ether, 4,4'-diaminodiphenylmethane, bis[4-(aminophenoxy)phenyl]sulfone, 2,2'-bis[4-(4-aminophenoxy)phenyl]propane and the like. The polyamide-imide resin may be modified with siloxane to improve drying properties, and in this case, siloxane diamine can be used as the amino component. Considering film processability, it is preferable to use a polyamide-imide resin having a molecular weight of 50,000 or more.
 上述の熱可塑性樹脂については、主としてプリプレグに用いられる絶縁材料として説明をしたが、これら熱可塑性樹脂はプリプレグとしての使用に限定されない。例えば、上述の熱可塑性樹脂を用いてフィルムに加工したもの(フィルム材)を、コア樹脂層11としてもよい。 Although the above thermoplastic resins have been described as insulating materials mainly used for prepregs, these thermoplastic resins are not limited to use as prepregs. For example, the core resin layer 11 may be formed by processing a film (film material) using the thermoplastic resin described above.
 絶縁材料として用いられる樹脂組成物には、充填材が混合されていてもよい。充填材としては、特に限定されないが、例えば、アルミナ、ホワイトカーボン、チタンホワイト、酸化チタン、酸化亜鉛、酸化マグネシウム、酸化ジルコニウム等の金属酸化物(水和物を含む)、水酸化アルミニウム、ベーマイト、水酸化マグネシウム等の金属水酸化物、天然シリカ、溶融シリカ、合成シリカ、アモルファスシリカ、アエロジル、中空シリカ等のシリカ類、クレー、カオリン、タルク、マイカ、ガラス粉、石英粉、シラスバルーン等の無機系の充填材(無機充填材)の他、スチレン型、ブタジエン型、アクリル型などのゴムパウダー、コアシェル型のゴムパウダー、シリコーンレジンパウダー、シリコーンゴムパウダー、シリコーン複合パウダーなどの有機系の充填材(有機充填材)が挙げられる。これら充填材は、1種類を単独で使用してもよいし、2種類以上を混合して使用してもよい。 A filler may be mixed in the resin composition used as the insulating material. Examples of fillers include, but are not limited to, alumina, white carbon, titanium white, titanium oxide, zinc oxide, magnesium oxide, metal oxides (including hydrates) such as zirconium oxide, aluminum hydroxide, boehmite, Metal hydroxides such as magnesium hydroxide, silicas such as natural silica, fused silica, synthetic silica, amorphous silica, aerosil, and hollow silica, inorganic materials such as clay, kaolin, talc, mica, glass powder, quartz powder, and Shirasu balloons In addition to organic fillers (inorganic fillers), organic fillers ( organic fillers). These fillers may be used singly or in combination of two or more.
 絶縁材料として用いられる樹脂組成物は、有機溶媒を含有していてもよい。有機溶媒としては、特に限定されるものではなく、ベンゼン、トルエン、キシレン、トリメチルベンゼンのような芳香族炭化水素系溶媒;アセトン、メチルエチルケトン、メチルイノブチルケトンのようなケトン系溶媒;テトラヒドロフランのようなエーテル系溶媒;イソプロパノール、ブタノールのようなアルコール系溶媒;2-メトキシエタノール、2-ブトキシエタノールのようなエーテルアルコール溶媒;N-メチルピロリドン、N、N-ジメチルホルムアミド、N、N-ジメチルアセトアミドのようなアミド系溶媒などを、所望に応じて併用することができる。尚、プリプレグを作製する場合におけるワニス中の溶媒量は、樹脂組成物全体に対して40質量%~80質量%の範囲とすることが好ましい。また、前記ワニスの粘度は20cP~100cP(20mPa・s~100mPa・s)の範囲が望ましい。 The resin composition used as an insulating material may contain an organic solvent. The organic solvent is not particularly limited, and aromatic hydrocarbon solvents such as benzene, toluene, xylene and trimethylbenzene; ketone solvents such as acetone, methyl ethyl ketone and methylinobutyl ketone; and tetrahydrofuran. Ether solvents; alcohol solvents such as isopropanol and butanol; ether alcohol solvents such as 2-methoxyethanol and 2-butoxyethanol; N-methylpyrrolidone, N,N-dimethylformamide and N,N-dimethylacetamide If desired, an amide-based solvent or the like can be used in combination. The amount of the solvent in the varnish when producing the prepreg is preferably in the range of 40% by mass to 80% by mass with respect to the entire resin composition. Further, the viscosity of the varnish is desirably in the range of 20 cP to 100 cP (20 mPa·s to 100 mPa·s).
 絶縁材料として用いられる樹脂組成物は、難燃剤を含有していてもよい。難燃剤としては、特に限定されるものではないが、例えば、デカブロモジフェニルエーテル、テトラブロモビスフェノールA、テトラブロモ無水フタル酸、トリブロモフェノールなどの臭素化合物、トリフェニルフォスフェート、トリキシレルフォスフェート、クレジルジフェニルフォスフェートなどのリン化合物、赤リン及びその変性物、三酸化アンチモン、五酸化アンチモンなどのアンチモン化合物、メラミン、シアヌール酸、シアヌール酸メラミンなどのトリアジン化合物など公知慣例の難燃剤を用いることができる。 The resin composition used as an insulating material may contain a flame retardant. Examples of flame retardants include, but are not limited to, bromine compounds such as decabromodiphenyl ether, tetrabromobisphenol A, tetrabromophthalic anhydride, and tribromophenol, triphenyl phosphate, trixylyl phosphate, and clay. Known and customary flame retardants such as phosphorus compounds such as dildiphenyl phosphate, red phosphorus and modified products thereof, antimony compounds such as antimony trioxide and antimony pentoxide, triazine compounds such as melamine, cyanuric acid and melamine cyanurate can be used. can.
 絶縁材料として用いられる樹脂組成物に対して、さらに必要に応じて上述の硬化剤、硬化促進剤や、その他、熱可塑性粒子、着色剤、紫外線不透過剤、酸化防止剤、還元剤などの各種添加剤や充填材を加えることができる。 For the resin composition used as an insulating material, if necessary, various additives such as the above-mentioned curing agent, curing accelerator, thermoplastic particles, coloring agents, ultraviolet opaque agents, antioxidants, reducing agents, etc. Additives and fillers can be added.
 本実施形態においてプリプレグは、例えば、上述した基材に対する樹脂組成物の付着量が、乾燥後のプリプレグにおける樹脂含有率で20質量%以上90質量%以下となるように、樹脂組成物(ワニスを含む)を基材に含浸又は塗工した後、100℃以上200℃以下の温度で1分から30分間加熱乾燥することで、半硬化状態(Bステージ状態)のプリプレグとして得ることができる。そのようなプリプレグとしては、例えば、三菱ガス化学株式会社製の、GHPL-830NS(製品名)、GHPL-830NSF(製品名)を使用することができる。 In the present embodiment, the prepreg is, for example, a resin composition (varnish is added so that the amount of the resin composition attached to the base material described above is 20% by mass or more and 90% by mass or less in terms of resin content in the prepreg after drying. ) is impregnated or coated on the substrate, and then dried by heating at a temperature of 100° C. or higher and 200° C. or lower for 1 minute to 30 minutes to obtain a prepreg in a semi-cured state (B stage state). As such a prepreg, for example, GHPL-830NS (product name) and GHPL-830NSF (product name) manufactured by Mitsubishi Gas Chemical Company, Inc. can be used.
 絶縁性のフィルム材は、例えば、プリプレグにおいて説明した絶縁材料の樹脂組成物により構成することができ、これらの樹脂組成物をフィルム状に加工することにより得ることができる。 The insulating film material can be composed of, for example, the resin composition of the insulating material described in the prepreg, and can be obtained by processing these resin compositions into a film.
(第1の金属層)
 第1の金属層12は、例えば、キャリア付金属箔により構成することができる。キャリア付金属箔は、例えば、キャリアに剥離手段である剥離層を介して金属箔を積層したものである。キャリア付金属箔には市販品を用いることもでき、例えば、三井金属鉱業株式会社製のMT18SD-H-T5(製品名)を使用することができる。第1の金属層12の厚みは、所望に応じて適宜設定されるため、特に限定されないが、例えば、0.5μm以上100μm以下とすることができる。
(first metal layer)
The first metal layer 12 can be composed of, for example, a metal foil with a carrier. The metal foil with a carrier is, for example, laminated with a metal foil on a carrier via a release layer, which is a release means. A commercial product can also be used for the metal foil with a carrier, for example, MT18SD-HT5 (product name) manufactured by Mitsui Mining & Smelting Co., Ltd. can be used. The thickness of the first metal layer 12 is appropriately set as desired, and is not particularly limited.
 キャリアは、例えば、各種金属箔により構成することができるが、厚さの均一性及び箔の耐食性などの点から銅箔により構成することが好ましい。キャリアの厚みは、金属箔の厚みよりも厚く、例えば、3μm以上100μm以下とすることができ、5μm以上50μm以下が好ましく、6μm以上30μm以下が更に好ましい。 The carrier can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of uniformity of thickness and corrosion resistance of the foil. The thickness of the carrier is thicker than the thickness of the metal foil, and can be, for example, 3 μm or more and 100 μm or less, preferably 5 μm or more and 50 μm or less, and more preferably 6 μm or more and 30 μm or less.
 剥離層は、キャリアと金属箔とを容易に剥離できるようにするためのものである。剥離層の材料は、特に限定されず、各種の周知のものを適宜使用することができる。例えば、有機系の材料であれば、窒素含有有機化合物、硫黄含有有機化合物、カルボン酸等が挙げられる。窒素含有有機化合物の例としては、トリアゾール化合物、イミダゾール化合物等が挙げられ、中でもトリアゾール化合物は剥離性が安定しやすい点で好ましい。トリアゾール化合物の例としては、1,2,3-ベンゾトリアゾール、カルボキシベンゾトリアゾール、N‘,N’-ビス(ベンゾトリアゾリルメチル)ユリア、1H-1,2,4-トリアゾール及び3-アミノ-1H-1,2,4-トリアゾール等が挙げられる。硫黄含有有機化合物の例としては、メルカプトベンゾチアゾール、チオシアヌル酸、2-ベンズイミダゾールチオール等が挙げられる。カルボン酸の例としては、モノカルボン酸、ジカルボン酸等が挙げられる。また、無機系の材料であれば、Ni、Mo、Co、Cr、Fe、Ti、W、P、Zn等のうち少なくとも1種からなる金属若しくは合金、又はこれらの酸化物が挙げられる。剥離層の厚みは、例えば、1nm以上1μm以下とすることができ、好ましくは5nm以上500nm以下である。 The release layer is for allowing the carrier and the metal foil to be easily separated. Materials for the release layer are not particularly limited, and various well-known materials can be used as appropriate. For example, organic materials include nitrogen-containing organic compounds, sulfur-containing organic compounds, and carboxylic acids. Examples of the nitrogen-containing organic compound include triazole compounds, imidazole compounds, etc. Among them, triazole compounds are preferable because they tend to have stable peelability. Examples of triazole compounds include 1,2,3-benzotriazole, carboxybenzotriazole, N',N'-bis(benzotriazolylmethyl)urea, 1H-1,2,4-triazole and 3-amino- 1H-1,2,4-triazole and the like. Examples of sulfur-containing organic compounds include mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol, and the like. Examples of carboxylic acids include monocarboxylic acids, dicarboxylic acids, and the like. Inorganic materials include metals or alloys of at least one of Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn, and oxides thereof. The thickness of the release layer can be, for example, 1 nm or more and 1 μm or less, preferably 5 nm or more and 500 nm or less.
 金属箔は、例えば、各種金属箔により構成することができるが、厚さの均一性及び箔の耐食性などの点から銅箔により構成することが好ましい。金属箔の厚みは、所望に応じて適宜設定されるため、特に限定されないが、例えば、0.5μm以上70μm以下とすることができ、1μm以上50μm以下が好ましく、6μm以上30μm以下が更に好ましい。 The metal foil can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of thickness uniformity and corrosion resistance of the foil. The thickness of the metal foil is not particularly limited because it is appropriately set as desired.
 第1の金属層12は、キャリアがコア樹脂層11の側となるように設けてもよく、金属箔がコア樹脂層11の側となるように設けてもよい。第1の金属層12における配線基板20の側の端面から剥離手段までの厚み、例えば、後述する第1の絶縁層21の側の端面から剥離手段までの厚みは、6μm以上であることが好ましく、10μm以上であればより好ましく、15μm以上であれば更に好ましい。後述するコア樹脂層分離除去工程において、少なくともコア樹脂層11を分離除去する際に、配線基板20を補強して破損を抑制することができるからである。また、第1の金属層12における配線基板20の側の端面から剥離手段までの厚み、例えば、後述する第1の絶縁層21の側の端面から剥離手段までの厚みは、70μm以下が好ましく、50μm以下であればより好ましく、30μm以下であれば更に好ましい。後述する第1の金属層除去工程において、残存する第1の金属層12の除去に時間がかかるからである。 The first metal layer 12 may be provided with the carrier on the core resin layer 11 side, or may be provided with the metal foil on the core resin layer 11 side. The thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means, for example, the thickness from the later-described first insulating layer 21 side end face to the peeling means is preferably 6 μm or more. , is more preferably 10 μm or more, and more preferably 15 μm or more. This is because the wiring board 20 can be reinforced and damaged when at least the core resin layer 11 is separated and removed in the core resin layer separation and removal step described later. In addition, the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means, for example, the thickness from the later-described first insulating layer 21 side end face to the peeling means is preferably 70 μm or less. It is more preferably 50 μm or less, and even more preferably 30 μm or less. This is because it takes time to remove the remaining first metal layer 12 in the step of removing the first metal layer, which will be described later.
 また、第1の金属層12は、剥離手段である剥型層を有する金属箔により構成することもできる。この場合、剥型層がコア樹脂層11の側となるように積層される。剥型層としては、例えば、ケイ素化合物を少なくとも含む層が挙げられ、例えば、金属箔上に、シラン化合物を単独又は複数組合せてなるケイ素化合物を付与することで、形成することができる。尚、ケイ素化合物を付与する手段は特に限定されるものではなく、例えば、塗布等の公知の手段を用いることができる。金属箔の剥型層との接着面には防錆処理を施す(防錆処理層を形成する)ことができる。防錆処理は、ニッケル、錫、亜鉛、クロム、モリブデン、コバルトのいずれか、若しくはそれらの合金を用いて行うことができる。剥型層の厚みは、特に限定されるものではないが、除去性及び剥離性の観点から、5nm以上100nm以下が好ましく、10nm以上80nm以下が更に好ましく、20nm以上60nm以下が特に好ましい。また、金属箔としては、厚さの均一性及び箔の耐食性などの点から銅箔が好ましい。この場合も、第1の金属層12における配線基板20の側の端面から剥離手段までの厚み、例えば、後述する第1の絶縁層21の側の端面から剥離手段までの厚みは、上述した通りとすることが好ましい。 In addition, the first metal layer 12 can also be composed of a metal foil having a peeling layer as a peeling means. In this case, the release layer is laminated so as to face the core resin layer 11 side. Examples of the release layer include a layer containing at least a silicon compound. For example, the release layer can be formed by applying a silicon compound composed of a single silane compound or a combination of multiple silane compounds onto a metal foil. The means for applying the silicon compound is not particularly limited, and for example, known means such as coating can be used. An antirust treatment can be applied to the surface of the metal foil to be adhered to the release layer (to form an antirust treatment layer). Rust prevention treatment can be performed using any one of nickel, tin, zinc, chromium, molybdenum, cobalt, or alloys thereof. The thickness of the release layer is not particularly limited, but is preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 80 nm or less, and particularly preferably 20 nm or more and 60 nm or less, from the viewpoint of removability and peelability. As the metal foil, a copper foil is preferable from the viewpoint of uniformity of thickness and corrosion resistance of the foil. Also in this case, the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means, for example, the thickness from the later-described first insulating layer 21 side end face to the peeling means is as described above. It is preferable to
 なお、支持体10は、例えば、コア樹脂層11と第1の金属層12とを積層し、加熱加圧して圧着することにより作製することができる。支持体10の厚みは、例えば、20μm以上1000μm以下とすることができ、20μm以上950μm以下が好ましく、20μm以上900μm以下が更に好ましい。 Note that the support 10 can be produced, for example, by stacking the core resin layer 11 and the first metal layer 12 and bonding them under heat and pressure. The thickness of the support 10 can be, for example, 20 μm or more and 1000 μm or less, preferably 20 μm or more and 950 μm or less, and more preferably 20 μm or more and 900 μm or less.
<配線基板>
 配線基板20は、第1の金属層12の上に接して設けられた第1の絶縁層21と、第1の絶縁層21の上に接して設けられた第1の配線導体22とを有している。第1の絶縁層には、配線基板20の端子位置に対応して、第1の配線導体22から第1の金属層12に達する第1の非貫通孔21Aが設けられている。なお、配線基板20の端子位置というのは、例えば、配線基板20をはんだ付け等で電子機器に搭載する際の外部接続端子の位置である。第1の非貫通孔21Aの内壁には、第1の配線導体22に接続された第1の接続ビア21Bが形成されている。第1の接続ビア21Bは、例えば、銅等の金属により構成されている。
<Wiring board>
The wiring board 20 has a first insulating layer 21 provided on and in contact with the first metal layer 12 and a first wiring conductor 22 provided on and in contact with the first insulating layer 21 . are doing. The first insulating layer is provided with first non-through holes 21</b>A extending from the first wiring conductors 22 to the first metal layer 12 corresponding to the terminal positions of the wiring board 20 . The terminal positions of the wiring board 20 are, for example, positions of external connection terminals when the wiring board 20 is mounted on an electronic device by soldering or the like. A first connection via 21B connected to the first wiring conductor 22 is formed on the inner wall of the first non-through hole 21A. The first connection via 21B is made of metal such as copper, for example.
 また、配線基板20は、例えば、第1の絶縁層21及び第1の配線導体22の上に、第2の絶縁層23と、第2の絶縁層23の上に設けられた第2の配線導体24とを有していてもよい。第2の絶縁層23には、例えば、第1の配線導体22に達する第2の非貫通孔23Aが設けられている。第2の非貫通孔23Aの内壁には、第1の配線導体22と第2の配線導体24を接続する第2の接続ビア23Bが形成されている。第2の接続ビア23Bは、例えば、銅等の金属により構成されている。 Further, the wiring board 20 includes, for example, a second insulating layer 23 on the first insulating layer 21 and the first wiring conductors 22, and a second wiring provided on the second insulating layer 23. and a conductor 24 . The second insulating layer 23 is provided with, for example, a second non-through hole 23A reaching the first wiring conductor 22 . A second connection via 23B for connecting the first wiring conductor 22 and the second wiring conductor 24 is formed on the inner wall of the second non-through hole 23A. The second connection via 23B is made of metal such as copper, for example.
 更に、配線基板20は、第2の絶縁層23及び第2の配線導体24の上に、第(m+2)の絶縁層25と、第(m+2)の絶縁層25の上に設けられた第(m+2)の配線導体26とをこの順にn回積層したビルドアップ構造を有していてもよい。m及びnは1以上の整数、但し、m≦nである。繰り返しの回数n、すなわち積層数は、所望に応じて適宜設定されるため、特に限定されないが、例えば、1回以上10回以下とすることができる。なお、図1では、繰り返しの回数nが3回の場合を示している。第(m+2)の絶縁層25には、例えば、第(m+1)の配線導体22,25に達する第(m+2)の非貫通孔25Aが設けられている。第(m+2)の非貫通孔25Aの内壁には、第(m+1)の配線導体22,25と第(m+2)の配線導体26を接続する第(m+2)の接続ビア25Bが形成されている。第(m+2)の接続ビア25Bは、例えば、銅等の金属により構成されている。 Further, the wiring board 20 includes the (m+2)th insulating layer 25 on the second insulating layer 23 and the second wiring conductor 24 and the (m+2)th insulating layer 25 provided on the (m+2)th insulating layer 25 . m+2) wiring conductors 26 may be stacked n times in this order. m and n are integers of 1 or more, provided that m≦n. The number n of repetitions, that is, the number of layers to be stacked is appropriately set as desired, and is not particularly limited. Note that FIG. 1 shows a case where the number of repetitions n is three. The (m+2)-th insulating layer 25 is provided with, for example, (m+2)-th non-through holes 25A reaching the (m+1)- th wiring conductors 22 and 25 . An (m+2)th connection via 25B for connecting the (m+1) th wiring conductors 22 and 25 and the (m+2)th wiring conductor 26 is formed on the inner wall of the (m+2)th non-through hole 25A. The (m+2)th connection via 25B is made of metal such as copper, for example.
 第2の絶縁層23及び第2の配線導体24の上、又は、第(n+2)の絶縁層25及び第(n+2)の配線導体26の上には、例えば、第2の配線導体24又は第(n+2)の配線導体26が部分的に露出するようにソルダーレジスト層27が設けられていてもよい。ソルダーレジスト層27から露出された第2の配線導体24又は第(n+2)の配線導体26の部分は端子であり、例えば、半導体素子が接続される内部接続端子である。ソルダーレジスト層27から露出された第2の配線導体24又は第(n+2)の配線導体26の上には、金めっき層等よりなる保護めっき層28が形成されていてもよい。 On the second insulating layer 23 and the second wiring conductor 24, or on the (n+2)th insulating layer 25 and the (n+2)th wiring conductor 26, for example, the second wiring conductor 24 or the second The solder resist layer 27 may be provided so that the (n+2) wiring conductors 26 are partially exposed. The portion of the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 is a terminal, for example, an internal connection terminal to which a semiconductor element is connected. A protective plating layer 28 made of a gold plating layer or the like may be formed on the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 .
(第1の絶縁層)
 第1の絶縁層21は、支持体10を分離する際に配線基板20を補強して破損を抑制すると共に、分離した後はソルダーレジスト層として機能するものである。第1の絶縁層21は、例えば、絶縁性の樹脂材料を含んでおり、コア樹脂層11において説明した絶縁性のフィルム材や、プリプレグ等により構成することができる。第1の絶縁層21において、絶縁性の樹脂材料はガラス転移温度が150℃以上であることが好ましい。ガラス転移温度が150℃よりも低いと加工工程において膨れが生じ、配線基板20が破損する場合があるからである。第1の絶縁層21における絶縁性の樹脂材料としては、耐熱性に優れた材料、例えば、ポリイミド樹脂、エポキシ樹脂、シアネート樹脂、マレイミド樹脂、変性ポリフェニレンエーテル、ビスマレイミドトリアジン樹脂、ポリアミドイミド樹脂、ポリアミド樹脂であるナイロン樹脂、及び、フッ素系樹脂から選択される少なくとも1種を含むことが好ましい。中でも、ポリイミド樹脂、ビスマレイミドトリアジン樹脂、及び、フッ素系樹脂から選択される少なくとも1種を含むことが好ましい。
(First insulating layer)
The first insulating layer 21 reinforces the wiring substrate 20 to suppress damage when the support 10 is separated, and functions as a solder resist layer after separation. The first insulating layer 21 contains, for example, an insulating resin material, and can be composed of the insulating film material described in the core resin layer 11, prepreg, or the like. In the first insulating layer 21, the insulating resin material preferably has a glass transition temperature of 150° C. or higher. This is because if the glass transition temperature is lower than 150° C., the wiring substrate 20 may be damaged due to swelling during the processing process. As the insulating resin material for the first insulating layer 21, materials with excellent heat resistance, such as polyimide resin, epoxy resin, cyanate resin, maleimide resin, modified polyphenylene ether, bismaleimide triazine resin, polyamideimide resin, polyamide It is preferable to include at least one selected from a nylon resin, which is a resin, and a fluororesin. Among them, it is preferable to include at least one selected from polyimide resins, bismaleimide triazine resins, and fluorine-based resins.
 また、第1の絶縁層21は、1層により構成してもよいが、材料の異なる2層以上により構成してもよい。2層以上により構成する場合には、材料の異なるフィルム材又はプリプレグを積層してもよく、また、フィルム材とプリプレグとを積層してもよい。第1の絶縁樹脂層21の厚みは、所望に応じて適宜設定されるが、例えば、0.1μm以上100μm以下とすることができ、0.1μm以上30μm以下が好ましく、0.1μm以上9μm以下がより好ましく、1μm以上9μm以下が更に好ましい。配線基板20の総厚みを薄くするためである。 Also, the first insulating layer 21 may be composed of one layer, or may be composed of two or more layers made of different materials. When it is composed of two or more layers, film materials or prepregs made of different materials may be laminated, or film materials and prepregs may be laminated. The thickness of the first insulating resin layer 21 is appropriately set as desired. is more preferable, and 1 μm or more and 9 μm or less is even more preferable. This is for reducing the total thickness of the wiring board 20 .
(第1の配線導体)
 第1の配線導体22は、例えば、銅などの金属により構成されている。第1の配線導体22の厚みは、所望に応じて適宜設定されるため、特に限定されないが、例えば、0.5μm以上100μm以下とすることができ、1μm以上50μm以下が好ましく、1μm以上30μm以下がより好ましい。第1の配線導体22のパターン幅は、特に限定されず、用途に応じて適宜その幅を選択することができるが、例えば、1μm以上100μm以下とすることができ、好ましくは3μm以上30μm以下とすることができる。
(First wiring conductor)
The first wiring conductor 22 is made of metal such as copper, for example. The thickness of the first wiring conductor 22 is appropriately set as desired, and is not particularly limited. is more preferred. The pattern width of the first wiring conductor 22 is not particularly limited, and the width can be appropriately selected according to the application. can do.
(第2の絶縁層、第(m+2)の絶縁層)
 第2の絶縁層23及び第(m+2)の絶縁層25は、特に限定されるものではないが、例えば、コア樹脂層11と同様の材料(例えば、プリプレグ又は絶縁性のフィルム材)により構成することができる。第2の絶縁層23及び第(m+2)の絶縁層25の厚みは、所望に応じて適宜設定されるため、特に限定されないが、例えば、0.1μm以上100μm以下とすることができ、3μm以上50μm以下が好ましく、5μm以上20μm以下がより好ましい。
(Second insulating layer, (m+2)th insulating layer)
The second insulating layer 23 and the (m+2)-th insulating layer 25 are not particularly limited, but are made of, for example, the same material as the core resin layer 11 (eg, prepreg or insulating film material). be able to. The thicknesses of the second insulating layer 23 and the (m+2)th insulating layer 25 are appropriately set as desired, and are not particularly limited. 50 μm or less is preferable, and 5 μm or more and 20 μm or less is more preferable.
(第2の配線導体、第(m+2)の配線導体)
 第2の配線導体24及び第(m+2)の配線導体26は、例えば、銅などの金属により構成されている。第2の配線導体24及び第(m+2)の配線導体26の厚み及びパターン幅は、所望に応じて適宜設定されるため、特に限定されないが、例えば、第1の配線導体22と同様とすることができる。
(Second wiring conductor, (m+2)th wiring conductor)
The second wiring conductor 24 and the (m+2)th wiring conductor 26 are made of metal such as copper, for example. The thickness and pattern width of the second wiring conductor 24 and the (m+2)th wiring conductor 26 are not particularly limited because they are appropriately set as desired. can be done.
[支持体付き配線基板の第1の製造方法]
 図2及び図3は、支持体付き配線基板1の第1の製造方法の各工程を表すものである。支持体付き配線基板1の第1の製造方法は、例えば、支持体準備工程、第1の積層体形成工程、マスク形成工程、非貫通孔形成工程、マスク除去工程、めっき工程、パターンめっき工程、及び、第1の配線導体形成工程をこの順に含んでおり、更に続けて、第2の絶縁層形成工程、第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程をこの順に含んでいてもよい。
[First Method for Manufacturing Wiring Board with Support]
2 and 3 show each step of the first manufacturing method of the wiring board 1 with support. The first manufacturing method of the wiring board 1 with a support includes, for example, a support preparing step, a first laminate forming step, a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, and a first wiring conductor forming step in this order, followed by a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and plating finishing. The steps may be included in this order.
<支持体準備工程>
 まず、例えば、図2(A)に示したように、コア樹脂層11と、コア樹脂層11の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層12と、を有する支持体10を準備する(支持体準備工程)。具体的には、例えば、コア樹脂層11の少なくとも一方の面側に、キャリア付金属箔、又は、剥型層を有する金属箔を配置し、加熱及び加圧して、支持体10を形成する。
<Support preparation step>
First, for example, as shown in FIG. 2(A), it has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means. A support 10 is prepared (support preparing step). Specifically, for example, a metal foil with a carrier or a metal foil having a release layer is placed on at least one side of the core resin layer 11 and heated and pressed to form the support 10 .
<第1の積層体形成工程>
 次いで、必要に応じて、支持体10の第1の金属層12の表面に、第1の絶縁層21との密着力を得るための密着処理として粗化処理を施す。粗化処理は、特に限定されず、公知の手段を適宜使用でき、例えば、銅表面粗化液を用いる手段が挙げられる。続いて、例えば、図2(B)に示したように、支持体10の第1の金属層12の上に、第1の絶縁層21と、第1の金属箔41と、をこの順で配置し、加熱及び加圧して積層する(第1の積層体形成工程)。具体的には、例えば、第1の絶縁層21をキャリア付金属箔のマット面側に形成し、樹脂層付きのキャリア付金属箔とした後、この樹脂層付きのキャリア付金属箔を樹脂層(すなわち第1の絶縁層21)が第1の金属層12と接するように配置して、加熱加圧し、キャリアを剥離することにより、第1の絶縁層21と第1の金属箔41とを積層する。
<First laminate forming step>
Next, if necessary, the surface of the first metal layer 12 of the support 10 is subjected to a roughening treatment as an adhesion treatment for obtaining adhesion to the first insulating layer 21 . The roughening treatment is not particularly limited, and known means can be appropriately used, for example, means using a copper surface roughening liquid. Subsequently, for example, as shown in FIG. 2B, on the first metal layer 12 of the support 10, the first insulating layer 21 and the first metal foil 41 are formed in this order. Arrange, heat and pressurize to laminate (first laminate forming step). Specifically, for example, after the first insulating layer 21 is formed on the matte surface side of the metal foil with a carrier to form a metal foil with a resin layer with a carrier, the metal foil with a resin layer with a carrier is formed into a resin layer. (that is, the first insulating layer 21) is placed in contact with the first metal layer 12, and the first insulating layer 21 and the first metal foil 41 are separated by heating and pressurizing and separating the carrier. Laminate.
<マスク形成工程>
 次に、例えば、図2(C)に示したように、第1の金属箔41の一部をエッチングにより除去し、第1の絶縁層21に第1の非貫通孔21Aを形成するためのマスク42を形成する(マスク形成工程)。具体的には、例えば、第1の金属箔41の上にドライフィルムレジストをラミネートし、露光、現像をして、レジストパターンを形成し、スカム除去をした後、第1の金属箔41をエッチングしてマスク42を形成し、レジストパターンを除去する。ドライフィルムレジストの露光及び現像、スカム除去、エッチング、レジストパターンの除去については、特に限定されず、公知の手段及び装置を用いて実施することができる。
<Mask forming process>
Next, for example, as shown in FIG. 2C, a portion of the first metal foil 41 is removed by etching to form the first non-through holes 21A in the first insulating layer 21. A mask 42 is formed (mask forming step). Specifically, for example, a dry film resist is laminated on the first metal foil 41, exposed and developed to form a resist pattern, scum is removed, and then the first metal foil 41 is etched. Then, a mask 42 is formed and the resist pattern is removed. The exposure and development of the dry film resist, scum removal, etching, and removal of the resist pattern are not particularly limited, and can be carried out using known means and devices.
<非貫通孔形成工程>
 次いで、例えば、図2(D)に示したように、第1の絶縁層21のうち、マスク42で覆われていない部分を除去し、第1の非貫通孔21Aを形成する(非貫通孔形成工程)。第1の非貫通孔21Aの形成は、例えば、過マンガン酸ナトリウム水溶液等を用いたデスミア処理、又は、炭酸ガスレーザー等を用いたレーザー加工により行うことができる。レーザー加工の場合には、レーザー加工の後、必要に応じてデスミア処理を行う。
<Blind hole forming step>
Next, for example, as shown in FIG. 2D, the portions of the first insulating layer 21 that are not covered with the mask 42 are removed to form the first non-through holes 21A (non-through holes forming process). The formation of the first non-through holes 21A can be performed, for example, by desmear treatment using an aqueous solution of sodium permanganate or the like, or laser processing using a carbon dioxide laser or the like. In the case of laser processing, after laser processing, desmear treatment is performed as necessary.
<マスク除去工程>
 第1の非貫通孔21Aを形成した後、例えば、図2(E)に示したように、マスク42を除去する。マスク42の除去は、例えば、塩化第二鉄水溶液を用いたエッチングにより行うことができる。
<Mask removal process>
After forming the first non-through holes 21A, the mask 42 is removed, for example, as shown in FIG. 2(E). The removal of the mask 42 can be performed, for example, by etching using an aqueous solution of ferric chloride.
<めっき工程>
 マスク42を除去した後、例えば、図2(F)に示したように、第1の絶縁層21の表面及び第1の非貫通孔21Aの内壁に対して無電解めっき及び電解めっきの少なくとも一方を施して、第1の絶縁層21上に第2の金属層43を形成すると共に、第2の金属層43と第1の金属層12との層間を接続する第1の接続ビア21Bを形成する(めっき工程)。無電解めっき又は電解めっきを施す方法は、特に限定されるものではなく、公知の方法を採用することができる。めっきは、無電解めっきが好ましく、無電解めっきに加えて電解めっきを行ってもよい。
<Plating process>
After removing the mask 42, for example, as shown in FIG. to form a second metal layer 43 on the first insulating layer 21 and form a first connection via 21B connecting between the second metal layer 43 and the first metal layer 12. (plating process). The method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed. Plating is preferably electroless plating, and electrolytic plating may be performed in addition to electroless plating.
<パターンめっき工程>
 次いで、例えば、図3(G)に示したように、第2の金属層43上にレジストパターン44を形成した後、パターンめっきを施し、パターンめっき層45を形成する(パターンめっき工程)。レジストパターン44は、例えば、ドライフィルムレジストをラミネートし、ドライフィルムレジストに回路パターンを焼き付け、現像することにより形成することができる。焼き付け及び現像は特に限定されず、公知の手段及び装置を用いて実施することができる。パターンめっきは、例えば、パターン電解めっきにより行うことができる。パターン電解めっきについても、特に限定されず、公知の方法を適宜用いることができる。
<Pattern plating process>
Next, for example, as shown in FIG. 3G, after forming a resist pattern 44 on the second metal layer 43, pattern plating is performed to form a pattern plating layer 45 (pattern plating step). The resist pattern 44 can be formed, for example, by laminating a dry film resist, printing a circuit pattern on the dry film resist, and developing it. Printing and development are not particularly limited, and can be carried out using known means and devices. Pattern plating can be performed, for example, by pattern electroplating. Pattern electroplating is also not particularly limited, and known methods can be used as appropriate.
<第1の配線導体形成工程>
 パターンめっきを施した後、例えば、図3(H)に示したように、レジストパターン44を除去し、さらに露出した第2の金属層43をエッチングで除去して、第2の金属層43とパターンめっき層45とからなる第1の配線導体22を形成する(第1の配線導体形成工程)。レジストパターン44の除去は、公知の手段及び装置を用いて実施することができる。第2の金属層43のエッチングは、例えば、フラッシュエッチングにより行うことができる。
<First Wiring Conductor Forming Step>
After pattern plating, for example, as shown in FIG. A first wiring conductor 22 is formed from the pattern plating layer 45 (first wiring conductor forming step). The removal of the resist pattern 44 can be performed using known means and devices. Etching of the second metal layer 43 can be performed, for example, by flash etching.
<第2の絶縁層形成工程・第2の配線導体形成工程>
 第1の配線導体22を形成した後、例えば、図3(I)に示したように、第1の絶縁層21及び第1の配線導体22の上に、第2の絶縁層23を形成し、その上に第2の配線導体24を形成する。具体的には、まず、例えば、第1の配線導体22の表面に、第2の絶縁層23との密着力を得るための密着処理として粗化処理を施す。次いで、例えば、第1の絶縁層21及び第1の配線導体22の上に、樹脂層付きのキャリア付金属箔を樹脂層が第1の配線導体22と接するように配置して加熱加圧し、キャリアを剥離することにより、第2の絶縁層23と第2の金属箔とをこの順に積層する。樹脂層付きのキャリア付金属箔は、例えば、キャリア付金属箔の金属箔側に樹脂層を積層したものであり、樹脂層が第2の絶縁層23となり、金属箔が第2の金属箔となる(第2の絶縁層形成工程)。
<Second Insulating Layer Forming Step/Second Wiring Conductor Forming Step>
After forming the first wiring conductor 22, for example, as shown in FIG. , and a second wiring conductor 24 is formed thereon. Specifically, first, for example, the surface of the first wiring conductor 22 is subjected to roughening treatment as adhesion treatment for obtaining adhesion to the second insulating layer 23 . Next, for example, on the first insulating layer 21 and the first wiring conductor 22, a metal foil with a resin layer and a carrier is arranged so that the resin layer is in contact with the first wiring conductor 22, and heated and pressurized, By peeling off the carrier, the second insulating layer 23 and the second metal foil are laminated in this order. The metal foil with a carrier with a resin layer is obtained by, for example, laminating a resin layer on the metal foil side of the metal foil with a carrier, the resin layer serving as the second insulating layer 23, and the metal foil serving as the second metal foil. (second insulating layer forming step).
 続いて、例えば、炭酸ガスレーザー等を用いたレーザー加工により第2の金属箔及び第2の絶縁層23に穴開けして第1の配線導体22に達する第2の非貫通孔23Aを形成し、過マンガン酸ナトリウム水溶液等を用いてデスミア処理をする。次に、例えば、サブトラクティブ工法又はセミアディティブ工法などの公知の方法により第2の配線導体24を形成する。サブトラクティブ工法の場合には、例えば、まず、第2の非貫通孔23Aを形成した表面に無電解めっき及び電解めっきの少なくとも一方を施し、第2の非貫通孔23Aの内壁に第1の配線導体22と第2の金属箔とを接続する第2の接続ビア23Bを形成すると共に、第2の金属箔の厚みを増加させ、必要に応じて整面する。次いで、例えば、ドライフィルムレジスト等をラミネートし、ネガ型マスクを張り合わせて回路パターンを焼付け、現像して、エッチングレジストを形成する。続いて、例えば、エッチングレジストをマスクとして厚みを増加させた第2の金属箔をエッチングして第2の配線導体24を形成し、エッチングレジストを除去する(第2の配線導体形成工程)。 Subsequently, for example, a second non-through hole 23A reaching the first wiring conductor 22 is formed in the second metal foil and the second insulating layer 23 by laser processing using a carbon dioxide laser or the like. , desmear treatment using an aqueous solution of sodium permanganate or the like. Next, the second wiring conductor 24 is formed by a known method such as a subtractive method or a semi-additive method. In the case of the subtractive method, for example, first, at least one of electroless plating and electrolytic plating is applied to the surface on which the second non-through hole 23A is formed, and the first wiring is formed on the inner wall of the second non-through hole 23A. A second connection via 23B connecting the conductor 22 and the second metal foil is formed, the thickness of the second metal foil is increased, and the surface is smoothed as necessary. Next, for example, a dry film resist or the like is laminated, a negative mask is attached, a circuit pattern is printed, and an etching resist is formed by development. Subsequently, for example, the thickened second metal foil is etched using an etching resist as a mask to form the second wiring conductors 24, and the etching resist is removed (second wiring conductor forming step).
 セミアディティブ工法の場合には、例えば、まず、第2の非貫通孔23Aを形成した後、第2の金属箔をエッチング等により全て除去し、第1の絶縁層22を露出させる。次いで、例えば、無電解めっきを行い、第2の非貫通孔23Aの内壁に第2の接続ビア23Bを形成すると共に、第1の絶縁層22の上に無電解めっき層を形成する。続いて、例えば、無電解めっき層の上にドライフィルムを熱圧着してレジスト層を設け、露光及び現像を行い、レジストパターンを形成してスカム(レジスト残渣)を除去する。次いで、例えば、レジストパターンをめっきレジストとして、無電解銅めっき層の表面に電解めっきにより電解めっき層を形成し、レジストパターンを除去した後、露出された無電解めっき層をエッチングして、無電解めっき層及び電解めっき層からなる第2の配線導体24を形成する(第2の配線導体形成工程)。 In the case of the semi-additive method, for example, first, after forming the second non-through holes 23A, the second metal foil is completely removed by etching or the like to expose the first insulating layer 22 . Then, electroless plating is performed, for example, to form the second connection vias 23B on the inner walls of the second non-through holes 23A and form an electroless plating layer on the first insulating layer 22 . Subsequently, for example, a resist layer is provided by thermocompression bonding a dry film on the electroless plated layer, exposure and development are performed, a resist pattern is formed, and scum (resist residue) is removed. Next, for example, using the resist pattern as a plating resist, an electrolytic plated layer is formed on the surface of the electroless copper plated layer by electrolytic plating, and after removing the resist pattern, the exposed electroless plated layer is etched, and electroless A second wiring conductor 24 consisting of a plated layer and an electrolytic plating layer is formed (second wiring conductor forming step).
<ビルドアップ工程>
 第2の絶縁層23及び第2の配線導体24を形成した後、例えば、図3(J)に示したように、第2の絶縁層形成工程及び第2の配線導体形成工程と同じ工程をn回繰り返し行い、(n+2)層の配線導体を有するビルドアップ構造を形成してもよい。具体的には、例えば、第(m+1)の絶縁層23,25及び第(m+1)の配線導体24,26の上に、第(m+2)の絶縁層25を形成する第(m+2)の絶縁層形成工程、及び、第(m+2)の絶縁層25に第(m+1)の配線導体24,26に達する第(m+2)の非貫通孔25Aを形成し、第(m+2)の非貫通孔25Aが形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第(m+2)の配線導体26を形成する第(m+2)の配線導体形成工程を、この順にn回行い、ビルドアップ構造を形成してもよい(ビルドアップ工程)。m及びnは1以上の整数、但し、m≦nである。
<Build-up process>
After forming the second insulating layer 23 and the second wiring conductor 24, for example, as shown in FIG. The process may be repeated n times to form a buildup structure having (n+2) layers of wiring conductors. Specifically, for example, the (m+2)th insulating layer forming the (m+2)th insulating layer 25 on the (m+1)th insulating layers 23 and 25 and the (m+1) th wiring conductors 24 and 26 Formation step, forming the (m+2)th non-through hole 25A reaching the (m+1) th wiring conductors 24 and 26 in the (m+2)th insulating layer 25, and forming the (m+2)th non-through hole 25A At least one of electrolytic plating and electroless plating is applied to the coated surface to form the (m+2)th wiring conductor 26, and the (m+2)th wiring conductor forming step is performed n times in this order to form a buildup structure. (build-up process). m and n are integers of 1 or more, provided that m≦n.
<ソルダーレジスト層形成工程>
 第2の絶縁層23及び第2の配線導体24を形成した後、又は、第(n+2)の絶縁層25及び第(n+2)の配線導体26を形成した後、例えば、それらの上に、第2の配線導体24又は第(n+2)の配線導体26が部分的に露出するようにソルダーレジスト層27を形成する(ソルダーレジスト層形成工程)。ソルダーレジスト層27の形成方法は、特に限定されず、公知の手段を適宜採用することができる。
<Solder Resist Layer Forming Step>
After forming the second insulating layer 23 and the second wiring conductor 24, or after forming the (n+2)th insulating layer 25 and the (n+2)th wiring conductor 26, for example, a second The solder-resist layer 27 is formed so that the second wiring conductor 24 or the (n+2)-th wiring conductor 26 is partially exposed (solder-resist layer forming step). A method for forming the solder resist layer 27 is not particularly limited, and known means can be appropriately employed.
<めっき仕上げ工程>
 ソルダーレジスト層27を形成した後、例えば、ソルダーレジスト層27から露出した第2の配線導体24又は第(n+2)の配線導体26の上に、保護めっき層28を形成する。これにより、図1に示した支持体付き配線基板1が得られる。
<Plating finishing process>
After forming the solder-resist layer 27 , a protective plating layer 28 is formed, for example, on the second wiring conductor 24 or the (n+2)-th wiring conductor 26 exposed from the solder-resist layer 27 . Thereby, the wiring substrate 1 with the support shown in FIG. 1 is obtained.
[支持体付き配線基板の第2の製造方法]
 図4は、支持体付き配線基板1の第2の製造方法の工程を表すものである。第2の製造方法は、例えば、支持体準備工程、第1の積層体形成工程、非貫通孔形成工程、めっき工程、及び、第1の配線導体形成工程をこの順に含んでおり、更に続けて、第2の絶縁層形成工程、第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程をこの順に含んでいてもよい。これらの工程のうち、支持体準備工程、第1の積層体形成工程、第2の絶縁層形成工程、第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程は、第1の製造方法と同一である。よって、第1の製造方法と異なる各工程、すなわち非貫通孔形成工程、めっき工程、及び、第1の配線導体形成工程について説明する。
[Second Manufacturing Method of Wiring Board with Support]
FIG. 4 shows the steps of the second manufacturing method of the wiring board 1 with support. The second manufacturing method includes, for example, a support preparing step, a first laminate forming step, a non-through hole forming step, a plating step, and a first wiring conductor forming step in this order, and further , a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step in this order. Among these processes, a support preparing process, a first laminate forming process, a second insulating layer forming process, a second wiring conductor forming process, a build-up process, a solder resist layer forming process, and a plating finishing process are the same as the first manufacturing method. Therefore, each step different from the first manufacturing method, that is, the non-through hole forming step, the plating step, and the first wiring conductor forming step will be described.
<非貫通孔形成工程>
 第1の絶縁層21及び第1の金属箔41を積層した後、例えば、図4(D-2)に示したように、第1の金属箔41の表面から炭酸ガスレーザー等のレーザーを照射して第1の金属箔41及び第1の絶縁層21を穴開けし、第1の金属層12に到達する第1の非貫通孔21Aを形成する(非貫通孔形成工程)。次いで、必要に応じてデスミア処理を行う。
<Blind hole forming step>
After laminating the first insulating layer 21 and the first metal foil 41, for example, as shown in FIG. 4D-2, a laser such as a carbon dioxide laser is irradiated from the surface of the first metal foil 41. Then, the first metal foil 41 and the first insulating layer 21 are perforated to form the first non-through holes 21A reaching the first metal layer 12 (non-through hole forming step). Next, desmear processing is performed as necessary.
<めっき工程>
 第1の非貫通孔21Aを形成した後、例えば、図4(F-2)に示したように、第1の絶縁層21の表面及び第1の非貫通孔21Aの内壁に対して無電解めっき及び電解めっきの少なくとも一方を施し、第1の非貫通孔21Aの内壁に第1の金属層12と第1の金属箔41とを接続する第1の接続ビア21Bを形成すると共に、第1の金属箔41の厚みを増加させる(めっき工程)。次いで、必要に応じて整面する。無電解めっき又は電解めっきを施す方法は、特に限定されるものではなく、公知の方法を採用することができる。
<Plating process>
After forming the first non-through holes 21A, for example, as shown in FIG. At least one of plating and electrolytic plating is applied to form first connection vias 21B for connecting the first metal layer 12 and the first metal foil 41 to the inner walls of the first non-through holes 21A, and the first connection vias 21B are formed. to increase the thickness of the metal foil 41 (plating step). Next, the surface is leveled as necessary. The method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed.
<第1の配線導体形成工程>
 続いて、例えば、図4(H-2)に示したように、第1の金属箔41の上にドライフィルムレジスト等をラミネートし、ネガ型マスクを張り合わせて回路パターンを焼付け、現像して、エッチングレジストを形成する。次に、例えば、エッチングレジストをマスクとして厚みを増加させた第1の金属箔41をエッチングして第1の配線導体22を形成し、エッチングレジストを除去する(第1の配線導体形成工程)。このように、第2の製造方法によっても、第1の製造方法と同様に、支持体付き配線基板1を製造することができる。
<First Wiring Conductor Forming Step>
Subsequently, for example, as shown in FIG. 4(H-2), a dry film resist or the like is laminated on the first metal foil 41, a negative mask is pasted thereon, a circuit pattern is printed, and developed. An etching resist is formed. Next, for example, the thickened first metal foil 41 is etched using an etching resist as a mask to form the first wiring conductors 22, and the etching resist is removed (first wiring conductor forming step). Thus, the wiring board 1 with a support can be manufactured by the second manufacturing method as well as the first manufacturing method.
[電子部品実装基板の第1の製造方法]
 支持体付き配線基板1は、電子部品実装基板の製造に用いることができる。図5は、電子部品実装基板の第1の製造方法の工程を表すものである。電子部品実装基板の第1の製造方法は、例えば、支持体付き配線基板1を製造する工程と、コア樹脂層分離除去工程と、第1の金属層除去工程と、実装工程とをこの順に含んでいる。支持体付き配線基板1の製造工程は、上述した支持体付き配線基板1の第1の製造方法又は第2の製造方法の各工程を含むことができ、少なくとも、支持体準備工程から第2の配線導体形成工程を少なくとも含んでいる。
[First Method for Manufacturing Electronic Component Mounting Board]
The wiring board 1 with support can be used for manufacturing an electronic component mounting board. FIG. 5 shows the steps of the first manufacturing method of the electronic component mounting board. A first method for manufacturing an electronic component mounting board includes, for example, a step of manufacturing a wiring board 1 with a support, a core resin layer separating and removing step, a first metal layer removing step, and a mounting step in this order. I'm in. The manufacturing process of the wiring board with support 1 can include each process of the first manufacturing method or the second manufacturing method of the wiring board with support 1 described above, and at least includes the process of preparing the support to the second manufacturing method. At least a wiring conductor forming step is included.
<コア樹脂層分離除去工程>
 支持体付き配線基板1を製造した後、例えば、図5(A)に示したように、配線基板20からコア樹脂層11を分離除去する(コア樹脂層分離除去工程)。具体的には、例えば、少なくとも第1の配線導体22及び第2の配線導体24を形成した配線基板20から、コア樹脂層11を分離除去する。コア樹脂層11の分離除去は、例えば、剥離手段(例えば、剥離層又は剥型層)において剥離することにより行う。剥離は、物理的手段又は化学的手段のいずれも採用することができるが、例えば、剥離手段に物理的な力を加えて、物理的手段により剥離することが好ましい。この剥離により、コア樹脂層11、及び、場合により第1の金属層12の一部(例えば、キャリア)が剥離される。第1の金属層12の剥離手段の少なくとも一部は、少なくともコア樹脂層11と共に剥離されてもよく、また、剥離されずに残存してもよい。
<Core resin layer separation and removal step>
After manufacturing the wiring board 1 with a support, for example, as shown in FIG. 5A, the core resin layer 11 is separated and removed from the wiring board 20 (core resin layer separating and removing step). Specifically, for example, the core resin layer 11 is separated and removed from the wiring substrate 20 on which at least the first wiring conductors 22 and the second wiring conductors 24 are formed. Separation and removal of the core resin layer 11 is performed, for example, by peeling with a peeling means (for example, a peeling layer or a peeling layer). Either physical means or chemical means can be employed for peeling, but it is preferable to apply physical force to the peeling means and peel by physical means, for example. By this peeling, the core resin layer 11 and, in some cases, part of the first metal layer 12 (for example, the carrier) are peeled off. At least part of the peeling means of the first metal layer 12 may be peeled together with at least the core resin layer 11, or may remain without being peeled off.
<第1の金属層除去工程>
 コア樹脂層11を分離除去した後、例えば、図5(B)に示したように、残存する第1の金属層12を除去する(第1の金属層除去工程)。第1の金属層12を除去する手段は、特に限定されるものではないが、例えば、硫酸系又は過酸化水素系エッチング液を用いて除去することができる。硫酸系又は過酸化水素系エッチング液は、特に限定されるものではなく、当業界で使用されているものを使用することができる。なお、本実施形態の支持体付き配線基板1によれば、第1の絶縁層21により配線基板20を補強することができるので、支持体10を分離除去する際における配線基板20の破損を抑制することができる。また、第1の絶縁層21により端子位置の部分を開口し、それ以外を覆っているので、ソルダーレジスト層を形成せずに用いることができる。
<First Metal Layer Removal Step>
After separating and removing the core resin layer 11, for example, as shown in FIG. 5B, the remaining first metal layer 12 is removed (first metal layer removing step). The means for removing the first metal layer 12 is not particularly limited, but it can be removed using, for example, a sulfuric acid-based or hydrogen peroxide-based etchant. The sulfuric acid-based or hydrogen peroxide-based etchant is not particularly limited, and those used in the industry can be used. In addition, according to the wiring board 1 with the support of the present embodiment, the wiring board 20 can be reinforced by the first insulating layer 21, so that the wiring board 20 is prevented from being damaged when the support 10 is separated and removed. can do. In addition, since the first insulating layer 21 has openings at the terminal positions and covers the rest, it can be used without forming a solder resist layer.
<めっき仕上げ工程>
 第1の金属層12を除去した後、例えば、図5(C)に示したように、第1の絶縁層21から露出した第1の接続ビア21Bの上に、保護めっき層29を形成する。なお、上述した支持体付き配線基板の第1の製造方法及び第2の製造方法では、ソルダーレジスト層27を形成した後に、ソルダーレジスト層27から露出した第2の配線導体24又は第(n+2)の配線導体26の上に、保護めっき層28を形成する場合について説明したが、コア樹脂層分離除去工程の前ではなく、コア樹脂層分離除去工程及び第1の金属層除去工程を行った後に、保護めっき層29と共に保護めっき層28を形成するようにしてもよい。
<Plating finishing process>
After removing the first metal layer 12, for example, as shown in FIG. 5C, a protective plating layer 29 is formed on the first connection via 21B exposed from the first insulating layer 21. . In addition, in the above-described first and second manufacturing methods of a wiring board with support, after the solder-resist layer 27 is formed, the second wiring conductor 24 or the (n+2)th wiring conductor 24 exposed from the solder-resist layer 27 is formed. Although the case of forming the protective plating layer 28 on the wiring conductor 26 has been described, it is not before the core resin layer separation and removal step, but after the core resin layer separation and removal step and the first metal layer removal step are performed. , the protective plating layer 28 may be formed together with the protective plating layer 29 .
<実装工程>
 保護めっき層29を形成した後、例えば、図5(C)に示したように、配線基板20にはんだボール31を介して半導体素子30を実装する(実装工程)。配線基板20に半導体素子30を実装する方法としては、はんだボールを用いる方法に限定されず、例えば、アルミ電極部に金ワイヤのボールボンディング法によってベアチップを実装する方法を用いることができる。なお、図5では、1つの半導体素子30を実装した場合について示したが、複数の半導体素子30を実装してもよく、また、半導体素子30以外の電子部品素子を実装していてもよい。
<Mounting process>
After forming the protective plating layer 29, for example, as shown in FIG. 5C, the semiconductor element 30 is mounted on the wiring substrate 20 via the solder balls 31 (mounting step). The method of mounting the semiconductor element 30 on the wiring board 20 is not limited to the method using solder balls, and for example, a method of mounting a bare chip by ball bonding of gold wires to aluminum electrodes can be used. Although FIG. 5 shows the case where one semiconductor element 30 is mounted, a plurality of semiconductor elements 30 may be mounted, and electronic components other than the semiconductor elements 30 may be mounted.
[電子部品実装基板の第2の製造方法]
 図6は、支持体付き配線基板1の第2の製造方法の工程を表すものである。電子部品実装基板の第2の製造方法は、例えば、支持体付き配線基板1を製造する工程と、実装工程(図6(A)参照)と、コア樹脂層分離除去工程(図6(B)参照)と、第1の金属層除去工程とをこの順に含んでいる。すなわち、電子部品実装基板の第2の製造方法は、支持体10を分離除去する前に半導体素子30を実装することを除き、電子部品実装基板の第1の製造方法と同一である。各工程の内容は上述した通りである。
[Second Method for Manufacturing Electronic Component Mounting Board]
FIG. 6 shows the steps of the second manufacturing method of the wiring board 1 with support. The second method for manufacturing an electronic component mounting board includes, for example, a process of manufacturing a wiring board 1 with a support, a mounting process (see FIG. 6A), and a core resin layer separating and removing process (see FIG. 6B). ) and a first metal layer removing step in this order. That is, the second manufacturing method of the electronic component mounting board is the same as the first manufacturing method of the electronic component mounting board except that the semiconductor element 30 is mounted before the support 10 is separated and removed. The contents of each step are as described above.
 このように本実施の形態によれば、第1の金属層12の上に接して、端子位置に対応して第1の非貫通孔21Aが形成された第1の絶縁層21を設け、かつ、第1の絶縁層21の上に接して第1の配線導体22を設けるようにしたので、第1の絶縁層21により配線基板20を補強することができ、支持体10を分離除去する際に配線基板20が破損することを抑制することができる。また、第1の絶縁層21により端子位置の部分を開口し、それ以外を覆っているので、ソルダーレジスト層を形成する必要がなく、工程を簡素化することができる。 As described above, according to the present embodiment, the first insulating layer 21 having the first non-through holes 21A corresponding to the terminal positions is provided on and in contact with the first metal layer 12, and Since the first wiring conductor 22 is provided on and in contact with the first insulating layer 21, the wiring board 20 can be reinforced by the first insulating layer 21, and the support 10 is separated and removed. It is possible to suppress damage to the wiring board 20 over time. In addition, since the first insulating layer 21 has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
 以下に、実施例により本実施形態を具体的に説明するが、本実施形態はこれらの実施例により何ら制限されるものではない。 The present embodiment will be specifically described below with reference to examples, but the present embodiment is not limited by these examples.
[実施例1]
 次のようにして支持体付き配線基板1を作製した後、配線基板20から支持体10を分離除去した。
<支持体準備工程>(図2(A)参照)
 ビスマレイミドトリアジン樹脂(BT樹脂)をガラスクロス(ガラス繊維)に含浸させてBステージとしたプリプレグ(厚み0.100mm:三菱ガス化学株式会社製、製品名:GHPL-830NS ST56)をコア樹脂層11とし、コア樹脂層11の両面に、第1の金属層12として厚み18μmのキャリア銅箔付極薄銅箔(極薄銅箔;厚み5μm:三井金属鉱業株式会社製、製品名:MT18SD-H-T5)を、キャリア銅箔側がコア樹脂層11と接するように配置し、温度220±2℃、圧力3±0.2MPa、保持時間60分間の条件にて真空プレスを実施し、コア樹脂層11の両面に第1の金属層12を設けた支持体10を作製した。
[Example 1]
After manufacturing the wiring board 1 with the support as follows, the support 10 was separated and removed from the wiring board 20 .
<Support Preparing Step> (See FIG. 2(A))
A prepreg (thickness: 0.100 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS ST56) that is B-staged by impregnating a glass cloth (glass fiber) with a bismaleimide triazine resin (BT resin) is used as a core resin layer 11. Then, on both sides of the core resin layer 11, an ultra-thin copper foil with a carrier copper foil having a thickness of 18 μm as the first metal layer 12 (ultra-thin copper foil; thickness 5 μm: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18SD-H -T5) is placed so that the carrier copper foil side is in contact with the core resin layer 11, and vacuum pressing is performed under the conditions of a temperature of 220 ± 2 ° C., a pressure of 3 ± 0.2 MPa, and a holding time of 60 minutes to form the core resin layer. A support 10 having a first metal layer 12 provided on both sides of 11 was produced.
<第1の積層体形成工程>(図2(B)参照)
 オリゴフェニレンエーテル樹脂(製品名:OPE-2St2200、三菱ガス化学株式会社製)15.0質量部、ポリイミド樹脂(製品名:ネオプリム(登録商標)S100、三菱ガス化学株式会社製)49.9質量部、2,2-ビス-(4-(4-マレイミドフェノキシ)フェニル)プロパン(製品名:BMI-80、ケイ・アイ化成株式会社製)34.9質量部、硬化促進剤として2,4,5-トリフェニルイミダゾール(東京化成工業株式会社製)0.2質量部を配合(混合)して樹脂組成物を得た。樹脂組成物には無機充填材は添加しなかった。次いで、樹脂組成物をN-メチル-2-ピロリドンで希釈し、得られたワニスをバーコーターによって厚み18μmのキャリア銅箔付極薄銅箔(極薄銅箔(金属層);厚み3μm:三井金属鉱業株式会社製、製品名:MT18FL)のマット面側に塗布した。続いて、塗布膜を180℃で10分間加熱乾燥することにより、厚み2.5μmの第1の絶縁層21をキャリア付極薄金属箔に形成した樹脂層付きのキャリア銅箔付極薄銅箔を作製した。第1の絶縁層21を構成する樹脂材料のガラス転移温度は260℃である。
<First laminate forming step> (see FIG. 2(B))
Oligophenylene ether resin (product name: OPE-2St2200, manufactured by Mitsubishi Gas Chemical Company, Inc.) 15.0 parts by mass, polyimide resin (product name: Neoprim (registered trademark) S100, manufactured by Mitsubishi Gas Chemical Company, Inc.) 49.9 parts by mass , 2,2-bis-(4-(4-maleimidophenoxy)phenyl) propane (product name: BMI-80, manufactured by K-I Kasei Co., Ltd.) 34.9 parts by weight, 2,4,5 as a curing accelerator - A resin composition was obtained by blending (mixing) 0.2 parts by mass of triphenylimidazole (manufactured by Tokyo Chemical Industry Co., Ltd.). No inorganic filler was added to the resin composition. Next, the resin composition was diluted with N-methyl-2-pyrrolidone, and the resulting varnish was coated with a bar coater using an ultrathin copper foil with a carrier copper foil having a thickness of 18 μm (ultrathin copper foil (metal layer); thickness 3 μm: Mitsui Metal Mining Co., Ltd., product name: MT18FL) was applied to the matte surface side. Subsequently, the coating film is dried by heating at 180° C. for 10 minutes to form a first insulating layer 21 having a thickness of 2.5 μm on the ultra-thin metal foil with a carrier. was made. The glass transition temperature of the resin material forming the first insulating layer 21 is 260.degree.
 また、支持体10の第1の金属層12の表面に、銅表面粗化液CZ-8101(メック株式会社製、製品名)を用いて粗化処理を施した。次いで、作製した樹脂層付きのキャリア銅箔付極薄銅箔を樹脂層(すなわち第1の絶縁層21)が第1の金属層12と接するように配置して、圧力3±0.2MPa、温度220±2℃、保持時間60分間の条件で、真空プレスした。その後、厚み18μmのキャリア銅箔を剥離して、第1の金属層12上に、第1の絶縁層21と厚み3μmの第1の金属箔41とを積層した。 In addition, the surface of the first metal layer 12 of the support 10 was roughened using a copper surface roughening liquid CZ-8101 (manufactured by MEC Co., Ltd., product name). Next, the ultra-thin copper foil with a carrier copper foil with a resin layer was placed so that the resin layer (that is, the first insulating layer 21) was in contact with the first metal layer 12, and the pressure was 3±0.2 MPa. Vacuum pressing was performed under conditions of a temperature of 220±2° C. and a holding time of 60 minutes. Thereafter, the carrier copper foil with a thickness of 18 μm was peeled off, and the first insulating layer 21 and the first metal foil 41 with a thickness of 3 μm were laminated on the first metal layer 12 .
<マスク形成工程>(図2(C)参照)
 第1の金属箔41の上にドライフィルムレジストをラミネートし、露光、現像をして、レジストパターンを形成した。ドライフィルムレジストは日立化成工業株式会社のRD-1207の7μm厚を使用し、ラミネーターはオー・エヌ・シーの装置を使用した。ラミネート圧力0.4MPa、ラミネート温度110℃の条件で行った。露光はアドテックエンジニアリング株式会社のINPREX3650を使用した。露光後の現像は炭酸カリウム水溶液を使用した。30℃の液温度で東京化工機株式会社の装置を使用した。次いで、スカム除去を行った。スカム除去は、ノードソンアドバンストテクノロジー株式会社の装置を使用し、プラズマクリーニングにより行った。ガスはアルゴン、窒素、酸素、四フッ化メタンを使用した。続いて、第1の金属箔41をエッチングしてマスク42を形成し、レジストパターンを剥離した。エッチングは塩酸及び塩化第二銅水溶液を使用した。レジストパターンの剥離は三菱ガス化学株式会社のR-100Sを使用した。現像からエッチング及び剥離までの工程は東京化工機株式会社のスプレータイプの装置を使用した。
<Mask Forming Process> (See FIG. 2(C))
A dry film resist was laminated on the first metal foil 41, exposed and developed to form a resist pattern. RD-1207 manufactured by Hitachi Chemical Co., Ltd. with a thickness of 7 μm was used as a dry film resist, and an ONC apparatus was used as a laminator. The lamination pressure was 0.4 MPa and the lamination temperature was 110°C. INPREX3650 manufactured by ADTEC Engineering Co., Ltd. was used for exposure. A potassium carbonate aqueous solution was used for development after exposure. An apparatus manufactured by Tokyo Kakoki Co., Ltd. was used at a liquid temperature of 30°C. Descumming was then performed. Scum removal was performed by plasma cleaning using an apparatus of Nordson Advanced Technologies, Inc. Argon, nitrogen, oxygen, and tetrafluoromethane were used as gases. Subsequently, the first metal foil 41 was etched to form a mask 42, and the resist pattern was removed. Etching used hydrochloric acid and cupric chloride aqueous solution. R-100S manufactured by Mitsubishi Gas Chemical Co., Ltd. was used to remove the resist pattern. A spray type apparatus manufactured by Tokyo Kakoki Co., Ltd. was used for the steps from development to etching and peeling.
<非貫通孔形成工程>(図2(D)参照)
 マスク42を形成した後、温度80±5℃、濃度55±10g/Lの過マンガン酸ナトリウム水溶液を用いてデスミア処理を施し、マスク42で覆われていない部分の第1の絶縁層21を除去し、第1の金属層12に達する第1の非貫通孔21Aを形成した。デスミア処理は上村工業株式会社製のアップデスプロセスを使用した。膨潤液はアップデスMDS-37、エッチング液はアップデスMDE-40およびELC-SHの混合液、中和はアップデスMDN-62を使用した。エッチング槽は温度80℃とし、10分間の浸漬を行った。
<Non-through hole forming step> (see FIG. 2(D))
After the mask 42 is formed, desmear treatment is performed using a sodium permanganate aqueous solution having a temperature of 80±5° C. and a concentration of 55±10 g/L to remove the portion of the first insulating layer 21 not covered with the mask 42 . Then, a first non-through hole 21A reaching the first metal layer 12 was formed. For the desmearing process, an up-death process manufactured by Uyemura & Co., Ltd. was used. The swelling liquid used was Updes MDS-37, the etching liquid used was a mixture of Updes MDE-40 and ELC-SH, and the neutralization used Updes MDN-62. The temperature of the etching tank was set at 80° C., and the immersion was performed for 10 minutes.
<マスク除去工程>(図2(E)参照)
 第1の非貫通孔21Aを形成した後、マスク42を塩化第二鉄水溶液でエッチングして除去し、全面において第1の絶縁層21を露出させた。
<Mask removal step> (see FIG. 2(E))
After forming the first non-through holes 21A, the mask 42 was removed by etching with an aqueous solution of ferric chloride to expose the first insulating layer 21 over the entire surface.
<めっき工程>(図2(F)参照)
 マスク42を除去した後、第1の絶縁層21の表面に無電解銅めっきにて0.4μm~0.8μmの厚みのめっきを実施し、第2の金属層43を形成した。薬液は上村工業株式会社製スルカップPEAおよびホルムアルデヒド混合したものを使用した。無電解銅めっきの薬液温度は36℃で処理時間は10分とし、処理を実施した。これにより、第1の非貫通孔21Aの内壁がめっきによって接続され、第1の金属層12と第2の金属層43とが第1の接続ビア21Bにより電気的に接続された。
<Plating process> (See FIG. 2(F))
After removing the mask 42 , the surface of the first insulating layer 21 was electroless copper plated to a thickness of 0.4 μm to 0.8 μm to form a second metal layer 43 . As the chemical solution, a mixture of Sulcup PEA manufactured by Uyemura & Co., Ltd. and formaldehyde was used. The chemical solution temperature of the electroless copper plating was 36° C., and the processing time was 10 minutes. As a result, the inner walls of the first non-through holes 21A were connected by plating, and the first metal layer 12 and the second metal layer 43 were electrically connected by the first connection vias 21B.
<パターンめっき工程>(図3(G)参照)
 第2の金属層43を形成した後、第2の金属層43に温度110±10℃、圧力0.50±0.02MPaの条件で、厚み15μmのドライフィルムレジストLDF515F(ニッコー・マテリアルズ株式会社製、製品名)をラミネートした。ドライフィルムレジストへの回路パターンの焼付けを、平行露光機にて実施した後、1%炭酸ナトリウム水溶液を用いてドライフィルムレジストを現像し、レジストパターン44を形成した。次いで、硫酸銅濃度60g/L~80g/L、硫酸濃度150g/L~200g/Lの硫酸銅めっきラインにて5μm~15μmほどのパターン電解銅めっきを施し、パターンめっき層45を形成した。
<Pattern Plating Process> (See FIG. 3(G))
After forming the second metal layer 43, a dry film resist LDF515F (Nikko Materials Co., Ltd.) having a thickness of 15 μm is applied to the second metal layer 43 under conditions of a temperature of 110±10° C. and a pressure of 0.50±0.02 MPa. product name) was laminated. After the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 . Then, a pattern plating layer 45 was formed by performing pattern electrolytic copper plating of about 5 μm to 15 μm on a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L.
<第1の配線導体形成工程>(図3(H)参照)
 パターンめっき層45を形成した後、アミン系のレジスト剥離液を用いてレジストパターン44を剥離除去した。次いで、露出した第2の金属層43をフラッシュエッチングによりエッチングし、第1の配線導体22を形成した。
<First Wiring Conductor Forming Step> (See FIG. 3(H))
After the pattern plating layer 45 was formed, the resist pattern 44 was peeled off using an amine-based resist stripper. Then, the exposed second metal layer 43 was etched by flash etching to form the first wiring conductors 22 .
<第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程>(図3(I)(J)参照)
 第1の配線導体22を形成した後、第1の配線導体22の表面に、銅表面粗化液CZ-8101(メック株式会社製、製品名)を用いて粗化処理を施した。次いで、第1の絶縁層21及び第1の配線導体22の上に、樹脂層付きキャリア銅箔付極薄銅箔(極薄銅箔(金属層);厚み3μm、樹脂層厚み0.015mm;キャリア銅箔厚み18μm:三菱ガス化学株式会社製、製品名:CRS381NSI)を樹脂層が第1の配線導体22と接するように配置して、圧力3±0.2MPa、温度220±2℃、保持時間60分間の条件で、真空プレスし、キャリア銅箔を剥離することにより、第1の配線導体22上に、第2の絶縁層23と厚み3μmの第2の金属箔とを積層した。続いて、炭酸ガスレーザー加工機 ML605GTWIII-5200U(三菱電機株式会社製、製品名)を用いて、第2の金属箔及び第2の絶縁層23に穴開けして第1の配線導体22に達する第2の非貫通孔23Aを形成した。次いで、温度80±5℃、濃度55±10g/Lの過マンガン酸ナトリウム水溶液を用いてデスミア処理を施した。
<Second insulating layer/second wiring conductor forming step, build-up step> (see FIGS. 3(I) and 3(J))
After forming the first wiring conductor 22, the surface of the first wiring conductor 22 was roughened using a copper surface roughening liquid CZ-8101 (manufactured by MEC Co., Ltd., product name). Next, on the first insulating layer 21 and the first wiring conductor 22, an ultra-thin copper foil with a carrier copper foil with a resin layer (ultra-thin copper foil (metal layer); thickness 3 μm, resin layer thickness 0.015 mm; A carrier copper foil thickness of 18 μm: manufactured by Mitsubishi Gas Chemical Co., Ltd., product name: CRS381NSI) is placed so that the resin layer is in contact with the first wiring conductor 22, and the pressure is 3 ± 0.2 MPa, the temperature is 220 ± 2 ° C., and the temperature is maintained. The second insulating layer 23 and the second metal foil having a thickness of 3 μm were laminated on the first wiring conductor 22 by vacuum pressing for 60 minutes and peeling off the carrier copper foil. Subsequently, using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name), holes are made in the second metal foil and the second insulating layer 23 to reach the first wiring conductor 22. A second non-through hole 23A was formed. Next, desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80±5° C. and a concentration of 55±10 g/L.
 その後、無電解銅めっきにて0.4μm~0.8μmの厚みのめっきを実施し、更に、電解銅めっきにて5μm~20μmの厚みのめっきを実施した。これにより、第2の非貫通孔23Aの内壁に第1の配線導体22と第2の金属箔とを接続する第2の接続ビア23Bを形成すると共に、第2の金属箔の厚みを増加させた。次いで、第2の金属箔の整面を実施し、温度110±10℃、圧力0.50±0.02MPaの条件でドライフィルムレジストLDF515F(ニッコー・マテリアルズ株式会社製、製品名)をラミネートした。続いて、ネガ型マスクを張り合わせ、平行露光機を用いて回路パターンを焼付け、1%炭酸ナトリウム水溶液を用いてドライフィルムレジストを現像してエッチングレジストを形成した。次に、エッチングレジストのない部分の第2の金属箔を塩化第二鉄水溶液でエッチング除去した後、水酸化ナトリウム水溶液を用いてエッチングレジストを除去し、第2の配線導体24を形成した。 After that, electroless copper plating was applied to a thickness of 0.4 μm to 0.8 μm, and electrolytic copper plating was applied to a thickness of 5 μm to 20 μm. As a result, a second connection via 23B for connecting the first wiring conductor 22 and the second metal foil is formed on the inner wall of the second non-through hole 23A, and the thickness of the second metal foil is increased. rice field. Next, the surface of the second metal foil was smoothed, and a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated under the conditions of a temperature of 110 ± 10 ° C. and a pressure of 0.50 ± 0.02 MPa. . Subsequently, a negative mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist. Next, after removing the portion of the second metal foil without the etching resist by etching with an aqueous ferric chloride solution, the etching resist was removed using an aqueous sodium hydroxide solution to form the second wiring conductor 24 .
 その後、同様にして第(m+2)の絶縁層25及び第(m+2)の配線導体26の形成を3回繰り返し行い、ビルドアップ構造を形成した。 After that, similarly, the formation of the (m+2)th insulating layer 25 and the (m+2)th wiring conductor 26 was repeated three times to form a buildup structure.
<ソルダーレジスト層形成工程>
 第5の絶縁層25及び第5の配線導体26を積層した後、その上に、第5の配線導体26が部分的に露出するように厚み10μmのソルダーレジスト層27を形成した。
<Solder Resist Layer Forming Step>
After stacking the fifth insulating layer 25 and the fifth wiring conductor 26, a solder resist layer 27 having a thickness of 10 μm was formed thereon so that the fifth wiring conductor 26 was partially exposed.
<めっき仕上げ工程>
 ソルダーレジスト層27を形成した後、ソルダーレジスト層27から露出した第5の配線導体26の上に、保護めっき層28を形成した。これにより、支持体付き配線基板1を得た(図1参照)。
<Plating finishing process>
After forming the solder resist layer 27 , a protective plating layer 28 was formed on the fifth wiring conductor 26 exposed from the solder resist layer 27 . Thus, a wiring board 1 with a support was obtained (see FIG. 1).
<コア樹脂層分離除去工程、第1の金属層除去工程>(図5(A)(B)参照)
 得られた支持体付き配線基板1について、第1の金属層12の極薄銅箔とキャリア銅箔の境界部に物理的な力を加えて、少なくともコア樹脂層11を剥離して除去した。次いで、残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例1で得られた配線基板20において破損は見られず、良好な配線基板20を得ることができた。
<Core resin layer separation and removal step, first metal layer removal step> (see FIGS. 5A and 5B)
Physical force was applied to the interface between the ultra-thin copper foil of the first metal layer 12 and the carrier copper foil of the obtained wiring board 1 with a support, and at least the core resin layer 11 was peeled off and removed. Next, the remaining first metal layer 12 (ultrathin copper foil) was removed using a perhydrate sulfuric acid-based soft etchant to obtain a set of wiring boards 20 . No breakage was found in the wiring board 20 obtained in Example 1, and a good wiring board 20 was obtained.
[実施例2]
 実施例1と同様にして、支持体準備工程、第1の積層体形成工程、及び、マスク形成工程を行った(図2(A)~(C)参照)。次いで、非貫通孔形成工程(図2(D)参照)において、デスミア処理でなく炭酸ガスレーザー加工機 ML605GTWIII-5200U(三菱電機株式会社製、製品名)を用いて第1の非貫通孔21Aを形成した後、温度80±5℃、濃度55±10g/Lの過マンガン酸ナトリウム水溶液を用いてデスミア処理を施した。その後、実施例1と同様にして、マスク除去工程、めっき工程、パターンめっき工程、第1の配線導体形成工程、第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程を行い、支持体付き配線基板1を得た(図2(E)~図3(J)及び図1参照)。得られた支持体付き配線基板1について、実施例1と同様にして、コア樹脂層11を分離除去し、次いで残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例2においても配線基板20に破損は見られず、良好な配線基板20を得ることができた。
[Example 2]
In the same manner as in Example 1, a support preparation step, a first laminate formation step, and a mask formation step were performed (see FIGS. 2A to 2C). Next, in the non-through hole forming step (see FIG. 2(D)), the carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) is used instead of desmear treatment to form the first non-through hole 21A. After forming, it was desmeared using an aqueous solution of sodium permanganate at a temperature of 80±5° C. and a concentration of 55±10 g/L. Thereafter, in the same manner as in Example 1, a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer/second wiring conductor forming step, a build-up step, and a solder resist layer. A forming step and a plating finishing step were carried out to obtain a wiring board 1 with a support (see FIGS. 2(E) to 3(J) and FIG. 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 2, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
[実施例3]
 実施例1と同様にして、支持体準備工程、及び、第1の積層体形成工程を行った(図2(A)(B)参照)。次いで、第1の金属箔41の表面から炭酸ガスレーザー加工機 ML605GTWIII-5200U(三菱電機株式会社製、製品名)を用いて炭酸ガスレーザーを照射し、第1の金属箔41及び第1の絶縁層21に穴開けし、第1の金属層12に達する第1の非貫通孔21Aを形成した(非貫通孔形成工程;図4(D-2)参照)。続いて、温度80±5℃、濃度55±10g/Lの過マンガン酸ナトリウム水溶液を用いてデスミア処理を施した。次に、無電解銅めっきにて0.4μm~0.8μmの厚みのめっきを実施し、更に、電解銅めっきにて5μm~20μmの厚みのめっきを実施した。これにより、第1の非貫通孔21Aの内壁に第1の金属層12と第1の金属箔41とを接続する第1の接続ビア21Bを形成すると共に、第1の金属箔41の厚みを増加させた(めっき工程;図4(F-2)参照)。その後、第1の金属箔41の整面を実施した。
[Example 3]
In the same manner as in Example 1, the support preparation step and the first laminate formation step were performed (see FIGS. 2A and 2B). Next, a carbon dioxide laser is irradiated from the surface of the first metal foil 41 using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation. A hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)). Subsequently, desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80±5° C. and a concentration of 55±10 g/L. Next, electroless copper plating was applied to a thickness of 0.4 μm to 0.8 μm, and electrolytic copper plating was applied to a thickness of 5 μm to 20 μm. As a result, a first connection via 21B connecting the first metal layer 12 and the first metal foil 41 is formed on the inner wall of the first non-through hole 21A, and the thickness of the first metal foil 41 is reduced. increased (plating process; see FIG. 4 (F-2)). After that, the surface of the first metal foil 41 was smoothed.
 次いで、第1の金属箔41の上に、温度110±10℃、圧力0.50±0.02MPaの条件でドライフィルムレジストLDF515F(ニッコー・マテリアルズ株式会社製、製品名)をラミネートし、ネガ型マスクを張り合わせ、平行露光機を用いて回路パターンを焼付け、1%炭酸ナトリウム水溶液を用いてドライフィルムレジストを現像してエッチングレジストを形成した。続いて、エッチングレジストのない部分の第1の金属箔41を塩化第二鉄水溶液でエッチング除去した後、水酸化ナトリウム水溶液を用いてエッチングレジストを除去し、第1の配線導体22を形成した(第1の配線導体形成工程;図4(H-2)参照)。その後、実施例1と同様にして、第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程を行い、支持体付き配線基板1を得た(図3(I)(J)及び図1参照)。得られた支持体付き配線基板1について、実施例1と同様にして、コア樹脂層11を分離除去し、次いで残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例3においても配線基板20に破損は見られず、良好な配線基板20を得ることができた。 Next, a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110±10° C. and a pressure of 0.50±0.02 MPa. A mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist. Subsequently, the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG. 4(H-2)). After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 3, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
[実施例4]
 実施例1と同様にして、支持体準備工程、第1の積層体形成工程、マスク形成工程、非貫通孔形成工程、マスク除去工程、めっき工程、パターンめっき工程、及び、第1の配線導体形成工程を行った(図2(A)~図3(H)参照)。次いで、第2の絶縁層23に、ビスマレイミドトリアジン樹脂(BT樹脂)をガラスクロス(ガラス繊維)に含浸させてBステージとしたプリプレグ(厚み0.015mm:三菱ガス化学株式会社製、製品名:GHPL-830NS SV63)用い、厚み18μmのキャリア銅箔付極薄銅箔(極薄銅箔(金属層);厚み3μm:三井金属鉱業株式会社製、製品名:MT18FL)を極薄銅箔側がプリプレグと接するように配置して、温度220±2℃、圧力3±0.2MPa、保持時間60分間の条件で、真空プレスしたことを除き、他は実施例1と同様にして第2の絶縁層23及び第2の配線導体24を形成した(第2の絶縁層・第2の配線導体形成工程;図3(I)参照)。続いて、実施例1と同様にして、ビルドアップ工程(図3(J)参照)、ソルダーレジスト層形成工程、及び、めっき仕上げ工程を行い、支持体付き配線基板1を得た(図1参照)。得られた支持体付き配線基板1について、実施例1と同様にして、コア樹脂層11を分離除去し、次いで残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例4においても配線基板20に破損は見られず、良好な配線基板20を得ることができた。
[Example 4]
In the same manner as in Example 1, a support preparation step, a first laminate formation step, a mask formation step, a non-through hole formation step, a mask removal step, a plating step, a pattern plating step, and a first wiring conductor formation. Steps were performed (see FIGS. 2A to 3H). Next, on the second insulating layer 23, a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 μm (ultra-thin copper foil (metal layer); thickness 3 μm: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side. A second insulating layer in the same manner as in Example 1 except that it was placed in contact with and vacuum pressed under the conditions of a temperature of 220 ± 2 ° C., a pressure of 3 ± 0.2 MPa, and a holding time of 60 minutes. 23 and a second wiring conductor 24 were formed (second insulating layer/second wiring conductor forming step; see FIG. 3(I)). Subsequently, in the same manner as in Example 1, a build-up step (see FIG. 3(J)), a solder resist layer forming step, and a plating finish step were performed to obtain a wiring board 1 with a support (see FIG. 1). ). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 4, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
[実施例5]
 実施例1と同様にして、支持体準備工程を行った(図2(A)参照)。次いで、第1の絶縁層21に、ビスマレイミドトリアジン樹脂(BT樹脂)をガラスクロス(ガラス繊維)に含浸させてBステージとしたプリプレグ(厚み0.015mm:三菱ガス化学株式会社製、製品名:GHPL-830NS SV63)用い、厚み18μmのキャリア銅箔付極薄銅箔(極薄銅箔(金属層);厚み3μm:三井金属鉱業株式会社製、製品名:MT18FL)を極薄銅箔側がプリプレグと接するように配置して、温度220±2℃、圧力3±0.2MPa、保持時間60分間の条件で、真空プレスしたことを除き、他は実施例1と同様にして第1の絶縁層21及び第1の金属箔41を積層した(第1の積層体形成工程;図2(B)参照)。第1の絶縁層21に含まれる樹脂材料のガラス転移温度は270℃である。
[Example 5]
A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)). Next, on the first insulating layer 21, a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 μm (ultra-thin copper foil (metal layer); thickness 3 μm: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side. The first insulating layer in the same manner as in Example 1 except that it was placed in contact with and vacuum pressed under the conditions of a temperature of 220 ± 2 ° C., a pressure of 3 ± 0.2 MPa, and a holding time of 60 minutes. 21 and the first metal foil 41 were laminated (first laminate forming step; see FIG. 2(B)). The glass transition temperature of the resin material contained in the first insulating layer 21 is 270.degree.
 続いて、実施例1と同様にして、マスク形成工程、非貫通孔形成工程、マスク除去工程、めっき工程、パターンめっき工程、第1の配線導体形成工程、第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程を行い、支持体付き配線基板1を得た(図2(C)~図3(J)及び図1参照)。得られた支持体付き配線基板1について、実施例1と同様にして、コア樹脂層11を分離除去し、次いで残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例5においても配線基板20に破損は見られず、良好な配線基板20を得ることができた。 Subsequently, in the same manner as in Example 1, a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer and a second wiring. A conductor forming process, a build-up process, a solder resist layer forming process, and a plating finish process were carried out to obtain a wiring board 1 with a support (see FIGS. 2(C) to 3(J) and FIG. 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 5, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
[実施例6]
 実施例1と同様にして、支持体準備工程を行った(図2(A)参照)。次いで、実施例1で第1の絶縁層21を形成した樹脂組成物(オリゴフェニレンエーテル樹脂(製品名:OPE-2St2200、三菱ガス化学株式会社製)15.0質量部、ポリイミド樹脂(製品名:ネオプリム(登録商標)S100、三菱ガス化学株式会社製)49.9質量部、2,2-ビス-(4-(4-マレイミドフェノキシ)フェニル)プロパン(製品名:BMI-80、ケイ・アイ化成株式会社製)34.9質量部、2,4,5-トリフェニルイミダゾール(東京化成工業株式会社製)0.2質量部)を用い、実施例1と同様にして、樹脂層付きのキャリア銅箔付極薄銅箔を作製し、第1の金属層12の表面に積層した後、キャリア銅箔を剥離した。続いて、極薄銅箔を塩化第二鉄水溶液でエッチング除去し、全面において樹脂層を露出させた。
[Example 6]
A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)). Next, the resin composition for forming the first insulating layer 21 in Example 1 (oligophenylene ether resin (product name: OPE-2St2200, manufactured by Mitsubishi Gas Chemical Company, Inc.) 15.0 parts by mass, polyimide resin (product name: Neoprim (registered trademark) S100, manufactured by Mitsubishi Gas Chemical Co., Ltd.) 49.9 parts by mass, 2,2-bis-(4-(4-maleimidophenoxy)phenyl) propane (product name: BMI-80, K-I Kasei Co., Ltd.) 34.9 parts by mass, 2,4,5-triphenylimidazole (manufactured by Tokyo Chemical Industry Co., Ltd.) 0.2 parts by mass) in the same manner as in Example 1, carrier copper with a resin layer A foil-attached ultra-thin copper foil was prepared and laminated on the surface of the first metal layer 12, and then the carrier copper foil was peeled off. Subsequently, the ultrathin copper foil was etched away with an aqueous solution of ferric chloride to expose the resin layer over the entire surface.
 次に、樹脂層の表面に、ビスマレイミドトリアジン樹脂(BT樹脂)をガラスクロス(ガラス繊維)に含浸させてBステージとしたプリプレグ(厚み0.015mm:三菱ガス化学株式会社製、製品名:GHPL-830NS SV63)を配置し、その上に、厚み18μmのキャリア銅箔付極薄銅箔(極薄銅箔(金属層);厚み3μm:三井金属鉱業株式会社製、製品名:MT18FL)を、極薄銅箔側がプリプレグと接するように配置して、圧力3±0.2MPa、温度220±2℃、保持時間60分間の条件で、真空プレスし、キャリア銅箔を剥離した。これにより、第1の金属層12上に、樹脂層とプリプレグの2層構造を有する第1の絶縁層21と、第1の金属箔41とを積層した(第1の積層体形成工程;図2(B)参照)。第1の絶縁層21の樹脂層を構成する樹脂材料のガラス転移温度は260℃、プリプレグに含まれる樹脂材料のガラス転移温度は270℃である。 Next, on the surface of the resin layer, a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL -830NS SV63), and on top of that, an ultra-thin copper foil with a carrier copper foil (ultra-thin copper foil (metal layer); thickness 3 μm: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL), The ultra-thin copper foil side was placed in contact with the prepreg and vacuum pressed under the conditions of a pressure of 3±0.2 MPa, a temperature of 220±2° C., and a holding time of 60 minutes to separate the carrier copper foil. As a result, the first insulating layer 21 having a two-layer structure of the resin layer and the prepreg and the first metal foil 41 were laminated on the first metal layer 12 (first laminate forming step; FIG. 2(B)). The glass transition temperature of the resin material forming the resin layer of the first insulating layer 21 is 260°C, and the glass transition temperature of the resin material contained in the prepreg is 270°C.
 その後、第1の金属箔41の表面から炭酸ガスレーザー加工機 ML605GTWIII-5200U(三菱電機株式会社製、製品名)を用いて炭酸ガスレーザーを照射し、第1の金属箔41及び第1の絶縁層21に穴開けし、第1の金属層12に達する第1の非貫通孔21Aを形成した(非貫通孔形成工程;図4(D-2)参照)。次いで、温度80±5℃、濃度55±10g/Lの過マンガン酸ナトリウム水溶液を用いてデスミア処理を施した。続いて、無電解銅めっきにて0.4μm~0.8μmの厚みのめっきを実施し、更に、電解銅めっきにて5μm~20μmの厚みのめっきを実施した。これにより、第1の非貫通孔21Aの内壁に第1の金属層12と第1の金属箔41とを接続する第1の接続ビア21Bを形成すると共に、第1の金属箔41の厚みを増加させた(めっき工程;図4(F-2)参照)。その後、第1の金属箔41の整面を実施した。 After that, the surface of the first metal foil 41 is irradiated with a carbon dioxide laser using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation. A hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)). Next, desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80±5° C. and a concentration of 55±10 g/L. Subsequently, electroless copper plating was applied to a thickness of 0.4 μm to 0.8 μm, and electrolytic copper plating was applied to a thickness of 5 μm to 20 μm. As a result, a first connection via 21B connecting the first metal layer 12 and the first metal foil 41 is formed on the inner wall of the first non-through hole 21A, and the thickness of the first metal foil 41 is reduced. increased (plating process; see FIG. 4 (F-2)). After that, the surface of the first metal foil 41 was smoothed.
 次いで、第1の金属箔41の上に、温度110±10℃、圧力0.50±0.02MPaの条件でドライフィルムレジストLDF515F(ニッコー・マテリアルズ株式会社製、製品名)をラミネートし、ネガ型マスクを張り合わせ、平行露光機を用いて回路パターンを焼付け、1%炭酸ナトリウム水溶液を用いてドライフィルムレジストを現像してエッチングレジストを形成した。続いて、エッチングレジストのない部分の第1の金属箔41を塩化第二鉄水溶液でエッチング除去した後、水酸化ナトリウム水溶液を用いてエッチングレジストを除去し、第1の配線導体22を形成した(第1の配線導体形成工程;図4(H-2)参照)。その後、実施例1と同様にして、第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程、ソルダーレジスト層形成工程、及び、めっき仕上げ工程を行い、支持体付き配線基板1を得た(図3(I)(J)及び図1参照)。得られた支持体付き配線基板1について、実施例1と同様にして、コア樹脂層11を分離除去し、次いで残存する第1の金属層12(極薄銅箔)を、過水硫酸系のソフトエッチング液を用いて除去し、一組の配線基板20を得た。実施例6においても配線基板20に破損は見られず、良好な配線基板20を得ることができた。 Next, a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110±10° C. and a pressure of 0.50±0.02 MPa. A mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist. Subsequently, the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG. 4(H-2)). After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 6, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
[比較例1]
 実施例1と同様にして、支持体準備工程を行った。次いで、第1の積層体形成工程、マスク形成工程、非貫通孔形成工程、マスク除去工程、及び、めっき工程を行わず、パターンめっき工程において、支持体10の第1の金属層12に、温度110±10℃、圧力0.50±0.02MPaの条件で、厚み15μmのドライフィルムレジストLDF515F(ニッコー・マテリアルズ株式会社製、製品名)をラミネートした。ドライフィルムレジストへの回路パターンの焼付けを、平行露光機にて実施した後、1%炭酸ナトリウム水溶液を用いてドライフィルムレジストを現像し、レジストパターン44を形成した。続いて、硫酸銅濃度60g/L~80g/L、硫酸濃度150g/L~200g/Lの硫酸銅めっきラインにて5μm~15μmほどのパターン電解銅めっきを施し、パターンめっき層45を形成した。
[Comparative Example 1]
A support preparation step was carried out in the same manner as in Example 1. Next, in the pattern plating step, the first metal layer 12 of the support 10 is subjected to temperature A dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) having a thickness of 15 μm was laminated under conditions of 110±10° C. and a pressure of 0.50±0.02 MPa. After the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 . Subsequently, a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L was used to perform pattern electrolytic copper plating to a thickness of about 5 μm to 15 μm to form a pattern plating layer 45 .
 次に、第1の配線導体形成工程において、アミン系のレジスト剥離液を用いてレジストパターン44を剥離除去した。その後、実施例1と同様に、第2の絶縁層・第2の配線導体形成工程、ビルドアップ工程を実施した。次いで、ソルダーレジスト層形成工程を実施せず、支持体の分離除去を試みたが、配線基板が破損し、配線基板を得ることができなかった。 Next, in the first wiring conductor forming step, the resist pattern 44 was peeled off using an amine-based resist stripper. After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step and a build-up step were carried out. Next, an attempt was made to separate and remove the support without carrying out the solder resist layer forming step, but the wiring board was damaged and no wiring board could be obtained.
 すなわち、本実施例によれば、第1の絶縁層21により配線基板20を補強することができ、コア樹脂層11を分離除去する際に配線基板20が破損することを抑制することができることが分かった。 That is, according to the present embodiment, the wiring board 20 can be reinforced by the first insulating layer 21, and damage to the wiring board 20 can be suppressed when the core resin layer 11 is separated and removed. Do you get it.
 プリント配線板及び半導体素子搭載用パッケージ基板に利用することができる。 It can be used for printed wiring boards and package substrates for mounting semiconductor devices.
 1…支持体付き配線基板、10…支持体、11…コア樹脂層、12…第1の金属層、20…配線基板、21…第1の絶縁層、21A…第1の非貫通孔、21B…第1の接続ビア、22…第1の配線導体、23…第2の絶縁層、23A…第2の非貫通孔、23B…第2の接続ビア、24…第2の配線導体、25…第(m+2)の絶縁層、25A…第(m+2)の非貫通孔、25B…第(m+2)の接続ビア、26…第(m+2)の配線導体、27…ソルダーレジスト層、28,29…保護めっき層、30…半導体素子、31…はんだボール、41…第1の金属箔、42…マスク、43…第2の金属層、44…レジストパターン、45…パターンめっき層

 
DESCRIPTION OF SYMBOLS 1... Wiring board with support, 10... Support, 11... Core resin layer, 12... First metal layer, 20... Wiring board, 21... First insulating layer, 21A... First non-through hole, 21B 1st connection via 22 1st wiring conductor 23 2nd insulating layer 23A 2nd non-through hole 23B 2nd connection via 24 2nd wiring conductor 25 (m+2)-th insulating layer, 25A... (m+2)-th non-through hole, 25B... (m+2)-th connection via, 26... (m+2)-th wiring conductor, 27... solder resist layer, 28, 29... protection Plating layer 30 Semiconductor element 31 Solder ball 41 First metal foil 42 Mask 43 Second metal layer 44 Resist pattern 45 Pattern plating layer

Claims (21)

  1.  コア樹脂層の少なくとも一方の面側に剥離手段を有する第1の金属層が設けられた支持体と、前記第1の金属層の上に設けられた配線基板とを備えた支持体付き配線基板であって、
     前記配線基板は、前記第1の金属層の上に接して設けられた第1の絶縁層と、前記第1の絶縁層の上に接して設けられた第1の配線導体とを有し、
     前記第1の絶縁層には、前記配線基板の端子位置に対応して、前記第1の配線導体から前記第1の金属層に達する第1の非貫通孔が設けられ、
     前記第1の非貫通孔の内壁には前記第1の配線導体に接続された第1の接続ビアが形成された、支持体付き配線基板。
    A wiring board with a support, comprising a support provided with a first metal layer having a peeling means on at least one surface side of a core resin layer, and a wiring board provided on the first metal layer. and
    The wiring board has a first insulating layer provided on and in contact with the first metal layer, and a first wiring conductor provided on and in contact with the first insulating layer,
    The first insulating layer is provided with a first non-through hole extending from the first wiring conductor to the first metal layer corresponding to the terminal position of the wiring board,
    A wiring substrate with support, wherein a first connection via connected to the first wiring conductor is formed on an inner wall of the first non-through hole.
  2.  前記第1の絶縁層は絶縁性の樹脂材料を含んでおり、前記樹脂材料のガラス転移温度は150℃以上である、請求項1記載の支持体付き配線基板。 The wiring board with support according to claim 1, wherein said first insulating layer contains an insulating resin material, and said resin material has a glass transition temperature of 150°C or higher.
  3.  前記第1の絶縁層の厚みは、9μm以下である、請求項1記載の支持体付き配線基板。 The wiring board with support according to claim 1, wherein the thickness of the first insulating layer is 9 µm or less.
  4.  前記第1の金属層における前記第1の絶縁層の側の端面から前記剥離手段までの厚みが、6μm以上である、請求項1記載の支持体付き配線基板。 The wiring board with a support according to claim 1, wherein the thickness from the end surface of the first metal layer on the first insulating layer side to the peeling means is 6 µm or more.
  5.  コア樹脂層と、前記コア樹脂層の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層と、を有する支持体を準備する支持体準備工程と、
     前記第1の金属層の上に、第1の絶縁層と、第1の金属箔と、をこの順で配置し、加熱及び加圧して積層する第1の積層体形成工程と、
     前記第1の金属箔の一部をエッチングにより除去し、前記第1の絶縁層に第1の非貫通孔を形成するためのマスクを形成するマスク形成工程と、
     前記第1の絶縁層のうち、前記マスクで覆われていない部分を除去し、第1の非貫通孔を形成する非貫通孔形成工程と、
     前記第1の非貫通孔を形成した後、前記マスクを除去するマスク除去工程と、
     前記第1の絶縁層の表面及び前記第1の非貫通孔の内壁に対して無電解めっき及び電解めっきの少なくとも一方を施して、前記第1の絶縁層上に第2の金属層を形成すると共に、前記第2の金属層と前記第1の金属層との層間を接続する第1の接続ビアを形成するめっき工程と、
     前記第2の金属層上にレジストパターンを形成した後、パターンめっきを施すパターンめっき工程と、
     前記レジストパターンを除去し、さらに露出した前記第2の金属層をエッチングで除去して、第1の配線導体を形成する第1の配線導体形成工程と、
     を含む支持体付き配線基板の製造方法。
    a support preparation step of preparing a support having a core resin layer and a first metal layer provided on at least one side of the core resin layer and provided with a peeling means;
    a first laminate forming step of placing a first insulating layer and a first metal foil in this order on the first metal layer and laminating them by heating and pressurizing;
    a mask forming step of removing a portion of the first metal foil by etching to form a mask for forming a first non-through hole in the first insulating layer;
    a non-through hole forming step of removing a portion of the first insulating layer not covered with the mask to form a first non-through hole;
    a mask removing step of removing the mask after forming the first non-through hole;
    At least one of electroless plating and electrolytic plating is applied to the surface of the first insulating layer and the inner wall of the first non-through hole to form a second metal layer on the first insulating layer. a plating step of forming a first connection via connecting between the second metal layer and the first metal layer;
    a pattern plating step of performing pattern plating after forming a resist pattern on the second metal layer;
    a first wiring conductor forming step of removing the resist pattern and further removing the exposed second metal layer by etching to form a first wiring conductor;
    A method for manufacturing a wiring board with a support.
  6.  コア樹脂層と、前記コア樹脂層の少なくとも一方の面側に設けられ且つ剥離手段を備えた第1の金属層と、を有する支持体を準備する支持体準備工程と、
     前記第1の金属層の上に、第1の絶縁層と、第1の金属箔と、をこの順で配置し、加熱及び加圧して積層する第1の積層体形成工程と、
     前記第1の金属箔の表面からレーザーを照射して前記第1の金属箔及び前記第1の絶縁層を穴開けし、前記第1の金属層に到達する第1の非貫通孔を形成する非貫通孔形成工程と、
     前記第1の非貫通孔の内壁に対して無電解めっき及び電解めっきの少なくとも一方を施して、前記第1の金属箔と前記第1の金属層との層間を接続する第1の接続ビアを形成するめっき工程と、
     前記第1の金属箔をパターニングして第1の配線導体を形成する第1の配線導体形成工程と、
     を含む支持体付き配線基板の製造方法。
    a support preparation step of preparing a support having a core resin layer and a first metal layer provided on at least one side of the core resin layer and provided with a peeling means;
    a first laminate forming step of placing a first insulating layer and a first metal foil in this order on the first metal layer and laminating them by heating and pressurizing;
    A laser is irradiated from the surface of the first metal foil to perforate the first metal foil and the first insulating layer to form a first non-through hole reaching the first metal layer. a non-through hole forming step;
    At least one of electroless plating and electrolytic plating is applied to the inner wall of the first non-through hole to form a first connection via connecting between the first metal foil and the first metal layer. a plating process to form;
    a first wiring conductor forming step of patterning the first metal foil to form a first wiring conductor;
    A method for manufacturing a wiring board with a support.
  7.  前記第1の金属層における前記第1の絶縁層の側の端面から前記剥離手段までの厚みを6μm以上とする、請求項5又は請求項6記載の支持体付き配線基板の製造方法。 The method for manufacturing a wiring board with a support according to claim 5 or 6, wherein the thickness from the end face of the first metal layer on the first insulating layer side to the peeling means is 6 µm or more.
  8.  請求項5又は請求項6記載の支持体付き配線基板の製造方法の各工程と、
     前記第1の配線導体形成工程の後、第1の絶縁層及び第1の配線導体の上に、第2の絶縁層を形成する第2の絶縁層形成工程と、
     前記第2の絶縁層に前記第1の配線導体に達する第2の非貫通孔を形成し、前記第2の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第2の配線導体を形成する第2の配線導体形成工程と、
     前記第1の配線導体及び前記第2の配線導体を形成した配線基板から、前記コア樹脂層を分離除去するコア樹脂層分離除去工程と、
     前記コア樹脂層分離除去工程の後、前記第1の金属層を除去する第1の金属層除去工程と、
     前記第1の金属層除去工程の後、前記配線基板に半導体素子を実装する実装工程と、
     を含む電子部品実装基板の製造方法。
    each step of the method for manufacturing a wiring board with a support according to claim 5 or claim 6;
    After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor;
    A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed. , a second wiring conductor forming step of forming a second wiring conductor;
    a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board on which the first wiring conductor and the second wiring conductor are formed;
    a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
    a mounting step of mounting a semiconductor element on the wiring board after the first metal layer removing step;
    A method of manufacturing an electronic component mounting board including
  9.  前記第1の金属層除去工程の後、前記第1の接続ビアの上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項8記載の電子部品実装基板の製造方法。 9. The method for manufacturing an electronic component mounting board according to claim 8, further comprising a plating finishing step of forming a protective plating layer on said first connection via after said first metal layer removing step.
  10.  前記第2の配線導体形成工程と前記コア樹脂層分離除去工程との間に、前記第2の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、請求項8記載の電子部品実装基板の製造方法。 Between the second wiring conductor forming step and the core resin layer separating and removing step, a solder resist layer forming step of forming a solder resist layer so that the second wiring conductor is partially exposed. 9. The method of manufacturing an electronic component mounting board according to claim 8.
  11.  前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第2の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項10記載の電子部品実装基板の製造方法。 11. The method of manufacturing an electronic component mounting board according to claim 10, further comprising a plating finishing step of forming a protective plating layer on said second wiring conductor between said solder resist layer forming step and said mounting step.
  12.  前記第2の配線導体形成工程と前記コア樹脂層分離除去工程との間に、第(m+1)の絶縁層及び第(m+1)の配線導体の上に、第(m+2)の絶縁層を形成する第(m+2)の絶縁層形成工程、及び、前記第(m+2)の絶縁層に前記第(m+1)の配線導体に達する第(m+2)の非貫通孔を形成し、前記第(m+2)の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第(m+2)の配線導体を形成する第(m+2)の配線導体形成工程を、この順にn回繰り返し行い、ビルドアップ構造を形成するビルドアップ工程(m及びnは1以上の整数、但し、m≦n)を更に含む、請求項8記載の電子部品実装基板の製造方法。 Between the second wiring conductor forming step and the core resin layer separating and removing step, an (m+2)th insulating layer is formed on the (m+1)th insulating layer and the (m+1)th wiring conductor. forming an (m+2)-th insulating layer forming step, and forming an (m+2)-th non-through hole reaching the (m+1)-th wiring conductor in the (m+2)-th insulating layer; The (m+2)-th wiring conductor forming step of forming the (m+2)-th wiring conductor by applying at least one of electrolytic plating and electroless plating to the surface in which the through holes are formed is repeated in this order n times, and the build 9. The method for manufacturing an electronic component mounting board according to claim 8, further comprising a build-up step (m and n are integers equal to or greater than 1, provided that m≤n) for forming a build-up structure.
  13.  前記ビルドアップ工程と前記コア樹脂層分離除去工程との間に、前記第(m+2)の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、請求項12記載の電子部品実装基板の製造方法。 3. The method further comprising, between the build-up step and the core resin layer separating and removing step, a solder-resist layer forming step of forming a solder-resist layer so that the (m+2)-th wiring conductor is partially exposed. 13. The method for manufacturing an electronic component mounting board according to 12 above.
  14.  前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第(m+2)の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項13記載の電子部品実装基板の製造方法。 14. The manufacturing of an electronic component mounting board according to claim 13, further comprising a plating finishing step of forming a protective plating layer on the (m+2)th wiring conductor between the solder resist layer forming step and the mounting step. Method.
  15.  請求項5又は請求項6記載の支持体付き配線基板の製造方法の各工程と、
     前記第1の配線導体形成工程の後、第1の絶縁層及び第1の配線導体の上に、第2の絶縁層を形成する第2の絶縁層形成工程と、
     前記第2の絶縁層に前記第1の配線導体に達する第2の非貫通孔を形成し、前記第2の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第2の配線導体を形成する第2の配線導体形成工程と、
     前記第1の配線導体及び前記第2の配線導体を形成した配線基板に、半導体素子を実装する実装工程と、
     前記実装工程の後、前記配線基板から前記コア樹脂層を分離除去するコア樹脂層分離除去工程と、
     前記コア樹脂層分離除去工程の後、前記第1の金属層を除去する第1の金属層除去工程と、
     を含む電子部品実装基板の製造方法。
    each step of the method for manufacturing a wiring board with a support according to claim 5 or claim 6;
    After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor;
    A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed. , a second wiring conductor forming step of forming a second wiring conductor;
    a mounting step of mounting a semiconductor element on a wiring board on which the first wiring conductor and the second wiring conductor are formed;
    a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board after the mounting step;
    a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
    A method of manufacturing an electronic component mounting board including
  16.  前記第1の金属層除去工程の後、前記第1の接続ビアの上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項15記載の電子部品実装基板の製造方法。 16. The method for manufacturing an electronic component mounting board according to claim 15, further comprising a plating finishing step of forming a protective plating layer on said first connection via after said first metal layer removing step.
  17.  前記第2の配線導体形成工程と前記実装工程との間に、前記第2の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、請求項15記載の電子部品実装基板の製造方法。 16. The method according to claim 15, further comprising, between said second wiring conductor forming step and said mounting step, a solder resist layer forming step of forming a solder resist layer such that said second wiring conductor is partially exposed. A method for manufacturing an electronic component mounting board.
  18.  前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第2の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項17記載の電子部品実装基板の製造方法。 18. The method of manufacturing an electronic component mounting board according to claim 17, further comprising a plating finishing step of forming a protective plating layer on said second wiring conductor between said solder resist layer forming step and said mounting step.
  19.  前記第2の配線導体形成工程と前記実装工程との間に、第(m+1)の絶縁層及び第(m+1)の配線導体の上に、第(m+2)の絶縁層を形成する第(m+2)の絶縁層形成工程、及び、前記第(m+2)の絶縁層に前記第(m+1)の配線導体に達する第(m+2)の非貫通孔を形成し、前記第(m+2)の非貫通孔が形成された表面に電解めっき及び無電解めっきの少なくとも一方を施して、第(m+2)の配線導体を形成する第(m+2)の配線導体形成工程を、この順にn回繰り返し行い、ビルドアップ構造を形成するビルドアップ工程(m及びnは1以上の整数、但し、m≦n)を更に含む、請求項15記載の電子部品実装基板の製造方法。 forming an (m+2)th insulating layer on the (m+1)th insulating layer and the (m+1)th wiring conductor between the second wiring conductor forming step and the mounting step; and forming an (m+2)-th non-through hole reaching the (m+1)-th wiring conductor in the (m+2)-th insulating layer, and forming the (m+2)-th non-through hole At least one of electrolytic plating and electroless plating is applied to the coated surface to form the (m+2)th wiring conductor, and the (m+2)th wiring conductor forming step is repeated in this order n times to form a buildup structure. 16. The method of manufacturing an electronic component mounting board according to claim 15, further comprising a build-up step (m and n are integers equal to or greater than 1, where m≤n).
  20.  前記ビルドアップ工程と前記実装工程との間に、前記第(m+2)の配線導体が部分的に露出するようにソルダーレジスト層を形成するソルダーレジスト層形成工程を更に含む、請求項19記載の電子部品実装基板の製造方法。 20. The electronic device according to claim 19, further comprising, between said build-up step and said mounting step, a solder-resist layer forming step of forming a solder-resist layer such that said (m+2)th wiring conductor is partially exposed. A method of manufacturing a component mounting board.
  21.  前記ソルダーレジスト層形成工程と前記実装工程との間に、前記第(m+2)の配線導体の上に保護めっき層を形成するめっき仕上げ工程を更に含む、請求項20記載の電子部品実装基板の製造方法。 21. The manufacturing of an electronic component mounting board according to claim 20, further comprising a plating finishing step of forming a protective plating layer on the (m+2)th wiring conductor between the solder resist layer forming step and the mounting step. Method.
PCT/JP2022/044419 2021-12-06 2022-12-01 Wiring board with support, method for manufacturing wiring board with support, and method for manufacturing electronic component mounting board WO2023106208A1 (en)

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