WO2023106208A1 - Carte de câblage avec support, procédé de fabrication de carte de câblage avec support, et procédé de fabrication de carte de montage de composant électronique - Google Patents

Carte de câblage avec support, procédé de fabrication de carte de câblage avec support, et procédé de fabrication de carte de montage de composant électronique Download PDF

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Publication number
WO2023106208A1
WO2023106208A1 PCT/JP2022/044419 JP2022044419W WO2023106208A1 WO 2023106208 A1 WO2023106208 A1 WO 2023106208A1 JP 2022044419 W JP2022044419 W JP 2022044419W WO 2023106208 A1 WO2023106208 A1 WO 2023106208A1
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WIPO (PCT)
Prior art keywords
layer
wiring conductor
forming
insulating layer
wiring
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PCT/JP2022/044419
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English (en)
Japanese (ja)
Inventor
慎也 喜多村
晃樹 小松
和晃 川下
隼斗 中川
豪志 信國
Original Assignee
Ｍｇｃエレクトロテクノ株式会社
米沢ダイヤエレクトロニクス株式会社
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Publication of WO2023106208A1 publication Critical patent/WO2023106208A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to a wiring board with a support, a method for manufacturing the same, and a method for manufacturing an electronic component mounting board using the same.
  • the present invention has been made based on such problems, and provides a wiring board with a support capable of suppressing breakage during separation and removal of the support, a method for manufacturing the same, and electronic component mounting using the same. It aims at providing the manufacturing method of a board
  • a wiring board with a support comprising a support provided with a first metal layer having a peeling means on at least one surface side of a core resin layer, and a wiring board provided on the first metal layer.
  • the wiring board has a first insulating layer provided on and in contact with the first metal layer, and a first wiring conductor provided on and in contact with the first insulating layer, The first insulating layer is provided with a first non-through hole extending from the first wiring conductor to the first metal layer corresponding to the terminal position of the wiring board,
  • a wiring substrate with support wherein a first connection via connected to the first wiring conductor is formed on an inner wall of the first non-through hole.
  • a plating step of forming a first connection via connecting between the second metal layer and the first metal layer a pattern plating step of performing pattern plating after forming a resist pattern on the second metal layer; a first wiring conductor forming step of removing the resist pattern and further removing the exposed second metal layer by etching to form a first wiring conductor;
  • a method for manufacturing a wiring board with a support a plating step of forming a first connection via connecting between the second metal layer and the first metal layer.
  • a method for manufacturing a wiring board with a support [7] The method for manufacturing a wiring board with support according to [5] or [6], wherein the thickness of the first metal layer from the end face of the first insulating layer side to the peeling means is 6 ⁇ m or more.
  • each step of the method for manufacturing a wiring board with a support according to [5] or [6] After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor; A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed.
  • a second wiring conductor forming step of forming a second wiring conductor a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board on which the first wiring conductor and the second wiring conductor are formed; a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step; a mounting step of mounting a semiconductor element on the wiring board after the first metal layer removing step;
  • a method of manufacturing an electronic component mounting board including [9] The method for manufacturing an electronic component mounting board according to [8], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
  • a solder resist layer forming step of forming a solder resist layer so that the second wiring conductor is partially exposed.
  • an (m+2)th insulating layer is formed on the (m+1)th insulating layer and the (m+1)th wiring conductor.
  • the (m+2)-th wiring conductor forming step of forming the (m+2)-th wiring conductor by applying at least one of electrolytic plating and electroless plating to the surface in which the through holes are formed is repeated in this order n times, and the build
  • each step of the method for manufacturing a wiring board with a support according to [5] or [6] After the first wiring conductor forming step, a second insulating layer forming step of forming a second insulating layer on the first insulating layer and the first wiring conductor; A second non-through hole reaching the first wiring conductor is formed in the second insulating layer, and at least one of electrolytic plating and electroless plating is applied to the surface in which the second non-through hole is formed.
  • a second wiring conductor forming step of forming a second wiring conductor a mounting step of mounting a semiconductor element on a wiring board on which the first wiring conductor and the second wiring conductor are formed; a core resin layer separating and removing step of separating and removing the core resin layer from the wiring board after the mounting step; a first metal layer removing step of removing the first metal layer after the core resin layer separating and removing step;
  • a method of manufacturing an electronic component mounting board including [16] The method for manufacturing an electronic component mounting board according to [15], further comprising a plating finishing step of forming a protective plating layer on the first connection via after the first metal layer removing step.
  • the first insulating layer in which the first non-through holes are formed corresponding to the terminal positions is provided on and in contact with the first metal layer, and Since the first wiring conductor is provided in contact with the substrate, the wiring substrate can be reinforced by the first insulating layer, and damage to the wiring substrate can be suppressed when the support is separated and removed. .
  • the first insulating layer since the first insulating layer has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
  • the wiring board is reinforced and damaged when the core resin layer is separated and removed by the peeling means. can be further suppressed.
  • FIG. 1 is a diagram showing the configuration of a wiring board with a support according to an embodiment of the present invention; FIG. 1. It is a figure showing each process of the 1st manufacturing method of the wiring board with a support body shown in FIG. It is a figure showing each process following FIG. 1. It is a figure showing each process of the 2nd manufacturing method of the wiring board with a support body shown in FIG. 1. It is a figure showing each process of the 1st manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG. 1. It is a figure showing each process of the 2nd manufacturing method of an electronic component mounting board using the wiring board with a support body shown in FIG.
  • FIG. 1 shows the configuration of a wiring board 1 with a support according to one embodiment of the present invention.
  • This wiring board 1 with a support includes a support 10 provided with a first metal layer 12 having peeling means on at least one surface of a core resin layer 11, and a and a wiring board 20 .
  • the wiring board 1 with support is obtained by providing the wiring board 20 on the support 10 .
  • the wiring board 1 with a support is also called a printed wiring board with a support or a package board with a support, and has a printed wiring board or a package board for mounting a semiconductor element as the wiring board 20 .
  • a printed wiring board or a package board for mounting a semiconductor element constitutes an electronic component mounting board by mounting an electronic component element such as a semiconductor element, for example.
  • the wiring board 20 is not limited to one on which semiconductor elements are mounted, and may be one on which surface-mounted electronic components such as LED (Light Emitting Diode) elements, capacitors, resistors, coils, and the like are mounted.
  • LED Light Emitting Diode
  • the supporting body 10 is for increasing the rigidity of the wiring board 20, suppressing warpage, and improving handleability in the manufacturing process of the wiring board 20 or the mounting process of the semiconductor element.
  • the support 10 has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means. Note that FIG. 1 shows the case where the first metal layer 12 is provided on one side of the core resin layer 11 . Although not shown, the first metal layer 12 may be provided on both sides of the core resin layer 11 .
  • the core resin layer 11 is not particularly limited. It can be composed of a material or the like.
  • the thickness of the core resin layer 11 is appropriately set as desired, and is not particularly limited, but is preferably 1 ⁇ m or more, for example. This is because if the thickness of the core resin layer 11 is less than 1 ⁇ m, the wiring substrate 20 may be defectively molded.
  • Prepreg is made by impregnating or coating a base material with an insulating material such as a resin composition.
  • the substrate is not particularly limited, and known substrates can be used as appropriate.
  • Materials constituting the substrate include, for example, inorganic fibers such as E-glass, D-glass, S-glass, and Q-glass; organic fibers such as polyimide, polyester, or tetrafluoroethylene; and mixtures thereof.
  • the substrate is not particularly limited, and for example, those having a shape such as woven fabric, nonwoven fabric, roving, chopped strand mat, surfacing mat and the like can be used as appropriate.
  • the material and shape of the base material are selected according to the intended use and performance of the molded article, and if necessary, it is possible to use one or more kinds of materials and shapes.
  • the thickness of the base material is not particularly limited as long as the thickness of the core resin layer 11 is within the range described above.
  • the base material one surface-treated with a silane coupling agent or the like or one subjected to mechanical fiber opening treatment can be used, and these base materials are suitable in terms of heat resistance, moisture resistance, and workability. is.
  • the insulating material is not particularly limited, and a known resin composition used as an insulating material for printed wiring boards or package substrates for mounting semiconductor elements can be appropriately selected and used.
  • a thermosetting resin having good heat resistance and chemical resistance can be used as a base.
  • the thermosetting resin is not particularly limited, and examples thereof include polyimide resins, phenol resins, epoxy resins, cyanate resins, maleimide resins, modified polyphenylene ethers, bismaleimide triazine resins, isocyanate resins, benzocyclobutene resins and vinyl resins. be done. These thermosetting resins may be used singly or in combination of two or more.
  • the polyimide resin is not particularly limited, and commercially available products can be appropriately selected and used.
  • a solvent-soluble polyimide resin synthesized by the production method described in JP-A-2005-15629 or a block-copolymerized polyimide resin can be used.
  • block copolymer polyimide resins include block copolymer polyimide resins described in International Publication WO2010-073952.
  • the block copolymerized polyimide resin comprises structure A in which an imide oligomer comprising a second structural unit is bound to the end of an imide oligomer comprising a first structural unit, and a second structural unit.
  • Block copolymerized polyimide resin having a structure in which Structure B, in which an imide oligomer composed of a first structural unit is bonded to the end of the imide oligomer, is alternately repeated. Note that the second structural unit is different from the first structural unit.
  • These block copolymer polyimide resins are produced by reacting a tetracarboxylic dianhydride and a diamine in a polar solvent to form an imide oligomer, and then further tetracarboxylic dianhydride and another diamine or another tetracarboxylic acid. It can be synthesized by a sequential polymerization reaction in which an acid dianhydride and a diamine are added and imidized.
  • One type of these polyimide resins may be used alone, or two or more types may be mixed and used.
  • the phenolic resin is not particularly limited, and one or more in one molecule (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, more preferably 2 or 3, still more preferably 2 ), generally known compounds or resins having a phenolic hydroxy group can be used.
  • bisphenol A type phenol resin bisphenol E type phenol resin, bisphenol F type phenol resin, bisphenol S type phenol resin, phenol novolak resin, bisphenol A novolac type phenol resin, glycidyl ester type phenol resin, aralkyl novolac type phenol resin, biphenyl Aralkyl-type phenolic resins, cresol novolac-type phenolic resins, polyfunctional phenolic resins, naphthol resins, naphthol novolak resins, polyfunctional naphthol resins, anthracene-type phenolic resins, naphthalene skeleton-modified novolac-type phenolic resins, phenol aralkyl-type phenolic resins, naphthol aralkyl-type phenolic resins Phenol resins, dicyclopentadiene type phenol resins, biphenyl type phenol resins, alicyclic phenol resins, polyol type phenol resin
  • thermosetting resins epoxy resins are excellent in heat resistance, chemical resistance, and electrical properties, and are relatively inexpensive, so they can be suitably used as insulating materials.
  • the epoxy resin one or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) epoxy groups per molecule.
  • cresol novolak type epoxy resin bisphenol A novolac type epoxy resin
  • diglycidyl ether of biphenol diglycidyl ether of naphthalenediol
  • diglycidyl ether of phenols diglycidyl ether of alcohols
  • Alkyl-substituted products, halides, and hydrogenated products thereof are included.
  • One type of these epoxy resins may be used alone, or two or more types may be mixed and used.
  • the curing agent used with this epoxy resin can be used without limitation as long as it cures the epoxy resin. Phosphorus compounds and halides thereof may be mentioned.
  • These epoxy resin curing agents may be used singly or in combination of two or more.
  • a cyanate resin is a resin that, when heated, produces a cured product with repeating units of triazine rings, and the cured product has excellent dielectric properties. For this reason, it is suitable especially when high-frequency characteristics are required.
  • the cyanate resin one or more (preferably 2 to 12, more preferably 2 to 6, more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) cyanato groups per molecule ( It is not particularly limited as long as it is a compound or resin having an aromatic moiety substituted with a cyanate ester group) in the molecule, but examples include 2,2-bis(4-cyanatophenyl)propane, bis(4-cyanato phenyl)ethane, 2,2-bis(3,5dimethyl-4-cyanatophenyl)methane, 2,2-(4-cyanatophenyl)-1,1,1,3,3,3-hexafluoropropane , ⁇ , ⁇ '-bis(4-cyanatophenyl)-m-di
  • cyanate resins such as cyanate ester compounds may be used singly or in combination of two or more. A part of the cyanate ester compound may be previously oligomerized into a trimer or a pentamer.
  • a curing catalyst or curing accelerator can be used in combination with the cyanate resin.
  • the curing catalyst for example, metals such as manganese, iron, cobalt, nickel, copper and zinc can be used.
  • organic metal salts such as 2-ethylhexanoate and octylate, and acetylacetone Mention may be made of organometallic complexes such as complexes.
  • Curing catalysts may be used singly or in combination of two or more.
  • Phenols are preferably used as the curing accelerator, and monofunctional phenols such as nonylphenol and paracumylphenol; bifunctional phenols such as bisphenol A, bisphenol F and bisphenol S; or phenol novolak and cresol novolak. can be used.
  • a hardening accelerator may be used individually by 1 type, and may be used in mixture of 2 or more types.
  • the maleimide resin has 1 or more (preferably 2 to 12, more preferably 2 to 6, still more preferably 2 to 4, still more preferably 2 or 3, still more preferably 2) maleimide groups in one molecule.
  • a generally known compound or resin can be used as long as it has a compound or resin.
  • Modified polyphenylene ether is useful from the viewpoint that it can improve the dielectric properties of the cured product.
  • Modified polyphenylene ethers include, for example, poly(2,6-dimethyl-1,4-phenylene) ether, an alloyed polymer of poly(2,6-dimethyl-1,4-phenylene) ether and polystyrene, poly(2 ,6-dimethyl-1,4-phenylene)ether and styrene-butadiene copolymer, alloyed polymer of poly(2,6-dimethyl-1,4-phenylene)ether and styrene-maleic anhydride copolymer, poly Alloyed polymers of (3,6-dimethyl-1,4-phenylene) ether and polyamides, alloyed polymers of poly(2,6-dimethyl-1,4-phenylene) ethers and styrene-butadiene-acrylonitrile copolymers, oligophenylene
  • the isocyanate resin is not particularly limited, and includes, for example, an isocyanate resin obtained by a dehydrohalogenation reaction between a phenol and a cyanogen halide.
  • isocyanate resins include 4,4'-diphenylmethane diisocyanate MDI, polymethylene polyphenyl polyisocyanate, tolylene diisocyanate, and hexamethylene diisocyanate.
  • One type of these isocyanate resins may be used alone, or two or more types may be mixed and used.
  • the benzocyclobutene resin is not particularly limited as long as it contains a cyclobutene skeleton, but for example, divinylsiloxane-bisbenzocyclobutene (manufactured by Dow Chemical Co.) can be used.
  • divinylsiloxane-bisbenzocyclobutene manufactured by Dow Chemical Co.
  • One type of these benzocyclobutene resins may be used alone, or two or more types may be mixed and used.
  • the vinyl resin is not particularly limited as long as it is a polymer or copolymer of vinyl monomers.
  • Vinyl monomers are not particularly limited, and examples include (meth)acrylic acid ester derivatives, vinyl ester derivatives, maleic acid diester derivatives, (meth)acrylamide derivatives, styrene derivatives, vinyl ether derivatives, vinyl ketone derivatives, olefin derivatives, maleimide derivatives, (Meth)acrylonitrile may be mentioned. These vinyl resins may be used singly or in combination of two or more.
  • the resin composition used as the insulating material can also be blended with a thermoplastic resin in consideration of dielectric properties, impact resistance, film processability, and the like.
  • the thermoplastic resin is not particularly limited, and examples thereof include fluororesin, polycarbonate, polyetherimide, polyetheretherketone, polyacrylate, polyamide, polyamideimide, and polybutadiene.
  • One type of thermoplastic resin may be used alone, or two or more types may be mixed and used.
  • the fluororesin is not particularly limited, and examples thereof include polytetrafluoroethylene, polychlorotrifluoroethylene, polyvinylidene fluoride, and polyvinyl fluoride.
  • One type of these fluororesins may be used alone, or two or more types may be mixed and used.
  • polyamide-imide resins are useful from the viewpoint of excellent moisture resistance and good adhesion to metals.
  • the raw material for the polyamideimide resin is not particularly limited, but examples of the acidic component include trimellitic anhydride and trimellitic anhydride monochloride, and examples of the amine component include metaphenylenediamine, paraphenylenediamine, 4 ,4'-diaminodiphenyl ether, 4,4'-diaminodiphenylmethane, bis[4-(aminophenoxy)phenyl]sulfone, 2,2'-bis[4-(4-aminophenoxy)phenyl]propane and the like.
  • the polyamide-imide resin may be modified with siloxane to improve drying properties, and in this case, siloxane diamine can be used as the amino component. Considering film processability, it is preferable to use a polyamide-imide resin having a molecular weight of 50,000 or more.
  • thermoplastic resins have been described as insulating materials mainly used for prepregs, these thermoplastic resins are not limited to use as prepregs.
  • the core resin layer 11 may be formed by processing a film (film material) using the thermoplastic resin described above.
  • a filler may be mixed in the resin composition used as the insulating material.
  • fillers include, but are not limited to, alumina, white carbon, titanium white, titanium oxide, zinc oxide, magnesium oxide, metal oxides (including hydrates) such as zirconium oxide, aluminum hydroxide, boehmite, Metal hydroxides such as magnesium hydroxide, silicas such as natural silica, fused silica, synthetic silica, amorphous silica, aerosil, and hollow silica, inorganic materials such as clay, kaolin, talc, mica, glass powder, quartz powder, and Shirasu balloons
  • organic fillers organic fillers
  • organic fillers organic fillers
  • These fillers may be used singly or in combination of two or more.
  • the resin composition used as an insulating material may contain an organic solvent.
  • the organic solvent is not particularly limited, and aromatic hydrocarbon solvents such as benzene, toluene, xylene and trimethylbenzene; ketone solvents such as acetone, methyl ethyl ketone and methylinobutyl ketone; and tetrahydrofuran.
  • Ether solvents aromatic hydrocarbon solvents such as benzene, toluene, xylene and trimethylbenzene
  • ketone solvents such as acetone, methyl ethyl ketone and methylinobutyl ketone
  • tetrahydrofuran Ether solvents
  • alcohol solvents such as isopropanol and butanol
  • ether alcohol solvents such as 2-methoxyethanol and 2-butoxyethanol
  • N-methylpyrrolidone N,N-dimethylformamide and N,N-dimethylacetamide
  • the amount of the solvent in the varnish when producing the prepreg is preferably in the range of 40% by mass to 80% by mass with respect to the entire resin composition. Further, the viscosity of the varnish is desirably in the range of 20 cP to 100 cP (20 mPa ⁇ s to 100 mPa ⁇ s).
  • the resin composition used as an insulating material may contain a flame retardant.
  • flame retardants include, but are not limited to, bromine compounds such as decabromodiphenyl ether, tetrabromobisphenol A, tetrabromophthalic anhydride, and tribromophenol, triphenyl phosphate, trixylyl phosphate, and clay.
  • Known and customary flame retardants such as phosphorus compounds such as dildiphenyl phosphate, red phosphorus and modified products thereof, antimony compounds such as antimony trioxide and antimony pentoxide, triazine compounds such as melamine, cyanuric acid and melamine cyanurate can be used. can.
  • additives such as the above-mentioned curing agent, curing accelerator, thermoplastic particles, coloring agents, ultraviolet opaque agents, antioxidants, reducing agents, etc. Additives and fillers can be added.
  • the prepreg is, for example, a resin composition (varnish is added so that the amount of the resin composition attached to the base material described above is 20% by mass or more and 90% by mass or less in terms of resin content in the prepreg after drying. ) is impregnated or coated on the substrate, and then dried by heating at a temperature of 100° C. or higher and 200° C. or lower for 1 minute to 30 minutes to obtain a prepreg in a semi-cured state (B stage state).
  • GHPL-830NS product name
  • GHPL-830NSF product name
  • the insulating film material can be composed of, for example, the resin composition of the insulating material described in the prepreg, and can be obtained by processing these resin compositions into a film.
  • the first metal layer 12 can be composed of, for example, a metal foil with a carrier.
  • the metal foil with a carrier is, for example, laminated with a metal foil on a carrier via a release layer, which is a release means.
  • a commercial product can also be used for the metal foil with a carrier, for example, MT18SD-HT5 (product name) manufactured by Mitsui Mining & Smelting Co., Ltd. can be used.
  • the thickness of the first metal layer 12 is appropriately set as desired, and is not particularly limited.
  • the carrier can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of uniformity of thickness and corrosion resistance of the foil.
  • the thickness of the carrier is thicker than the thickness of the metal foil, and can be, for example, 3 ⁇ m or more and 100 ⁇ m or less, preferably 5 ⁇ m or more and 50 ⁇ m or less, and more preferably 6 ⁇ m or more and 30 ⁇ m or less.
  • the release layer is for allowing the carrier and the metal foil to be easily separated.
  • Materials for the release layer are not particularly limited, and various well-known materials can be used as appropriate.
  • organic materials include nitrogen-containing organic compounds, sulfur-containing organic compounds, and carboxylic acids.
  • nitrogen-containing organic compound include triazole compounds, imidazole compounds, etc. Among them, triazole compounds are preferable because they tend to have stable peelability.
  • triazole compounds include 1,2,3-benzotriazole, carboxybenzotriazole, N',N'-bis(benzotriazolylmethyl)urea, 1H-1,2,4-triazole and 3-amino- 1H-1,2,4-triazole and the like.
  • Examples of sulfur-containing organic compounds include mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol, and the like.
  • Examples of carboxylic acids include monocarboxylic acids, dicarboxylic acids, and the like.
  • Inorganic materials include metals or alloys of at least one of Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn, and oxides thereof.
  • the thickness of the release layer can be, for example, 1 nm or more and 1 ⁇ m or less, preferably 5 nm or more and 500 nm or less.
  • the metal foil can be composed of, for example, various metal foils, but is preferably composed of copper foil in terms of thickness uniformity and corrosion resistance of the foil.
  • the thickness of the metal foil is not particularly limited because it is appropriately set as desired.
  • the first metal layer 12 may be provided with the carrier on the core resin layer 11 side, or may be provided with the metal foil on the core resin layer 11 side.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means is preferably 6 ⁇ m or more. , is more preferably 10 ⁇ m or more, and more preferably 15 ⁇ m or more. This is because the wiring board 20 can be reinforced and damaged when at least the core resin layer 11 is separated and removed in the core resin layer separation and removal step described later.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means is preferably 70 ⁇ m or less. It is more preferably 50 ⁇ m or less, and even more preferably 30 ⁇ m or less. This is because it takes time to remove the remaining first metal layer 12 in the step of removing the first metal layer, which will be described later.
  • the first metal layer 12 can also be composed of a metal foil having a peeling layer as a peeling means.
  • the release layer is laminated so as to face the core resin layer 11 side.
  • the release layer include a layer containing at least a silicon compound.
  • the release layer can be formed by applying a silicon compound composed of a single silane compound or a combination of multiple silane compounds onto a metal foil.
  • the means for applying the silicon compound is not particularly limited, and for example, known means such as coating can be used.
  • An antirust treatment can be applied to the surface of the metal foil to be adhered to the release layer (to form an antirust treatment layer).
  • Rust prevention treatment can be performed using any one of nickel, tin, zinc, chromium, molybdenum, cobalt, or alloys thereof.
  • the thickness of the release layer is not particularly limited, but is preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 80 nm or less, and particularly preferably 20 nm or more and 60 nm or less, from the viewpoint of removability and peelability.
  • the metal foil a copper foil is preferable from the viewpoint of uniformity of thickness and corrosion resistance of the foil.
  • the thickness of the first metal layer 12 from the wiring board 20 side end face to the peeling means for example, the thickness from the later-described first insulating layer 21 side end face to the peeling means is as described above. It is preferable to
  • the support 10 can be produced, for example, by stacking the core resin layer 11 and the first metal layer 12 and bonding them under heat and pressure.
  • the thickness of the support 10 can be, for example, 20 ⁇ m or more and 1000 ⁇ m or less, preferably 20 ⁇ m or more and 950 ⁇ m or less, and more preferably 20 ⁇ m or more and 900 ⁇ m or less.
  • the wiring board 20 has a first insulating layer 21 provided on and in contact with the first metal layer 12 and a first wiring conductor 22 provided on and in contact with the first insulating layer 21 . are doing.
  • the first insulating layer is provided with first non-through holes 21 ⁇ /b>A extending from the first wiring conductors 22 to the first metal layer 12 corresponding to the terminal positions of the wiring board 20 .
  • the terminal positions of the wiring board 20 are, for example, positions of external connection terminals when the wiring board 20 is mounted on an electronic device by soldering or the like.
  • a first connection via 21B connected to the first wiring conductor 22 is formed on the inner wall of the first non-through hole 21A.
  • the first connection via 21B is made of metal such as copper, for example.
  • the wiring board 20 includes, for example, a second insulating layer 23 on the first insulating layer 21 and the first wiring conductors 22, and a second wiring provided on the second insulating layer 23. and a conductor 24 .
  • the second insulating layer 23 is provided with, for example, a second non-through hole 23A reaching the first wiring conductor 22 .
  • a second connection via 23B for connecting the first wiring conductor 22 and the second wiring conductor 24 is formed on the inner wall of the second non-through hole 23A.
  • the second connection via 23B is made of metal such as copper, for example.
  • the wiring board 20 includes the (m+2)th insulating layer 25 on the second insulating layer 23 and the second wiring conductor 24 and the (m+2)th insulating layer 25 provided on the (m+2)th insulating layer 25 .
  • m+2) wiring conductors 26 may be stacked n times in this order.
  • m and n are integers of 1 or more, provided that m ⁇ n.
  • the number n of repetitions, that is, the number of layers to be stacked is appropriately set as desired, and is not particularly limited. Note that FIG. 1 shows a case where the number of repetitions n is three.
  • the (m+2)-th insulating layer 25 is provided with, for example, (m+2)-th non-through holes 25A reaching the (m+1)-th wiring conductors 22 and 25 .
  • An (m+2)th connection via 25B for connecting the (m+1)th wiring conductors 22 and 25 and the (m+2)th wiring conductor 26 is formed on the inner wall of the (m+2)th non-through hole 25A.
  • the (m+2)th connection via 25B is made of metal such as copper, for example.
  • the second wiring conductor 24 or the second The solder resist layer 27 may be provided so that the (n+2) wiring conductors 26 are partially exposed.
  • the portion of the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 is a terminal, for example, an internal connection terminal to which a semiconductor element is connected.
  • a protective plating layer 28 made of a gold plating layer or the like may be formed on the second wiring conductor 24 or the (n+2)th wiring conductor 26 exposed from the solder resist layer 27 .
  • the first insulating layer 21 reinforces the wiring substrate 20 to suppress damage when the support 10 is separated, and functions as a solder resist layer after separation.
  • the first insulating layer 21 contains, for example, an insulating resin material, and can be composed of the insulating film material described in the core resin layer 11, prepreg, or the like.
  • the insulating resin material preferably has a glass transition temperature of 150° C. or higher. This is because if the glass transition temperature is lower than 150° C., the wiring substrate 20 may be damaged due to swelling during the processing process.
  • materials with excellent heat resistance such as polyimide resin, epoxy resin, cyanate resin, maleimide resin, modified polyphenylene ether, bismaleimide triazine resin, polyamideimide resin, polyamide
  • a nylon resin which is a resin, and a fluororesin.
  • the first insulating layer 21 may be composed of one layer, or may be composed of two or more layers made of different materials. When it is composed of two or more layers, film materials or prepregs made of different materials may be laminated, or film materials and prepregs may be laminated.
  • the thickness of the first insulating resin layer 21 is appropriately set as desired. is more preferable, and 1 ⁇ m or more and 9 ⁇ m or less is even more preferable. This is for reducing the total thickness of the wiring board 20 .
  • the first wiring conductor 22 is made of metal such as copper, for example.
  • the thickness of the first wiring conductor 22 is appropriately set as desired, and is not particularly limited. is more preferred.
  • the pattern width of the first wiring conductor 22 is not particularly limited, and the width can be appropriately selected according to the application. can do.
  • the second insulating layer 23 and the (m+2)-th insulating layer 25 are not particularly limited, but are made of, for example, the same material as the core resin layer 11 (eg, prepreg or insulating film material). be able to.
  • the thicknesses of the second insulating layer 23 and the (m+2)th insulating layer 25 are appropriately set as desired, and are not particularly limited. 50 ⁇ m or less is preferable, and 5 ⁇ m or more and 20 ⁇ m or less is more preferable.
  • the second wiring conductor 24 and the (m+2)th wiring conductor 26 are made of metal such as copper, for example.
  • the thickness and pattern width of the second wiring conductor 24 and the (m+2)th wiring conductor 26 are not particularly limited because they are appropriately set as desired. can be done.
  • the first manufacturing method of the wiring board 1 with a support includes, for example, a support preparing step, a first laminate forming step, a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, and a first wiring conductor forming step in this order, followed by a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and plating finishing.
  • the steps may be included in this order.
  • FIG. 2(A) it has a core resin layer 11 and a first metal layer 12 provided on at least one side of the core resin layer 11 and provided with peeling means.
  • a support 10 is prepared (support preparing step). Specifically, for example, a metal foil with a carrier or a metal foil having a release layer is placed on at least one side of the core resin layer 11 and heated and pressed to form the support 10 .
  • First laminate forming step> the surface of the first metal layer 12 of the support 10 is subjected to a roughening treatment as an adhesion treatment for obtaining adhesion to the first insulating layer 21 .
  • the roughening treatment is not particularly limited, and known means can be appropriately used, for example, means using a copper surface roughening liquid.
  • the first insulating layer 21 and the first metal foil 41 are formed in this order. Arrange, heat and pressurize to laminate (first laminate forming step).
  • the metal foil with a resin layer with a carrier is formed into a resin layer. (that is, the first insulating layer 21) is placed in contact with the first metal layer 12, and the first insulating layer 21 and the first metal foil 41 are separated by heating and pressurizing and separating the carrier. Laminate.
  • a portion of the first metal foil 41 is removed by etching to form the first non-through holes 21A in the first insulating layer 21.
  • a mask 42 is formed (mask forming step). Specifically, for example, a dry film resist is laminated on the first metal foil 41, exposed and developed to form a resist pattern, scum is removed, and then the first metal foil 41 is etched. Then, a mask 42 is formed and the resist pattern is removed.
  • the exposure and development of the dry film resist, scum removal, etching, and removal of the resist pattern are not particularly limited, and can be carried out using known means and devices.
  • ⁇ Blind hole forming step> Next, for example, as shown in FIG. 2D, the portions of the first insulating layer 21 that are not covered with the mask 42 are removed to form the first non-through holes 21A (non-through holes forming process).
  • the formation of the first non-through holes 21A can be performed, for example, by desmear treatment using an aqueous solution of sodium permanganate or the like, or laser processing using a carbon dioxide laser or the like. In the case of laser processing, after laser processing, desmear treatment is performed as necessary.
  • ⁇ Mask removal process> After forming the first non-through holes 21A, the mask 42 is removed, for example, as shown in FIG. 2(E).
  • the removal of the mask 42 can be performed, for example, by etching using an aqueous solution of ferric chloride.
  • Plating process After removing the mask 42, for example, as shown in FIG. to form a second metal layer 43 on the first insulating layer 21 and form a first connection via 21B connecting between the second metal layer 43 and the first metal layer 12. (plating process).
  • the method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed.
  • Plating is preferably electroless plating, and electrolytic plating may be performed in addition to electroless plating.
  • pattern plating step After forming a resist pattern 44 on the second metal layer 43, pattern plating is performed to form a pattern plating layer 45 (pattern plating step).
  • the resist pattern 44 can be formed, for example, by laminating a dry film resist, printing a circuit pattern on the dry film resist, and developing it. Printing and development are not particularly limited, and can be carried out using known means and devices. Pattern plating can be performed, for example, by pattern electroplating. Pattern electroplating is also not particularly limited, and known methods can be used as appropriate.
  • a first wiring conductor 22 is formed from the pattern plating layer 45 (first wiring conductor forming step).
  • the removal of the resist pattern 44 can be performed using known means and devices.
  • Etching of the second metal layer 43 can be performed, for example, by flash etching.
  • ⁇ Second Insulating Layer Forming Step/Second Wiring Conductor Forming Step> After forming the first wiring conductor 22, for example, as shown in FIG. , and a second wiring conductor 24 is formed thereon. Specifically, first, for example, the surface of the first wiring conductor 22 is subjected to roughening treatment as adhesion treatment for obtaining adhesion to the second insulating layer 23 . Next, for example, on the first insulating layer 21 and the first wiring conductor 22, a metal foil with a resin layer and a carrier is arranged so that the resin layer is in contact with the first wiring conductor 22, and heated and pressurized, By peeling off the carrier, the second insulating layer 23 and the second metal foil are laminated in this order.
  • the metal foil with a carrier with a resin layer is obtained by, for example, laminating a resin layer on the metal foil side of the metal foil with a carrier, the resin layer serving as the second insulating layer 23, and the metal foil serving as the second metal foil. (second insulating layer forming step).
  • a second non-through hole 23A reaching the first wiring conductor 22 is formed in the second metal foil and the second insulating layer 23 by laser processing using a carbon dioxide laser or the like. , desmear treatment using an aqueous solution of sodium permanganate or the like.
  • the second wiring conductor 24 is formed by a known method such as a subtractive method or a semi-additive method.
  • the subtractive method for example, first, at least one of electroless plating and electrolytic plating is applied to the surface on which the second non-through hole 23A is formed, and the first wiring is formed on the inner wall of the second non-through hole 23A.
  • a second connection via 23B connecting the conductor 22 and the second metal foil is formed, the thickness of the second metal foil is increased, and the surface is smoothed as necessary.
  • a dry film resist or the like is laminated, a negative mask is attached, a circuit pattern is printed, and an etching resist is formed by development.
  • the thickened second metal foil is etched using an etching resist as a mask to form the second wiring conductors 24, and the etching resist is removed (second wiring conductor forming step).
  • the second metal foil is completely removed by etching or the like to expose the first insulating layer 22 .
  • electroless plating is performed, for example, to form the second connection vias 23B on the inner walls of the second non-through holes 23A and form an electroless plating layer on the first insulating layer 22 .
  • a resist layer is provided by thermocompression bonding a dry film on the electroless plated layer, exposure and development are performed, a resist pattern is formed, and scum (resist residue) is removed.
  • an electrolytic plated layer is formed on the surface of the electroless copper plated layer by electrolytic plating, and after removing the resist pattern, the exposed electroless plated layer is etched, and electroless A second wiring conductor 24 consisting of a plated layer and an electrolytic plating layer is formed (second wiring conductor forming step).
  • ⁇ Build-up process> After forming the second insulating layer 23 and the second wiring conductor 24, for example, as shown in FIG. The process may be repeated n times to form a buildup structure having (n+2) layers of wiring conductors. Specifically, for example, the (m+2)th insulating layer forming the (m+2)th insulating layer 25 on the (m+1)th insulating layers 23 and 25 and the (m+1)th wiring conductors 24 and 26 Formation step, forming the (m+2)th non-through hole 25A reaching the (m+1)th wiring conductors 24 and 26 in the (m+2)th insulating layer 25, and forming the (m+2)th non-through hole 25A At least one of electrolytic plating and electroless plating is applied to the coated surface to form the (m+2)th wiring conductor 26, and the (m+2)th wiring conductor forming step is performed n times in this order to form a buildup structure. (build-up process). m and n are integers of 1 or more, provided
  • solder Resist Layer Forming Step> After forming the second insulating layer 23 and the second wiring conductor 24, or after forming the (n+2)th insulating layer 25 and the (n+2)th wiring conductor 26, for example, a second The solder-resist layer 27 is formed so that the second wiring conductor 24 or the (n+2)-th wiring conductor 26 is partially exposed (solder-resist layer forming step).
  • a method for forming the solder resist layer 27 is not particularly limited, and known means can be appropriately employed.
  • a protective plating layer 28 is formed, for example, on the second wiring conductor 24 or the (n+2)-th wiring conductor 26 exposed from the solder-resist layer 27 . Thereby, the wiring substrate 1 with the support shown in FIG. 1 is obtained.
  • FIG. 4 shows the steps of the second manufacturing method of the wiring board 1 with support.
  • the second manufacturing method includes, for example, a support preparing step, a first laminate forming step, a non-through hole forming step, a plating step, and a first wiring conductor forming step in this order, and further , a second insulating layer forming step, a second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step in this order.
  • a support preparing process, a first laminate forming process, a second insulating layer forming process, a second wiring conductor forming process, a build-up process, a solder resist layer forming process, and a plating finishing process are the same as the first manufacturing method. Therefore, each step different from the first manufacturing method, that is, the non-through hole forming step, the plating step, and the first wiring conductor forming step will be described.
  • ⁇ Blind hole forming step> After laminating the first insulating layer 21 and the first metal foil 41, for example, as shown in FIG. 4D-2, a laser such as a carbon dioxide laser is irradiated from the surface of the first metal foil 41. Then, the first metal foil 41 and the first insulating layer 21 are perforated to form the first non-through holes 21A reaching the first metal layer 12 (non-through hole forming step). Next, desmear processing is performed as necessary.
  • first non-through holes 21A for example, as shown in FIG.
  • At least one of plating and electrolytic plating is applied to form first connection vias 21B for connecting the first metal layer 12 and the first metal foil 41 to the inner walls of the first non-through holes 21A, and the first connection vias 21B are formed. to increase the thickness of the metal foil 41 (plating step).
  • the surface is leveled as necessary.
  • the method of applying electroless plating or electrolytic plating is not particularly limited, and known methods can be employed.
  • a dry film resist or the like is laminated on the first metal foil 41, a negative mask is pasted thereon, a circuit pattern is printed, and developed. An etching resist is formed.
  • the thickened first metal foil 41 is etched using an etching resist as a mask to form the first wiring conductors 22, and the etching resist is removed (first wiring conductor forming step).
  • the wiring board 1 with a support can be manufactured by the second manufacturing method as well as the first manufacturing method.
  • the wiring board 1 with support can be used for manufacturing an electronic component mounting board.
  • FIG. 5 shows the steps of the first manufacturing method of the electronic component mounting board.
  • a first method for manufacturing an electronic component mounting board includes, for example, a step of manufacturing a wiring board 1 with a support, a core resin layer separating and removing step, a first metal layer removing step, and a mounting step in this order. I'm in.
  • the manufacturing process of the wiring board with support 1 can include each process of the first manufacturing method or the second manufacturing method of the wiring board with support 1 described above, and at least includes the process of preparing the support to the second manufacturing method. At least a wiring conductor forming step is included.
  • the core resin layer 11 is separated and removed from the wiring board 20 (core resin layer separating and removing step). Specifically, for example, the core resin layer 11 is separated and removed from the wiring substrate 20 on which at least the first wiring conductors 22 and the second wiring conductors 24 are formed. Separation and removal of the core resin layer 11 is performed, for example, by peeling with a peeling means (for example, a peeling layer or a peeling layer). Either physical means or chemical means can be employed for peeling, but it is preferable to apply physical force to the peeling means and peel by physical means, for example.
  • a peeling means for example, a peeling layer or a peeling layer
  • the core resin layer 11 and, in some cases, part of the first metal layer 12 are peeled off. At least part of the peeling means of the first metal layer 12 may be peeled together with at least the core resin layer 11, or may remain without being peeled off.
  • first metal layer removing step After separating and removing the core resin layer 11, for example, as shown in FIG. 5B, the remaining first metal layer 12 is removed (first metal layer removing step).
  • the means for removing the first metal layer 12 is not particularly limited, but it can be removed using, for example, a sulfuric acid-based or hydrogen peroxide-based etchant.
  • the sulfuric acid-based or hydrogen peroxide-based etchant is not particularly limited, and those used in the industry can be used.
  • the wiring board 20 can be reinforced by the first insulating layer 21, so that the wiring board 20 is prevented from being damaged when the support 10 is separated and removed. can do.
  • the first insulating layer 21 since the first insulating layer 21 has openings at the terminal positions and covers the rest, it can be used without forming a solder resist layer.
  • a protective plating layer 29 is formed on the first connection via 21B exposed from the first insulating layer 21. .
  • the second wiring conductor 24 or the (n+2)th wiring conductor 24 exposed from the solder-resist layer 27 is formed.
  • the protective plating layer 28 may be formed together with the protective plating layer 29 .
  • the semiconductor element 30 is mounted on the wiring substrate 20 via the solder balls 31 (mounting step).
  • the method of mounting the semiconductor element 30 on the wiring board 20 is not limited to the method using solder balls, and for example, a method of mounting a bare chip by ball bonding of gold wires to aluminum electrodes can be used.
  • FIG. 5 shows the case where one semiconductor element 30 is mounted, a plurality of semiconductor elements 30 may be mounted, and electronic components other than the semiconductor elements 30 may be mounted.
  • FIG. 6 shows the steps of the second manufacturing method of the wiring board 1 with support.
  • the second method for manufacturing an electronic component mounting board includes, for example, a process of manufacturing a wiring board 1 with a support, a mounting process (see FIG. 6A), and a core resin layer separating and removing process (see FIG. 6B). ) and a first metal layer removing step in this order. That is, the second manufacturing method of the electronic component mounting board is the same as the first manufacturing method of the electronic component mounting board except that the semiconductor element 30 is mounted before the support 10 is separated and removed. The contents of each step are as described above.
  • the first insulating layer 21 having the first non-through holes 21A corresponding to the terminal positions is provided on and in contact with the first metal layer 12, and Since the first wiring conductor 22 is provided on and in contact with the first insulating layer 21, the wiring board 20 can be reinforced by the first insulating layer 21, and the support 10 is separated and removed. It is possible to suppress damage to the wiring board 20 over time.
  • the first insulating layer 21 since the first insulating layer 21 has openings at the terminal positions and covers the rest, there is no need to form a solder resist layer, and the process can be simplified.
  • Example 1 After manufacturing the wiring board 1 with the support as follows, the support 10 was separated and removed from the wiring board 20 .
  • ⁇ Support Preparing Step> See FIG. 2(A)
  • a prepreg (thickness: 0.100 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS ST56) that is B-staged by impregnating a glass cloth (glass fiber) with a bismaleimide triazine resin (BT resin) is used as a core resin layer 11.
  • BT resin bismaleimide triazine resin
  • an ultra-thin copper foil with a carrier copper foil having a thickness of 18 ⁇ m as the first metal layer 12 (ultra-thin copper foil; thickness 5 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18SD-H -T5) is placed so that the carrier copper foil side is in contact with the core resin layer 11, and vacuum pressing is performed under the conditions of a temperature of 220 ⁇ 2 ° C., a pressure of 3 ⁇ 0.2 MPa, and a holding time of 60 minutes to form the core resin layer.
  • a support 10 having a first metal layer 12 provided on both sides of 11 was produced.
  • the resin composition was diluted with N-methyl-2-pyrrolidone, and the resulting varnish was coated with a bar coater using an ultrathin copper foil with a carrier copper foil having a thickness of 18 ⁇ m (ultrathin copper foil (metal layer); thickness 3 ⁇ m: Mitsui Metal Mining Co., Ltd., product name: MT18FL) was applied to the matte surface side.
  • the coating film is dried by heating at 180° C. for 10 minutes to form a first insulating layer 21 having a thickness of 2.5 ⁇ m on the ultra-thin metal foil with a carrier. was made.
  • the glass transition temperature of the resin material forming the first insulating layer 21 is 260.degree.
  • the surface of the first metal layer 12 of the support 10 was roughened using a copper surface roughening liquid CZ-8101 (manufactured by MEC Co., Ltd., product name).
  • CZ-8101 manufactured by MEC Co., Ltd., product name.
  • the ultra-thin copper foil with a carrier copper foil with a resin layer was placed so that the resin layer (that is, the first insulating layer 21) was in contact with the first metal layer 12, and the pressure was 3 ⁇ 0.2 MPa. Vacuum pressing was performed under conditions of a temperature of 220 ⁇ 2° C. and a holding time of 60 minutes. Thereafter, the carrier copper foil with a thickness of 18 ⁇ m was peeled off, and the first insulating layer 21 and the first metal foil 41 with a thickness of 3 ⁇ m were laminated on the first metal layer 12 .
  • ⁇ Mask Forming Process> (See FIG. 2(C)) A dry film resist was laminated on the first metal foil 41, exposed and developed to form a resist pattern.
  • RD-1207 manufactured by Hitachi Chemical Co., Ltd. with a thickness of 7 ⁇ m was used as a dry film resist, and an ONC apparatus was used as a laminator.
  • the lamination pressure was 0.4 MPa and the lamination temperature was 110°C.
  • INPREX3650 manufactured by ADTEC Engineering Co., Ltd. was used for exposure.
  • a potassium carbonate aqueous solution was used for development after exposure.
  • An apparatus manufactured by Tokyo Kakoki Co., Ltd. was used at a liquid temperature of 30°C. Descumming was then performed.
  • Scum removal was performed by plasma cleaning using an apparatus of Nordson Advanced Technologies, Inc. Argon, nitrogen, oxygen, and tetrafluoromethane were used as gases. Subsequently, the first metal foil 41 was etched to form a mask 42, and the resist pattern was removed. Etching used hydrochloric acid and cupric chloride aqueous solution. R-100S manufactured by Mitsubishi Gas Chemical Co., Ltd. was used to remove the resist pattern. A spray type apparatus manufactured by Tokyo Kakoki Co., Ltd. was used for the steps from development to etching and peeling.
  • ⁇ Non-through hole forming step> (see FIG. 2(D))
  • desmear treatment is performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C. and a concentration of 55 ⁇ 10 g/L to remove the portion of the first insulating layer 21 not covered with the mask 42 .
  • a first non-through hole 21A reaching the first metal layer 12 was formed.
  • an up-death process manufactured by Uyemura & Co., Ltd. was used for the desmearing process.
  • the swelling liquid used was Updes MDS-37
  • the etching liquid used was a mixture of Updes MDE-40 and ELC-SH
  • the neutralization used Updes MDN-62 The temperature of the etching tank was set at 80° C., and the immersion was performed for 10 minutes.
  • ⁇ Mask removal step> (see FIG. 2(E)) After forming the first non-through holes 21A, the mask 42 was removed by etching with an aqueous solution of ferric chloride to expose the first insulating layer 21 over the entire surface.
  • the surface of the first insulating layer 21 was electroless copper plated to a thickness of 0.4 ⁇ m to 0.8 ⁇ m to form a second metal layer 43 .
  • the chemical solution a mixture of Sulcup PEA manufactured by Uyemura & Co., Ltd. and formaldehyde was used.
  • the chemical solution temperature of the electroless copper plating was 36° C., and the processing time was 10 minutes.
  • the inner walls of the first non-through holes 21A were connected by plating, and the first metal layer 12 and the second metal layer 43 were electrically connected by the first connection vias 21B.
  • ⁇ Pattern Plating Process> (See FIG. 3(G))
  • a dry film resist LDF515F (Nikko Materials Co., Ltd.) having a thickness of 15 ⁇ m is applied to the second metal layer 43 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa. product name) was laminated.
  • the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 .
  • a pattern plating layer 45 was formed by performing pattern electrolytic copper plating of about 5 ⁇ m to 15 ⁇ m on a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L.
  • an ultra-thin copper foil with a carrier copper foil with a resin layer (ultra-thin copper foil (metal layer); thickness 3 ⁇ m, resin layer thickness 0.015 mm;
  • a carrier copper foil thickness of 18 ⁇ m: manufactured by Mitsubishi Gas Chemical Co., Ltd., product name: CRS381NSI) is placed so that the resin layer is in contact with the first wiring conductor 22, and the pressure is 3 ⁇ 0.2 MPa, the temperature is 220 ⁇ 2 ° C., and the temperature is maintained.
  • the second insulating layer 23 and the second metal foil having a thickness of 3 ⁇ m were laminated on the first wiring conductor 22 by vacuum pressing for 60 minutes and peeling off the carrier copper foil.
  • electroless copper plating was applied to a thickness of 0.4 ⁇ m to 0.8 ⁇ m
  • electrolytic copper plating was applied to a thickness of 5 ⁇ m to 20 ⁇ m.
  • a second connection via 23B for connecting the first wiring conductor 22 and the second metal foil is formed on the inner wall of the second non-through hole 23A, and the thickness of the second metal foil is increased.
  • the surface of the second metal foil was smoothed, and a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated under the conditions of a temperature of 110 ⁇ 10 ° C. and a pressure of 0.50 ⁇ 0.02 MPa. .
  • a negative mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the etching resist was removed using an aqueous sodium hydroxide solution to form the second wiring conductor 24 .
  • solder Resist Layer Forming Step> After stacking the fifth insulating layer 25 and the fifth wiring conductor 26, a solder resist layer 27 having a thickness of 10 ⁇ m was formed thereon so that the fifth wiring conductor 26 was partially exposed.
  • a protective plating layer 28 was formed on the fifth wiring conductor 26 exposed from the solder resist layer 27 .
  • a wiring board 1 with a support was obtained (see FIG. 1).
  • first metal layer removal step> (see FIGS. 5A and 5B) Physical force was applied to the interface between the ultra-thin copper foil of the first metal layer 12 and the carrier copper foil of the obtained wiring board 1 with a support, and at least the core resin layer 11 was peeled off and removed. Next, the remaining first metal layer 12 (ultrathin copper foil) was removed using a perhydrate sulfuric acid-based soft etchant to obtain a set of wiring boards 20 . No breakage was found in the wiring board 20 obtained in Example 1, and a good wiring board 20 was obtained.
  • Example 2 In the same manner as in Example 1, a support preparation step, a first laminate formation step, and a mask formation step were performed (see FIGS. 2A to 2C).
  • the carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) is used instead of desmear treatment to form the first non-through hole 21A.
  • a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer/second wiring conductor forming step, a build-up step, and a solder resist layer were carried out to obtain a wiring board 1 with a support (see FIGS. 2(E) to 3(J) and FIG. 1).
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 2, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 3 In the same manner as in Example 1, the support preparation step and the first laminate formation step were performed (see FIGS. 2A and 2B). Next, a carbon dioxide laser is irradiated from the surface of the first metal foil 41 using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation. A hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)). Subsequently, desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C.
  • a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa.
  • a mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG.
  • Example 2 After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 3, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 4 In the same manner as in Example 1, a support preparation step, a first laminate formation step, a mask formation step, a non-through hole formation step, a mask removal step, a plating step, a pattern plating step, and a first wiring conductor formation. Steps were performed (see FIGS. 2A to 3H).
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 ⁇ m (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side.
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 4, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 5 A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)).
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL-830NS SV63) is used, and the ultra-thin copper foil with a carrier copper foil with a thickness of 18 ⁇ m (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL) is prepreg on the ultra-thin copper foil side.
  • the first insulating layer in the same manner as in Example 1 except that it was placed in contact with and vacuum pressed under the conditions of a temperature of 220 ⁇ 2 ° C., a pressure of 3 ⁇ 0.2 MPa, and a holding time of 60 minutes. 21 and the first metal foil 41 were laminated (first laminate forming step; see FIG. 2(B)).
  • the glass transition temperature of the resin material contained in the first insulating layer 21 is 270.degree.
  • a mask forming step, a non-through hole forming step, a mask removing step, a plating step, a pattern plating step, a first wiring conductor forming step, a second insulating layer and a second wiring were carried out to obtain a wiring board 1 with a support (see FIGS. 2(C) to 3(J) and FIG. 1).
  • the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid.
  • a set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 5, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 6 A support preparation step was performed in the same manner as in Example 1 (see FIG. 2(A)).
  • the resin composition for forming the first insulating layer 21 in Example 1 oligophenylene ether resin (product name: OPE-2St2200, manufactured by Mitsubishi Gas Chemical Company, Inc.) 15.0 parts by mass, polyimide resin (product name: Neoprim (registered trademark) S100, manufactured by Mitsubishi Gas Chemical Co., Ltd.) 49.9 parts by mass, 2,2-bis-(4-(4-maleimidophenoxy)phenyl) propane (product name: BMI-80, K-I Kasei Co., Ltd.) 34.9 parts by mass, 2,4,5-triphenylimidazole (manufactured by Tokyo Chemical Industry Co., Ltd.) 0.2 parts by mass) in the same manner as in Example 1, carrier copper with a resin layer A foil-attached ultra-thin copper foil was prepared and laminated on the surface of the first metal layer 12, and then the carrier copper foil was peeled off
  • a prepreg (thickness 0.015 mm: manufactured by Mitsubishi Gas Chemical Company, Inc., product name: GHPL -830NS SV63), and on top of that, an ultra-thin copper foil with a carrier copper foil (ultra-thin copper foil (metal layer); thickness 3 ⁇ m: manufactured by Mitsui Kinzoku Mining Co., Ltd., product name: MT18FL),
  • the ultra-thin copper foil side was placed in contact with the prepreg and vacuum pressed under the conditions of a pressure of 3 ⁇ 0.2 MPa, a temperature of 220 ⁇ 2° C., and a holding time of 60 minutes to separate the carrier copper foil.
  • the first insulating layer 21 having a two-layer structure of the resin layer and the prepreg and the first metal foil 41 were laminated on the first metal layer 12 (first laminate forming step; FIG. 2(B)).
  • the glass transition temperature of the resin material forming the resin layer of the first insulating layer 21 is 260°C, and the glass transition temperature of the resin material contained in the prepreg is 270°C.
  • the surface of the first metal foil 41 is irradiated with a carbon dioxide laser using a carbon dioxide laser processing machine ML605GTWIII-5200U (manufactured by Mitsubishi Electric Corporation, product name) to form the first metal foil 41 and the first insulation.
  • a hole was formed in the layer 21 to form a first non-through hole 21A reaching the first metal layer 12 (non-through hole forming step; see FIG. 4(D-2)).
  • desmear treatment was performed using a sodium permanganate aqueous solution having a temperature of 80 ⁇ 5° C. and a concentration of 55 ⁇ 10 g/L.
  • electroless copper plating was applied to a thickness of 0.4 ⁇ m to 0.8 ⁇ m, and electrolytic copper plating was applied to a thickness of 5 ⁇ m to 20 ⁇ m.
  • a first connection via 21B connecting the first metal layer 12 and the first metal foil 41 is formed on the inner wall of the first non-through hole 21A, and the thickness of the first metal foil 41 is reduced. increased (plating process; see FIG. 4 (F-2)). After that, the surface of the first metal foil 41 was smoothed.
  • a dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) was laminated on the first metal foil 41 under conditions of a temperature of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa.
  • a mold mask was attached, a circuit pattern was printed using a parallel exposure machine, and the dry film resist was developed using a 1% sodium carbonate aqueous solution to form an etching resist.
  • the portion of the first metal foil 41 without the etching resist was removed by etching with an aqueous ferric chloride solution, and then the etching resist was removed with an aqueous sodium hydroxide solution to form the first wiring conductor 22 ( First wiring conductor forming step; see FIG.
  • Example 2 After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step, a build-up step, a solder resist layer forming step, and a plating finishing step are performed to obtain a wiring board 1 with a support. (See FIGS. 3(I), 3(J) and 1). Regarding the obtained wiring board 1 with a support, the core resin layer 11 was separated and removed in the same manner as in Example 1, and then the remaining first metal layer 12 (ultrathin copper foil) was treated with perhydrate sulfuric acid. A set of wiring boards 20 was obtained by removing using a soft etchant. Also in Example 6, no damage was found in the wiring board 20, and a good wiring board 20 was obtained.
  • Example 1 A support preparation step was carried out in the same manner as in Example 1. Next, in the pattern plating step, the first metal layer 12 of the support 10 is subjected to temperature A dry film resist LDF515F (manufactured by Nikko Materials Co., Ltd., product name) having a thickness of 15 ⁇ m was laminated under conditions of 110 ⁇ 10° C. and a pressure of 0.50 ⁇ 0.02 MPa. After the circuit pattern was printed on the dry film resist using a parallel exposure machine, the dry film resist was developed using a 1% sodium carbonate aqueous solution to form a resist pattern 44 .
  • LDF515F manufactured by Nikko Materials Co., Ltd., product name
  • a copper sulfate plating line with a copper sulfate concentration of 60 g/L to 80 g/L and a sulfuric acid concentration of 150 g/L to 200 g/L was used to perform pattern electrolytic copper plating to a thickness of about 5 ⁇ m to 15 ⁇ m to form a pattern plating layer 45 .
  • the resist pattern 44 was peeled off using an amine-based resist stripper. After that, in the same manner as in Example 1, a second insulating layer/second wiring conductor forming step and a build-up step were carried out. Next, an attempt was made to separate and remove the support without carrying out the solder resist layer forming step, but the wiring board was damaged and no wiring board could be obtained.
  • the wiring board 20 can be reinforced by the first insulating layer 21, and damage to the wiring board 20 can be suppressed when the core resin layer 11 is separated and removed. Do you get it.
  • It can be used for printed wiring boards and package substrates for mounting semiconductor devices.
  • SYMBOLS 1... Wiring board with support, 10... Support, 11... Core resin layer, 12... First metal layer, 20... Wiring board, 21... First insulating layer, 21A... First non-through hole, 21B 1st connection via 22 1st wiring conductor 23 2nd insulating layer 23A 2nd non-through hole 23B 2nd connection via 24 2nd wiring conductor 25 (m+2)-th insulating layer, 25A... (m+2)-th non-through hole, 25B... (m+2)-th connection via, 26... (m+2)-th wiring conductor, 27... solder resist layer, 28, 29... protection Plating layer 30 Semiconductor element 31 Solder ball 41 First metal foil 42 Mask 43 Second metal layer 44 Resist pattern 45 Pattern plating layer

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

L'invention concerne : une carte de câblage avec un support avec lequel une rupture lors de la séparation et de l'élimination du support peut être supprimée ; un procédé de fabrication de celui-ci ; et un procédé de fabrication d'une carte de montage de composant électronique l'utilisant. La présente invention comprend : un support (10) dans laquelle une première couche métallique (12) ayant un moyen de pelage est disposée sur au moins un côté de surface d'une couche de résine centrale (11) ; et une carte de câblage (20) disposée sur la première couche métallique (12). La carte de câblage (20) a une première couche d'isolation (21) disposée en contact avec la partie supérieure de la première couche métallique (12), et un premier conducteur de câblage (22) disposé en contact avec la partie supérieure de la première couche d'isolation (21). La première couche d'isolation (21) comprend un premier trou traversant partiel (21A) correspondant à une position de borne de la carte de câblage (20). Un premier trou d'interconnexion de connexion (21B) connecté au premier conducteur de câblage (22) est formé sur une paroi interne du premier trou traversant partiel (21A).
PCT/JP2022/044419 2021-12-06 2022-12-01 Carte de câblage avec support, procédé de fabrication de carte de câblage avec support, et procédé de fabrication de carte de montage de composant électronique WO2023106208A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2021-197727 2021-12-06
JP2021197727 2021-12-06
JP2022-135422 2022-08-26
JP2022135422 2022-08-26

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WO2023106208A1 true WO2023106208A1 (fr) 2023-06-15

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PCT/JP2022/044419 WO2023106208A1 (fr) 2021-12-06 2022-12-01 Carte de câblage avec support, procédé de fabrication de carte de câblage avec support, et procédé de fabrication de carte de montage de composant électronique

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WO (1) WO2023106208A1 (fr)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007173775A (ja) * 2005-12-20 2007-07-05 Phoenix Precision Technology Corp 回路基板構造及びその製法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007173775A (ja) * 2005-12-20 2007-07-05 Phoenix Precision Technology Corp 回路基板構造及びその製法

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