JP2007164922A5 - - Google Patents
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- Publication number
- JP2007164922A5 JP2007164922A5 JP2005362322A JP2005362322A JP2007164922A5 JP 2007164922 A5 JP2007164922 A5 JP 2007164922A5 JP 2005362322 A JP2005362322 A JP 2005362322A JP 2005362322 A JP2005362322 A JP 2005362322A JP 2007164922 A5 JP2007164922 A5 JP 2007164922A5
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- gate
- signal
- replica
- reference node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005362322A JP2007164922A (ja) | 2005-12-15 | 2005-12-15 | デコーダ回路 |
| US11/638,370 US7486113B2 (en) | 2005-12-15 | 2006-12-14 | Decoder circuit |
| CN2006101623734A CN1983442B (zh) | 2005-12-15 | 2006-12-14 | 译码器电路 |
| US12/343,854 US7656197B2 (en) | 2005-12-15 | 2008-12-24 | Decoder circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005362322A JP2007164922A (ja) | 2005-12-15 | 2005-12-15 | デコーダ回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007164922A JP2007164922A (ja) | 2007-06-28 |
| JP2007164922A5 true JP2007164922A5 (enExample) | 2009-02-05 |
Family
ID=38165908
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005362322A Withdrawn JP2007164922A (ja) | 2005-12-15 | 2005-12-15 | デコーダ回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7486113B2 (enExample) |
| JP (1) | JP2007164922A (enExample) |
| CN (1) | CN1983442B (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4984759B2 (ja) * | 2006-09-05 | 2012-07-25 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
| FR2911717A1 (fr) * | 2007-01-18 | 2008-07-25 | St Microelectronics Sa | Dispositif de commande de type cellulaire matriciel, en particulier pour memoire de type ram et procede correspondant |
| JP5005713B2 (ja) | 2009-02-12 | 2012-08-22 | パナソニック株式会社 | 半導体記憶装置 |
| WO2012114647A1 (ja) * | 2011-02-22 | 2012-08-30 | パナソニック株式会社 | ワード線起動回路、半導体記憶装置、および半導体集積回路 |
| CN102867535B (zh) * | 2012-09-27 | 2016-12-21 | 上海华虹宏力半导体制造有限公司 | 存储器及其字线电压产生电路 |
| CN103915115B (zh) * | 2013-01-08 | 2017-04-12 | 华邦电子股份有限公司 | 行解码电路 |
| CN103247334B (zh) * | 2013-04-24 | 2017-02-08 | 上海华虹宏力半导体制造有限公司 | 存储器及其列译码电路 |
| CN103326729B (zh) * | 2013-05-16 | 2016-02-24 | 西安邮电大学 | 一种基于数据传输的高速译码电路 |
| JP6063827B2 (ja) | 2013-06-25 | 2017-01-18 | 株式会社東芝 | 遅延回路および半導体記憶装置 |
| US9653131B1 (en) * | 2016-02-12 | 2017-05-16 | Micron Technology, Inc. | Apparatuses and methods for voltage level control |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0682520B2 (ja) * | 1987-07-31 | 1994-10-19 | 株式会社東芝 | 半導体メモリ |
| JPH08236718A (ja) | 1995-02-28 | 1996-09-13 | Toshiba Corp | ダイナミック型半導体記憶装置 |
| TW360873B (en) * | 1996-11-20 | 1999-06-11 | Matsushita Electric Industrial Co Ltd | Semiconductor integrated circuit and decoding circuit of memory |
| JP3220035B2 (ja) * | 1997-02-27 | 2001-10-22 | エヌイーシーマイクロシステム株式会社 | スタチック型半導体記憶装置 |
| JPH1145598A (ja) * | 1997-07-25 | 1999-02-16 | Nec Corp | 半導体記憶装置 |
| US6593776B2 (en) * | 2001-08-03 | 2003-07-15 | Intel Corporation | Method and apparatus for low power domino decoding |
| JP4437710B2 (ja) * | 2003-10-30 | 2010-03-24 | 富士通マイクロエレクトロニクス株式会社 | 半導体メモリ |
-
2005
- 2005-12-15 JP JP2005362322A patent/JP2007164922A/ja not_active Withdrawn
-
2006
- 2006-12-14 US US11/638,370 patent/US7486113B2/en not_active Expired - Fee Related
- 2006-12-14 CN CN2006101623734A patent/CN1983442B/zh not_active Expired - Fee Related
-
2008
- 2008-12-24 US US12/343,854 patent/US7656197B2/en not_active Expired - Fee Related
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