CN1983442B - 译码器电路 - Google Patents

译码器电路 Download PDF

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Publication number
CN1983442B
CN1983442B CN2006101623734A CN200610162373A CN1983442B CN 1983442 B CN1983442 B CN 1983442B CN 2006101623734 A CN2006101623734 A CN 2006101623734A CN 200610162373 A CN200610162373 A CN 200610162373A CN 1983442 B CN1983442 B CN 1983442B
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CN
China
Prior art keywords
transistor
node
current potential
signal
grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2006101623734A
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English (en)
Chinese (zh)
Other versions
CN1983442A (zh
Inventor
增尾昭
角谷範彦
法邑茂夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN1983442A publication Critical patent/CN1983442A/zh
Application granted granted Critical
Publication of CN1983442B publication Critical patent/CN1983442B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
CN2006101623734A 2005-12-15 2006-12-14 译码器电路 Expired - Fee Related CN1983442B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005-362322 2005-12-15
JP2005362322 2005-12-15
JP2005362322A JP2007164922A (ja) 2005-12-15 2005-12-15 デコーダ回路

Publications (2)

Publication Number Publication Date
CN1983442A CN1983442A (zh) 2007-06-20
CN1983442B true CN1983442B (zh) 2010-12-01

Family

ID=38165908

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006101623734A Expired - Fee Related CN1983442B (zh) 2005-12-15 2006-12-14 译码器电路

Country Status (3)

Country Link
US (2) US7486113B2 (enExample)
JP (1) JP2007164922A (enExample)
CN (1) CN1983442B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4984759B2 (ja) * 2006-09-05 2012-07-25 富士通セミコンダクター株式会社 半導体記憶装置
FR2911717A1 (fr) * 2007-01-18 2008-07-25 St Microelectronics Sa Dispositif de commande de type cellulaire matriciel, en particulier pour memoire de type ram et procede correspondant
JP5005713B2 (ja) 2009-02-12 2012-08-22 パナソニック株式会社 半導体記憶装置
WO2012114647A1 (ja) * 2011-02-22 2012-08-30 パナソニック株式会社 ワード線起動回路、半導体記憶装置、および半導体集積回路
CN102867535B (zh) * 2012-09-27 2016-12-21 上海华虹宏力半导体制造有限公司 存储器及其字线电压产生电路
CN103915115B (zh) * 2013-01-08 2017-04-12 华邦电子股份有限公司 行解码电路
CN103247334B (zh) * 2013-04-24 2017-02-08 上海华虹宏力半导体制造有限公司 存储器及其列译码电路
CN103326729B (zh) * 2013-05-16 2016-02-24 西安邮电大学 一种基于数据传输的高速译码电路
JP6063827B2 (ja) 2013-06-25 2017-01-18 株式会社東芝 遅延回路および半導体記憶装置
US9653131B1 (en) * 2016-02-12 2017-05-16 Micron Technology, Inc. Apparatuses and methods for voltage level control

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5936910A (en) * 1997-07-25 1999-08-10 Nec Corporation Semiconductor memory device having burn-in test function
US5970018A (en) * 1996-11-20 1999-10-19 Matsushita Electrical Industrial Co., Ltd. Semiconductor integrated circuit and decode circuit for memory
CN1612267A (zh) * 2003-10-30 2005-05-04 富士通株式会社 半导体存储器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682520B2 (ja) * 1987-07-31 1994-10-19 株式会社東芝 半導体メモリ
JPH08236718A (ja) 1995-02-28 1996-09-13 Toshiba Corp ダイナミック型半導体記憶装置
JP3220035B2 (ja) * 1997-02-27 2001-10-22 エヌイーシーマイクロシステム株式会社 スタチック型半導体記憶装置
US6593776B2 (en) * 2001-08-03 2003-07-15 Intel Corporation Method and apparatus for low power domino decoding

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5970018A (en) * 1996-11-20 1999-10-19 Matsushita Electrical Industrial Co., Ltd. Semiconductor integrated circuit and decode circuit for memory
US5936910A (en) * 1997-07-25 1999-08-10 Nec Corporation Semiconductor memory device having burn-in test function
CN1612267A (zh) * 2003-10-30 2005-05-04 富士通株式会社 半导体存储器

Also Published As

Publication number Publication date
US20090108876A1 (en) 2009-04-30
JP2007164922A (ja) 2007-06-28
US20070139230A1 (en) 2007-06-21
US7656197B2 (en) 2010-02-02
US7486113B2 (en) 2009-02-03
CN1983442A (zh) 2007-06-20

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C06 Publication
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C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
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GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20101201

Termination date: 20111214