JP2007134685A - プリント回路板 - Google Patents
プリント回路板 Download PDFInfo
- Publication number
- JP2007134685A JP2007134685A JP2006272766A JP2006272766A JP2007134685A JP 2007134685 A JP2007134685 A JP 2007134685A JP 2006272766 A JP2006272766 A JP 2006272766A JP 2006272766 A JP2006272766 A JP 2006272766A JP 2007134685 A JP2007134685 A JP 2007134685A
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- wiring
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- differential
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- printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10189—Non-printed connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Structure Of Printed Boards (AREA)
Abstract
【解決手段】 差動ドライバ素子101から差動レシーバ素子102までの伝送線路上における、VIAやコネクタなどによるインピーダンス不連続点104a、104bを、所定の位置に配置する。すなわちこのインピーダンス不連続点を、主差動配線103a〜103cによって伝送されるデジタル信号の信号伝送時間Td1、Td2、Td3が、UIの整数倍±0.5×Trfになる場所に配置する。これにより、信号の立ち上がり/立ち下がり時間Trfにイズが発生するため、信号波形を良好に保つことができる。
【選択図】 図1
Description
Td=kUI±0.5×Trf
ここで、Td:信号伝送時間
UI:信号周期
Trf:信号の立ち上がり/立ち下がり時間
k:正の整数
Td1 =k1 UI±0.5×Trf
Td2 =k2 UI±0.5×Trf
Td3 =k3 UI±0.5×Trf
かつ、Tdall=(k1+k2+k3)UI±0.5×Trf
ここで、k1、k2、k3は正の整数である。また、立ち上がり/立ち下がり時間Trfは、信号の振幅が20%〜80%または80%〜20%まで変化するのに要する時間である。また、波形の観測はパッド102aの差動電圧を用いている。また、主差動配線103a、103b、103cのインピーダンスはほぼ等しい値となっている。
Td1 =k1 UI±0.5×Trf
Td2 =k2 UI±0.5×Trf
Td3 =k3 UI±0.5×Trf
Td4 =k4 UI±0.5×Trf
Td5 =k5 UI±0.5×Trf
かつ、Tdall=(k1+k2+k3+k4+k5)UI±0.5×Trf
ここで、k1、k2、k3、k4、k5は正の整数である。
101、201、301 差動ドライバ素子
102、202、302 差動レシーバ素子(半導体チップ)
103a〜103c、203a〜203c、303a、303b 主差動配線
104a、104b インピーダンス不連続点
204a、204b VIA
307 基板間コネクタ
Claims (6)
- プリント配線板に実装された第1および第2の半導体装置と、前記第1および前記第2の半導体装置の間で信号を伝送する差動伝送線路と、前記差動伝送線路に互いに離間して配設された少なくとも3個の不連続点とを有するプリント回路板において、
前記少なくとも3個の不連続点のうち、互いに隣接する2つの不連続点間の信号伝送時間は、すべて以下の式で表わされる関係を満たしていること特徴とするプリント回路板。
Td=kUI±0.5×Trf
ここで、Td:信号伝送時間
UI:信号周期
Trf:信号の立ち上がり/立ち下がり時間
k:正の整数 - 前記少なくとも3個の不連続点のうちの2個は、それぞれ前記第1および前記第2の半導体装置と前記差動伝送線路との接続点であることを特徴とする請求項1記載のプリント回路板。
- 前記不連続点の少なくとも1つは、ヴァイアホールであることを特徴とする請求項2記載のプリント回路板。
- 前記不連続点の少なくとも1つは、コネクタであることを特徴とする請求項2または3記載のプリント回路板。
- 前記差動伝送線路は、前記第1の半導体装置内の内部配線と、前記第1の半導体装置に接続された副差動配線と、前記プリント配線板上の主差動配線とを有しており、記不連続点の少なくとも2つは、前記内部配線と半導体素子との接続店であることを特徴とする請求項1乃至4のいずれか1つに記載のプリント回路板。
- 前記差動線路上の最も離間した2つの不連続点間の信号伝送時間(Tdall)が、以下の式で表される関係を満たすことを特徴とする請求項1ないし5いずれか1項記載のプリント回路板。
Tda11=nUI±0.5×Trf
ここで、 UI:信号周期
Trf:信号の立ち上がり/立ち下がり時間
n:正の整数
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006272766A JP4819639B2 (ja) | 2005-10-12 | 2006-10-04 | プリント回路板 |
US11/548,431 US7595546B2 (en) | 2005-10-12 | 2006-10-11 | Printed circuit board |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005297408 | 2005-10-12 | ||
JP2005297408 | 2005-10-12 | ||
JP2006272766A JP4819639B2 (ja) | 2005-10-12 | 2006-10-04 | プリント回路板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007134685A true JP2007134685A (ja) | 2007-05-31 |
JP4819639B2 JP4819639B2 (ja) | 2011-11-24 |
Family
ID=38156048
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006272766A Expired - Fee Related JP4819639B2 (ja) | 2005-10-12 | 2006-10-04 | プリント回路板 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7595546B2 (ja) |
JP (1) | JP4819639B2 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090202079A1 (en) * | 2008-02-11 | 2009-08-13 | Nokia Corporation | Method, apparatus and computer program product for providing mobile broadcast service protection |
JP5610970B2 (ja) | 2010-10-19 | 2014-10-22 | キヤノン株式会社 | プリント回路板 |
JP6238567B2 (ja) | 2012-08-01 | 2017-11-29 | キヤノン株式会社 | 放電回路、電源装置及び画像形成装置 |
US9356525B2 (en) | 2012-08-31 | 2016-05-31 | Canon Kabushiki Kaisha | Power supply device and image forming apparatus |
JP5758548B2 (ja) * | 2012-09-07 | 2015-08-05 | 株式会社フジクラ | 配線基板 |
JP6399761B2 (ja) | 2014-02-07 | 2018-10-03 | キヤノン株式会社 | 電源装置及び画像形成装置 |
JP6818534B2 (ja) | 2016-12-13 | 2021-01-20 | キヤノン株式会社 | プリント配線板、プリント回路板及び電子機器 |
US10716211B2 (en) | 2018-02-08 | 2020-07-14 | Canon Kabushiki Kaisha | Printed circuit board, printed wiring board, electronic device, and camera |
JP6942679B2 (ja) | 2018-09-21 | 2021-09-29 | キヤノン株式会社 | 伝送回路、電子機器、及び撮像装置 |
US11019719B2 (en) | 2019-08-06 | 2021-05-25 | Canon Kabushiki Kaisha | Printed circuit board, printed wiring board, and electronic device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07176917A (ja) * | 1993-12-17 | 1995-07-14 | Hitachi Ltd | 高周波信号伝送線路 |
JP2001111408A (ja) * | 1999-10-08 | 2001-04-20 | Hitachi Ltd | 高速信号伝送配線実装構造 |
JP2003131758A (ja) * | 2001-08-24 | 2003-05-09 | Samsung Electronics Co Ltd | システムボード |
JP2004281960A (ja) * | 2003-03-19 | 2004-10-07 | Renesas Technology Corp | 符号間干渉抑制抵抗を用いた超高速インタフェース |
JP2004287738A (ja) * | 2003-03-20 | 2004-10-14 | Mitsubishi Electric Corp | 伝送波形解析装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4831497A (en) * | 1986-09-11 | 1989-05-16 | General Electric Company | Reduction of cross talk in interconnecting conductors |
JP2882266B2 (ja) * | 1993-12-28 | 1999-04-12 | 株式会社日立製作所 | 信号伝送装置及び回路ブロック |
JP2001134355A (ja) * | 1999-11-02 | 2001-05-18 | Nec Corp | 信号伝送システム |
JP4462758B2 (ja) * | 2000-12-27 | 2010-05-12 | 京セラ株式会社 | 高周波用配線基板 |
US7372144B2 (en) * | 2003-03-05 | 2008-05-13 | Banpil Photonics, Inc. | High speed electronics interconnect and method of manufacture |
JP3896112B2 (ja) * | 2003-12-25 | 2007-03-22 | エルピーダメモリ株式会社 | 半導体集積回路装置 |
-
2006
- 2006-10-04 JP JP2006272766A patent/JP4819639B2/ja not_active Expired - Fee Related
- 2006-10-11 US US11/548,431 patent/US7595546B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07176917A (ja) * | 1993-12-17 | 1995-07-14 | Hitachi Ltd | 高周波信号伝送線路 |
JP2001111408A (ja) * | 1999-10-08 | 2001-04-20 | Hitachi Ltd | 高速信号伝送配線実装構造 |
JP2003131758A (ja) * | 2001-08-24 | 2003-05-09 | Samsung Electronics Co Ltd | システムボード |
JP2004281960A (ja) * | 2003-03-19 | 2004-10-07 | Renesas Technology Corp | 符号間干渉抑制抵抗を用いた超高速インタフェース |
JP2004287738A (ja) * | 2003-03-20 | 2004-10-14 | Mitsubishi Electric Corp | 伝送波形解析装置 |
Also Published As
Publication number | Publication date |
---|---|
US7595546B2 (en) | 2009-09-29 |
US20070195473A1 (en) | 2007-08-23 |
JP4819639B2 (ja) | 2011-11-24 |
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