JP2007088352A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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Abstract
【解決手段】ボンディングパッドの下に配置されたダミーパターンのサイズを選択的に大きくする。これにより、ワイヤボンディング時の衝撃が直接影響する部分の強度を高めつつ、ダミーパターンのサイズを大きくすることによるエッチング条件の変動を最小限に抑えることができる。
【選択図】図2
Description
このとき、半導体基板の全面に亘ってダミーパターンのサイズを大きくすると、トレンチを形成するためにエッチングされる面積が著しく増大する。その結果、必要なエッチングガスの量が増加し、エッチングの最適条件が変わってしまう。
12 トランジスタ
100 本発明の半導体装置
20 多層配線層
22 層間絶縁膜
24,241,243,245 配線
260,262,264,266 ダミーパターン
30 ボンディングパッド
32 ボンディングパッドに重なる領域(ボンディングパッドの下の領域)
4 コンタクト
40 コンタクト層
Claims (8)
- ボンディングパッドと、
複数の配線と、
前記ボンディングパッドの下に配置された第1のダミーパターンと、
前記複数の配線の間に配置された第2のダミーパターンと、
を有し、
前記第1のダミーパターンのサイズが前記第2のダミーパターンのサイズよりも大きいこと、
を特徴とする半導体装置。 - 前記第1のダミーパターンと前記第2のダミーパターンとは、同一層内に形成されていること、を特徴とする請求項1に記載の半導体装置。
- 前記第2のダミーパターンと前記複数の配線とが同一層内に形成されていること、を特徴とする請求項2に記載の半導体装置。
- 前記第2のダミーパターンは、前記ボンディングパッドの下以外の領域に形成されていること、を特徴とする請求項3に記載の半導体装置。
- 前記複数の配線のうち少なくとも一つが前記ボンディングパッドの下に配置されていること、を特徴とする請求項4に記載の半導体装置。
- 前記ボンディングパッドの下に配置された前記配線が電源配線もしくはグランド配線であること、を特徴とする請求項5に記載の半導体装置。
- 前記ボンディングパッドと前記第1のダミーパターンとが、電気的に絶縁されていること、を特徴とする請求項6に記載の半導体装置。
- 前記ボンディングパッドがアルミニウムを主成分とし、
前記複数の配線と、前記第1のダミーパターンと、前記第2のダミーパターンとが銅を主成分とすること、
を特徴とする請求項7に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005277721A JP4610008B2 (ja) | 2005-09-26 | 2005-09-26 | 半導体装置 |
US11/526,572 US7763968B2 (en) | 2005-09-26 | 2006-09-26 | Semiconductor device featuring large reinforcing elements in pad area |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005277721A JP4610008B2 (ja) | 2005-09-26 | 2005-09-26 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007088352A true JP2007088352A (ja) | 2007-04-05 |
JP4610008B2 JP4610008B2 (ja) | 2011-01-12 |
Family
ID=37892865
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005277721A Active JP4610008B2 (ja) | 2005-09-26 | 2005-09-26 | 半導体装置 |
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Country | Link |
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US (1) | US7763968B2 (ja) |
JP (1) | JP4610008B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011009713A (ja) * | 2009-05-29 | 2011-01-13 | Renesas Electronics Corp | 半導体装置 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8274146B2 (en) * | 2008-05-30 | 2012-09-25 | Freescale Semiconductor, Inc. | High frequency interconnect pad structure |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10335333A (ja) * | 1997-03-31 | 1998-12-18 | Hitachi Ltd | 半導体集積回路装置およびその製造方法ならびに設計方法 |
JP2001267323A (ja) * | 2000-03-21 | 2001-09-28 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2004282071A (ja) * | 2003-03-13 | 2004-10-07 | Texas Instruments Inc | 平坦化均一性を改良する際の配線層埋め込み構造を伴う作製方法および半導体デバイス |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2974022B1 (ja) * | 1998-10-01 | 1999-11-08 | ヤマハ株式会社 | 半導体装置のボンディングパッド構造 |
US6670719B2 (en) * | 1999-08-25 | 2003-12-30 | Micron Technology, Inc. | Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture |
US6559042B2 (en) * | 2001-06-28 | 2003-05-06 | International Business Machines Corporation | Process for forming fusible links |
JP4307022B2 (ja) | 2002-07-05 | 2009-08-05 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の設計方法、半導体装置の設計プログラム及び半導体装置の設計装置 |
JP2004135416A (ja) | 2002-10-09 | 2004-04-30 | Nidec Shibaura Corp | モータ |
JP4619705B2 (ja) * | 2004-01-15 | 2011-01-26 | 株式会社東芝 | 半導体装置 |
JP4913329B2 (ja) * | 2004-02-09 | 2012-04-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2005
- 2005-09-26 JP JP2005277721A patent/JP4610008B2/ja active Active
-
2006
- 2006-09-26 US US11/526,572 patent/US7763968B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10335333A (ja) * | 1997-03-31 | 1998-12-18 | Hitachi Ltd | 半導体集積回路装置およびその製造方法ならびに設計方法 |
JP2001267323A (ja) * | 2000-03-21 | 2001-09-28 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2004282071A (ja) * | 2003-03-13 | 2004-10-07 | Texas Instruments Inc | 平坦化均一性を改良する際の配線層埋め込み構造を伴う作製方法および半導体デバイス |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011009713A (ja) * | 2009-05-29 | 2011-01-13 | Renesas Electronics Corp | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JP4610008B2 (ja) | 2011-01-12 |
US7763968B2 (en) | 2010-07-27 |
US20070069388A1 (en) | 2007-03-29 |
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