JP2007043090A5 - - Google Patents

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Publication number
JP2007043090A5
JP2007043090A5 JP2006145633A JP2006145633A JP2007043090A5 JP 2007043090 A5 JP2007043090 A5 JP 2007043090A5 JP 2006145633 A JP2006145633 A JP 2006145633A JP 2006145633 A JP2006145633 A JP 2006145633A JP 2007043090 A5 JP2007043090 A5 JP 2007043090A5
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JP
Japan
Prior art keywords
semiconductor device
conductive pad
ferrite structure
ubm layer
ferrite
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006145633A
Other languages
English (en)
Japanese (ja)
Other versions
JP5138181B2 (ja
JP2007043090A (ja
Filing date
Publication date
Priority claimed from KR1020050070396A external-priority patent/KR100606654B1/ko
Application filed filed Critical
Publication of JP2007043090A publication Critical patent/JP2007043090A/ja
Publication of JP2007043090A5 publication Critical patent/JP2007043090A5/ja
Application granted granted Critical
Publication of JP5138181B2 publication Critical patent/JP5138181B2/ja
Anticipated expiration legal-status Critical
Active legal-status Critical Current

Links

JP2006145633A 2005-08-01 2006-05-25 フェライト遮蔽構造を備えた半導体パッケージ Active JP5138181B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2005-0070396 2005-08-01
KR1020050070396A KR100606654B1 (ko) 2005-08-01 2005-08-01 전자파 장해 저감용 페라이트 차폐 구조를 구비하는 반도체패키지 및 그 제조 방법
US11/387,848 2006-03-24
US11/387,848 US7495317B2 (en) 2005-08-01 2006-03-24 Semiconductor package with ferrite shielding structure

Publications (3)

Publication Number Publication Date
JP2007043090A JP2007043090A (ja) 2007-02-15
JP2007043090A5 true JP2007043090A5 (enExample) 2009-07-02
JP5138181B2 JP5138181B2 (ja) 2013-02-06

Family

ID=37681296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006145633A Active JP5138181B2 (ja) 2005-08-01 2006-05-25 フェライト遮蔽構造を備えた半導体パッケージ

Country Status (2)

Country Link
JP (1) JP5138181B2 (enExample)
DE (1) DE102006036963A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9721872B1 (en) 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
KR101374148B1 (ko) * 2012-06-08 2014-03-17 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 이의 제조 방법
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
KR101366461B1 (ko) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
KR101607981B1 (ko) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2870162B2 (ja) * 1990-07-20 1999-03-10 セイコーエプソン株式会社 半導体装置およびその製造方法
KR100313706B1 (ko) * 1999-09-29 2001-11-26 윤종용 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법
JP3923368B2 (ja) * 2002-05-22 2007-05-30 シャープ株式会社 半導体素子の製造方法
JP4161911B2 (ja) * 2004-01-30 2008-10-08 ソニー株式会社 集積回路装置
EP1594163A1 (en) * 2004-05-03 2005-11-09 Commissariat A L'energie Atomique A screened electrical device and a process for manufacturing the same

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