JP2006511107A5 - - Google Patents

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Publication number
JP2006511107A5
JP2006511107A5 JP2004557626A JP2004557626A JP2006511107A5 JP 2006511107 A5 JP2006511107 A5 JP 2006511107A5 JP 2004557626 A JP2004557626 A JP 2004557626A JP 2004557626 A JP2004557626 A JP 2004557626A JP 2006511107 A5 JP2006511107 A5 JP 2006511107A5
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JP
Japan
Prior art keywords
output
input
pass filter
signal
detector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004557626A
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English (en)
Japanese (ja)
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JP2006511107A (ja
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Publication date
Priority claimed from US10/310,554 external-priority patent/US6973152B2/en
Application filed filed Critical
Publication of JP2006511107A publication Critical patent/JP2006511107A/ja
Publication of JP2006511107A5 publication Critical patent/JP2006511107A5/ja
Pending legal-status Critical Current

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JP2004557626A 2002-12-04 2003-11-25 改善されたネットワーククロック分散のための最短経路の利用 Pending JP2006511107A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/310,554 US6973152B2 (en) 2002-12-04 2002-12-04 Exploiting shortest path for improved network clock distribution
PCT/US2003/038821 WO2004051874A2 (en) 2002-12-04 2003-11-25 Exploiting shortest path for improved network clock distribution

Publications (2)

Publication Number Publication Date
JP2006511107A JP2006511107A (ja) 2006-03-30
JP2006511107A5 true JP2006511107A5 (https=) 2010-02-12

Family

ID=32468062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004557626A Pending JP2006511107A (ja) 2002-12-04 2003-11-25 改善されたネットワーククロック分散のための最短経路の利用

Country Status (5)

Country Link
US (1) US6973152B2 (https=)
EP (1) EP1593198A4 (https=)
JP (1) JP2006511107A (https=)
AU (1) AU2003298023A1 (https=)
WO (1) WO2004051874A2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007074564A (ja) * 2005-09-08 2007-03-22 Oki Electric Ind Co Ltd ネットワーク経路設定方法及び無線局
US8837529B2 (en) 2010-09-22 2014-09-16 Crestron Electronics Inc. Digital audio distribution

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228713A (en) * 1978-07-03 1980-10-21 Norlin Industries, Inc. Programmable current source for filter or oscillator
US4987536A (en) * 1988-05-12 1991-01-22 Codex Corporation Communication system for sending an identical routing tree to all connected nodes to establish a shortest route and transmitting messages thereafter
US4873517A (en) * 1988-06-23 1989-10-10 International Business Machines Corporation Method for selecting least weight end node to end node route in a data communications network
US5561790A (en) * 1992-03-24 1996-10-01 International Business Machines Corporation Shortest path determination processes for use in modeling systems and communications networks
DE4303356A1 (de) * 1993-02-05 1994-08-11 Philips Patentverwaltung Digitale Phasenregelschleife
JPH098653A (ja) * 1995-06-16 1997-01-10 Sony Corp 位相検出装置および方法
JPH0991877A (ja) * 1995-09-22 1997-04-04 Sony Corp 信号再生回路
US5729577A (en) * 1996-05-21 1998-03-17 Motorola, Inc. Signal processor with improved efficiency
US6098107A (en) * 1997-10-31 2000-08-01 Lucent Technologies Inc. Dynamic algorithms for shortest path tree computation
US6389090B2 (en) * 1998-02-06 2002-05-14 3Com Corporation Digital clock/data signal recovery method and apparatus
US6321271B1 (en) * 1998-12-22 2001-11-20 Lucent Technologies Inc. Constrained shortest path routing method
JP2001251344A (ja) * 2000-03-06 2001-09-14 Nippon Telegr & Teleph Corp <Ntt> ルーチング方法及びシステム及びルーチングプログラムを格納した記憶媒体
JP3501093B2 (ja) * 2000-04-18 2004-02-23 日本電気株式会社 ＱｏＳ経路計算装置
KR100653036B1 (ko) * 2000-12-11 2006-11-30 주식회사 케이티 회전 금지, 유-턴, 피-턴을 고려한 다익스트라 알고리즘또는 플로이드-워셜 알고리즘을 이용한 최단경로 산출방법
US7339897B2 (en) * 2002-02-22 2008-03-04 Telefonaktiebolaget Lm Ericsson (Publ) Cross-layer integrated collision free path routing
US20030164794A1 (en) * 2002-03-04 2003-09-04 Time Domain Corporation Over the horizon communications network and method
US7088158B2 (en) * 2002-05-14 2006-08-08 Lsi Logic Corporation Digital multi-phase clock generator
US7372875B2 (en) * 2002-09-30 2008-05-13 Lucent Technologies Inc. Systems and methods for synchronization in asynchronous transport networks

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