JP2006507686A - ボンディングパッドを有する半導体装置及びその形成方法 - Google Patents

ボンディングパッドを有する半導体装置及びその形成方法 Download PDF

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Publication number
JP2006507686A
JP2006507686A JP2004555419A JP2004555419A JP2006507686A JP 2006507686 A JP2006507686 A JP 2006507686A JP 2004555419 A JP2004555419 A JP 2004555419A JP 2004555419 A JP2004555419 A JP 2004555419A JP 2006507686 A JP2006507686 A JP 2006507686A
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Japan
Prior art keywords
bonding
pad
region
integrated circuit
wire
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Pending
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JP2004555419A
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Japanese (ja)
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JP2006507686A5 (https=
Inventor
エイチ． ダウニー、スーザン
アール． ハーパー、ピーター
ヘス、ケビン
ブイ． レオニ、マイケル
トラン、チュー−アン
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NXP USA Inc
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NXP USA Inc
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Publication of JP2006507686A publication Critical patent/JP2006507686A/ja
Publication of JP2006507686A5 publication Critical patent/JP2006507686A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/273—Interconnections for measuring or testing, e.g. probe pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5453—Dispositions of bond wires connecting between multiple bond pads on a chip, e.g. daisy chain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/284—Configurations of stacked chips characterised by structural arrangements for measuring or testing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2004555419A 2002-11-26 2003-11-12 ボンディングパッドを有する半導体装置及びその形成方法 Pending JP2006507686A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/304,416 US6921979B2 (en) 2002-03-13 2002-11-26 Semiconductor device having a bond pad and method therefor
PCT/US2003/035964 WO2004049436A1 (en) 2002-11-26 2003-11-12 Semiconductor device having a bond pad and method for its fabrication

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010043549A Division JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Publications (2)

Publication Number Publication Date
JP2006507686A true JP2006507686A (ja) 2006-03-02
JP2006507686A5 JP2006507686A5 (https=) 2006-12-28

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
JP2004555419A Pending JP2006507686A (ja) 2002-11-26 2003-11-12 ボンディングパッドを有する半導体装置及びその形成方法
JP2010043549A Pending JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2010043549A Pending JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Country Status (8)

Country Link
US (1) US6921979B2 (https=)
EP (1) EP1565939A1 (https=)
JP (2) JP2006507686A (https=)
KR (1) KR20050075447A (https=)
CN (1) CN1717802B (https=)
AU (1) AU2003291472A1 (https=)
TW (1) TWI313921B (https=)
WO (1) WO2004049436A1 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008218442A (ja) * 2007-02-28 2008-09-18 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
JP2016195263A (ja) * 2005-06-24 2016-11-17 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 線路デバイスの製造方法
JP2019169639A (ja) * 2018-03-23 2019-10-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

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US7305509B2 (en) * 2003-03-07 2007-12-04 Dell Products L.P. Method and apparatus for zero stub serial termination capacitor of resistor mounting option in an information handling system
JP4357862B2 (ja) * 2003-04-09 2009-11-04 シャープ株式会社 半導体装置
US8274160B2 (en) 2003-08-21 2012-09-25 Intersil Americas Inc. Active area bonding compatible high current structures
US7005369B2 (en) * 2003-08-21 2006-02-28 Intersil American Inc. Active area bonding compatible high current structures
US7115997B2 (en) * 2003-11-19 2006-10-03 International Business Machines Corporation Seedless wirebond pad plating
US20050127516A1 (en) * 2003-12-12 2005-06-16 Mercer Betty S. Small viatops for thick copper connectors
US7629689B2 (en) * 2004-01-22 2009-12-08 Kawasaki Microelectronics, Inc. Semiconductor integrated circuit having connection pads over active elements
CN100589244C (zh) * 2004-03-16 2010-02-10 松下电器产业株式会社 半导体器件
US20060060845A1 (en) * 2004-09-20 2006-03-23 Narahari Ramanuja Bond pad redistribution layer for thru semiconductor vias and probe touchdown
JP5148825B2 (ja) * 2005-10-14 2013-02-20 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
WO2007114057A1 (ja) * 2006-04-04 2007-10-11 Panasonic Corporation 半導体集積回路装置およびｐｄｐドライバおよびプラズマディスプレイパネル
US7808117B2 (en) * 2006-05-16 2010-10-05 Freescale Semiconductor, Inc. Integrated circuit having pads and input/output (I/O) cells
US7741195B2 (en) 2006-05-26 2010-06-22 Freescale Semiconductor, Inc. Method of stimulating die circuitry and structure therefor
KR100753795B1 (ko) * 2006-06-27 2007-08-31 하나 마이크론(주) 반도체 패키지 및 그 제조 방법
US7397127B2 (en) * 2006-10-06 2008-07-08 Taiwan Semiconductor Manufacturing Co., Ltd. Bonding and probing pad structures
US20080182120A1 (en) * 2007-01-28 2008-07-31 Lan Chu Tan Bond pad for semiconductor device
US7566648B2 (en) * 2007-04-22 2009-07-28 Freescale Semiconductor Inc. Method of making solder pad
JP4317245B2 (ja) 2007-09-27 2009-08-19 新光電気工業株式会社 電子装置及びその製造方法
US20100171211A1 (en) * 2009-01-07 2010-07-08 Che-Yuan Jao Semiconductor device
CN102209433A (zh) * 2010-03-30 2011-10-05 鸿富锦精密工业（深圳）有限公司 电路板引脚布局架构
US8242613B2 (en) 2010-09-01 2012-08-14 Freescale Semiconductor, Inc. Bond pad for semiconductor die
FR2974665A1 (fr) * 2011-04-27 2012-11-02 St Microelectronics Crolles 2 Puce microelectronique, composant incluant une telle puce et procede de fabrication
JP2014241309A (ja) * 2011-10-06 2014-12-25 株式会社村田製作所 半導体装置およびその製造方法
US9599657B2 (en) * 2013-01-03 2017-03-21 Globalfoundries Inc. High power radio frequency (RF) in-line wafer testing
JP5772926B2 (ja) 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
US9536833B2 (en) * 2013-02-01 2017-01-03 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US9455226B2 (en) 2013-02-01 2016-09-27 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
EP3131118B1 (en) * 2015-08-12 2019-04-17 MediaTek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US10262926B2 (en) 2016-10-05 2019-04-16 Nexperia B.V. Reversible semiconductor die
US11043435B1 (en) * 2020-05-18 2021-06-22 Innogrit Technologies Co., Ltd. Semiconductor die with hybrid wire bond pads
JP2022039620A (ja) * 2020-08-28 2022-03-10 キオクシア株式会社 半導体装置
US12176320B2 (en) * 2021-05-10 2024-12-24 Ap Memory Technology Corporation Semiconductor structure and methods for bonding tested wafers and testing pre-bonded wafers
KR20240061935A (ko) 2022-11-01 2024-05-08 삼성전자주식회사 테스트 패드를 갖는 반도체 패키지

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US20020016070A1 (en) * 2000-04-05 2002-02-07 Gerald Friese Power pads for application of high current per bond pad in silicon technology
JP3631120B2 (ja) * 2000-09-28 2005-03-23 沖電気工業株式会社 半導体装置
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Publication number Priority date Publication date Assignee Title
JP2016195263A (ja) * 2005-06-24 2016-11-17 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 線路デバイスの製造方法
JP2008218442A (ja) * 2007-02-28 2008-09-18 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
JP2019169639A (ja) * 2018-03-23 2019-10-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
TWI313921B (en) 2009-08-21
US6921979B2 (en) 2005-07-26
JP2010153901A (ja) 2010-07-08
TW200503221A (en) 2005-01-16
AU2003291472A1 (en) 2004-06-18
US20030173668A1 (en) 2003-09-18
CN1717802B (zh) 2010-10-27
EP1565939A1 (en) 2005-08-24
KR20050075447A (ko) 2005-07-20
CN1717802A (zh) 2006-01-04
WO2004049436A1 (en) 2004-06-10

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JPH04287335A (ja) 半導体装置

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