AU2003291472A1 - Semiconductor device having a bond pad and method for its fabrication - Google Patents

Semiconductor device having a bond pad and method for its fabrication

Info

Publication number
AU2003291472A1
AU2003291472A1 AU2003291472A AU2003291472A AU2003291472A1 AU 2003291472 A1 AU2003291472 A1 AU 2003291472A1 AU 2003291472 A AU2003291472 A AU 2003291472A AU 2003291472 A AU2003291472 A AU 2003291472A AU 2003291472 A1 AU2003291472 A1 AU 2003291472A1
Authority
AU
Australia
Prior art keywords
fabrication
semiconductor device
bond pad
bond
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003291472A
Other languages
English (en)
Inventor
Susan H. Downey
Peter R. Harper
Kevin Hess
Michael V. Leoni
Tu-Anh Tran
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of AU2003291472A1 publication Critical patent/AU2003291472A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/273—Interconnections for measuring or testing, e.g. probe pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5453—Dispositions of bond wires connecting between multiple bond pads on a chip, e.g. daisy chain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/284—Configurations of stacked chips characterised by structural arrangements for measuring or testing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
AU2003291472A 2002-11-26 2003-11-12 Semiconductor device having a bond pad and method for its fabrication Abandoned AU2003291472A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/304,416 US6921979B2 (en) 2002-03-13 2002-11-26 Semiconductor device having a bond pad and method therefor
US10/304,416 2002-11-26
PCT/US2003/035964 WO2004049436A1 (en) 2002-11-26 2003-11-12 Semiconductor device having a bond pad and method for its fabrication

Publications (1)

Publication Number Publication Date
AU2003291472A1 true AU2003291472A1 (en) 2004-06-18

Family

ID=32392430

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003291472A Abandoned AU2003291472A1 (en) 2002-11-26 2003-11-12 Semiconductor device having a bond pad and method for its fabrication

Country Status (8)

Country Link
US (1) US6921979B2 (https=)
EP (1) EP1565939A1 (https=)
JP (2) JP2006507686A (https=)
KR (1) KR20050075447A (https=)
CN (1) CN1717802B (https=)
AU (1) AU2003291472A1 (https=)
TW (1) TWI313921B (https=)
WO (1) WO2004049436A1 (https=)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7305509B2 (en) * 2003-03-07 2007-12-04 Dell Products L.P. Method and apparatus for zero stub serial termination capacitor of resistor mounting option in an information handling system
JP4357862B2 (ja) * 2003-04-09 2009-11-04 シャープ株式会社 半導体装置
US8274160B2 (en) 2003-08-21 2012-09-25 Intersil Americas Inc. Active area bonding compatible high current structures
US7005369B2 (en) * 2003-08-21 2006-02-28 Intersil American Inc. Active area bonding compatible high current structures
US7115997B2 (en) * 2003-11-19 2006-10-03 International Business Machines Corporation Seedless wirebond pad plating
US20050127516A1 (en) * 2003-12-12 2005-06-16 Mercer Betty S. Small viatops for thick copper connectors
US7629689B2 (en) * 2004-01-22 2009-12-08 Kawasaki Microelectronics, Inc. Semiconductor integrated circuit having connection pads over active elements
CN100589244C (zh) * 2004-03-16 2010-02-10 松下电器产业株式会社 半导体器件
US20060060845A1 (en) * 2004-09-20 2006-03-23 Narahari Ramanuja Bond pad redistribution layer for thru semiconductor vias and probe touchdown
US7468545B2 (en) * 2005-05-06 2008-12-23 Megica Corporation Post passivation structure for a semiconductor device and packaging process for same
JP5148825B2 (ja) * 2005-10-14 2013-02-20 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
WO2007114057A1 (ja) * 2006-04-04 2007-10-11 Panasonic Corporation 半導体集積回路装置およびｐｄｐドライバおよびプラズマディスプレイパネル
US7808117B2 (en) * 2006-05-16 2010-10-05 Freescale Semiconductor, Inc. Integrated circuit having pads and input/output (I/O) cells
US7741195B2 (en) 2006-05-26 2010-06-22 Freescale Semiconductor, Inc. Method of stimulating die circuitry and structure therefor
KR100753795B1 (ko) * 2006-06-27 2007-08-31 하나 마이크론(주) 반도체 패키지 및 그 제조 방법
US7397127B2 (en) * 2006-10-06 2008-07-08 Taiwan Semiconductor Manufacturing Co., Ltd. Bonding and probing pad structures
US20080182120A1 (en) * 2007-01-28 2008-07-31 Lan Chu Tan Bond pad for semiconductor device
JP2008218442A (ja) * 2007-02-28 2008-09-18 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
US7566648B2 (en) * 2007-04-22 2009-07-28 Freescale Semiconductor Inc. Method of making solder pad
JP4317245B2 (ja) 2007-09-27 2009-08-19 新光電気工業株式会社 電子装置及びその製造方法
US20100171211A1 (en) * 2009-01-07 2010-07-08 Che-Yuan Jao Semiconductor device
CN102209433A (zh) * 2010-03-30 2011-10-05 鸿富锦精密工业（深圳）有限公司 电路板引脚布局架构
US8242613B2 (en) 2010-09-01 2012-08-14 Freescale Semiconductor, Inc. Bond pad for semiconductor die
FR2974665A1 (fr) * 2011-04-27 2012-11-02 St Microelectronics Crolles 2 Puce microelectronique, composant incluant une telle puce et procede de fabrication
JP2014241309A (ja) * 2011-10-06 2014-12-25 株式会社村田製作所 半導体装置およびその製造方法
US9599657B2 (en) * 2013-01-03 2017-03-21 Globalfoundries Inc. High power radio frequency (RF) in-line wafer testing
JP5772926B2 (ja) 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
US9536833B2 (en) * 2013-02-01 2017-01-03 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US9455226B2 (en) 2013-02-01 2016-09-27 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
EP3131118B1 (en) * 2015-08-12 2019-04-17 MediaTek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US10262926B2 (en) 2016-10-05 2019-04-16 Nexperia B.V. Reversible semiconductor die
JP2019169639A (ja) * 2018-03-23 2019-10-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US11043435B1 (en) * 2020-05-18 2021-06-22 Innogrit Technologies Co., Ltd. Semiconductor die with hybrid wire bond pads
JP2022039620A (ja) * 2020-08-28 2022-03-10 キオクシア株式会社 半導体装置
US12176320B2 (en) * 2021-05-10 2024-12-24 Ap Memory Technology Corporation Semiconductor structure and methods for bonding tested wafers and testing pre-bonded wafers
KR20240061935A (ko) 2022-11-01 2024-05-08 삼성전자주식회사 테스트 패드를 갖는 반도체 패키지

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01309340A (ja) * 1988-06-07 1989-12-13 Mitsubishi Electric Corp 半導体装置
JPH0456237A (ja) * 1990-06-25 1992-02-24 Matsushita Electron Corp 半導体装置
DE69330603T2 (de) * 1993-09-30 2002-07-04 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US5554940A (en) 1994-07-05 1996-09-10 Motorola, Inc. Bumped semiconductor device and method for probing the same
US5514892A (en) 1994-09-30 1996-05-07 Motorola, Inc. Electrostatic discharge protection device
US5506499A (en) 1995-06-05 1996-04-09 Neomagic Corp. Multiple probing of an auxilary test pad which allows for reliable bonding to a primary bonding pad
US5783868A (en) 1996-09-20 1998-07-21 Integrated Device Technology, Inc. Extended bond pads with a plurality of perforations
JP3351706B2 (ja) 1997-05-14 2002-12-03 株式会社東芝 半導体装置およびその製造方法
US6144100A (en) 1997-06-05 2000-11-07 Texas Instruments Incorporated Integrated circuit with bonding layer over active circuitry
JP3022819B2 (ja) * 1997-08-27 2000-03-21 日本電気アイシーマイコンシステム株式会社 半導体集積回路装置
US5886393A (en) * 1997-11-07 1999-03-23 National Semiconductor Corporation Bonding wire inductor for use in an integrated circuit package and method
US6232662B1 (en) 1998-07-14 2001-05-15 Texas Instruments Incorporated System and method for bonding over active integrated circuits
US6373143B1 (en) 1998-09-24 2002-04-16 International Business Machines Corporation Integrated circuit having wirebond pads suitable for probing
TW445616B (en) 1998-12-04 2001-07-11 Koninkl Philips Electronics Nv An integrated circuit device
US6303459B1 (en) 1999-11-15 2001-10-16 Taiwan Semiconductor Manufacturing Company Integration process for Al pad
US20020016070A1 (en) * 2000-04-05 2002-02-07 Gerald Friese Power pads for application of high current per bond pad in silicon technology
JP3631120B2 (ja) * 2000-09-28 2005-03-23 沖電気工業株式会社 半導体装置
US6844631B2 (en) 2002-03-13 2005-01-18 Freescale Semiconductor, Inc. Semiconductor device having a bond pad and method therefor

Also Published As

Publication number Publication date
TWI313921B (en) 2009-08-21
US6921979B2 (en) 2005-07-26
JP2010153901A (ja) 2010-07-08
TW200503221A (en) 2005-01-16
US20030173668A1 (en) 2003-09-18
CN1717802B (zh) 2010-10-27
EP1565939A1 (en) 2005-08-24
JP2006507686A (ja) 2006-03-02
KR20050075447A (ko) 2005-07-20
CN1717802A (zh) 2006-01-04
WO2004049436A1 (en) 2004-06-10

Similar Documents

Publication Publication Date Title
AU2003291472A1 (en) Semiconductor device having a bond pad and method for its fabrication
AU2003218145A1 (en) Semiconductor device having a bond pad and method therefor
AU2003218146A1 (en) Semiconductor device having a wire bond pad and method therefor
AU2003302299A1 (en) Polishing pad and method for manufacturing semiconductor device
AU2003253566A1 (en) Method and wafer for maintaining ultra clean bonding pads on a wafer
AU2003275614A1 (en) Semiconductor device and method for manufacturing semiconductor device
AU2003275615A1 (en) Semiconductor device and method for manufacturing semiconductor device
AU2002254726A1 (en) Semiconductor device and a method therefor
AU2003279030A1 (en) Method for forming a semiconductor device and structure thereof
AU2003220830A1 (en) Semiconductor manufacturing method and device thereof
AU2003211857A1 (en) Semiconductor device and its manufacturing method
AU2003211888A1 (en) Semiconductor device and its manufacturing method
AU2003280487A1 (en) Semiconductor device and its manufacturing method
AU2003211644A1 (en) Semiconductor device using semiconductor chip
AU2003277266A1 (en) Semiconductor device package
AU2002303797A1 (en) Method for packaging a microelectronic device using on-die bond pad expansion
AU2003275541A1 (en) Silicon carbide semiconductor device and its manufacturing method
AU2003236328A1 (en) Polishing pad and semiconductor substrate manufacturing method using the polishing pad
AU2003242012A1 (en) Semiconductor device and method for fabricating the same
AU2003244275A1 (en) Semiconductor device and its manufacturing method
SG111069A1 (en) Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods
TWI319227B (en) Structure and method for reinforcing a bond pad on a chip
AU2003261078A1 (en) A semiconductor device and method of fabricating a semiconductor device
AU2002368201A1 (en) Semiconductor device with wire bond inductor and method
AU2003280742A1 (en) Semiconductor light-emitting device and method for manufacturing same

Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase