JP2006179910A - 微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 - Google Patents
微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 Download PDFInfo
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- JP2006179910A JP2006179910A JP2005364311A JP2005364311A JP2006179910A JP 2006179910 A JP2006179910 A JP 2006179910A JP 2005364311 A JP2005364311 A JP 2005364311A JP 2005364311 A JP2005364311 A JP 2005364311A JP 2006179910 A JP2006179910 A JP 2006179910A
- Authority
- JP
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- Prior art keywords
- mold
- substrate
- thick film
- pzt
- film element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N39/00—Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
- H10N30/072—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by laminating or bonding of piezoelectric or electrostrictive bodies
- H10N30/073—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by laminating or bonding of piezoelectric or electrostrictive bodies by fusion of metals or by adhesives
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/08—Shaping or machining of piezoelectric or electrostrictive bodies
- H10N30/081—Shaping or machining of piezoelectric or electrostrictive bodies by coating or depositing using masks, e.g. lift-off
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/85—Piezoelectric or electrostrictive active materials
- H10N30/853—Ceramic compositions
- H10N30/8548—Lead based oxides
- H10N30/8554—Lead zirconium titanate based
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/42—Piezoelectric device making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/43—Electric condenser making
- Y10T29/435—Solid dielectric type
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49163—Manufacturing circuit on or in base with sintering of base
Abstract
【解決手段】暫時基板上に配置された型の内部にセラミック素材例えば圧電素材を堆積させ(104)、セラミック素材からなる成形済素子例えば圧電素子を得るべく型を取り除き(106)、この素子を焼成して(108)目的基板に接合し(112)、そして暫時基板を取り除く(114)。必要に応じ素子上に電極を堆積させる(110,116)。型は例えばSU−8その他のフォトレジスト素材から形成する(102)。
【選択図】図2
Description
Claims (4)
- 暫時基板上に配置された型の内部にセラミック素材を堆積させる工程と、
セラミック素材からなる成形済素子を得るべく型を取り除く工程と、
成形済素子を焼成する工程と、
目的基板に成形済素子を接合する工程と、
暫時基板を取り除く工程と、
を有する方法。 - 請求項1記載の方法において、更に、型をSU−8その他のフォトレジスト素材から形成する工程を有する方法。
- 暫時基板上に型を形成する工程と、
型の内部に圧電素材を堆積させる工程と、
圧電素材からなる成形済の圧電素子を得るべく型を取り除く工程と、
圧電素子を焼成する工程と、
圧電素子上に第1の電極を堆積させる工程と、
目的基板に圧電素子を接合する工程と、
暫時基板を取り除く工程と、
圧電素子上に第2の電極を堆積させる工程と、
を有する圧電素子アレイ形成方法。 - 請求項3記載の方法において、更に、形成される型がSU−8その他のフォトレジスト素材による型である方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/017,569 US7401403B2 (en) | 2004-12-20 | 2004-12-20 | Method for forming ceramic thick film element arrays with fine feature size, high-precision definition, and/or high aspect ratios |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013034240A Division JP5657044B2 (ja) | 2004-12-20 | 2013-02-25 | 微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2006179910A true JP2006179910A (ja) | 2006-07-06 |
Family
ID=35929662
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005364311A Pending JP2006179910A (ja) | 2004-12-20 | 2005-12-19 | 微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 |
JP2013034240A Expired - Fee Related JP5657044B2 (ja) | 2004-12-20 | 2013-02-25 | 微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
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JP2013034240A Expired - Fee Related JP5657044B2 (ja) | 2004-12-20 | 2013-02-25 | 微細寸法セラミック厚膜素子アレイ、高精細形状セラミック厚膜素子アレイ及び高アスペクト比セラミック厚膜素子アレイの形成方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7401403B2 (ja) |
EP (1) | EP1672712B1 (ja) |
JP (2) | JP2006179910A (ja) |
DE (1) | DE602005019527D1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008028372A (ja) * | 2006-07-19 | 2008-02-07 | Samsung Electro Mech Co Ltd | レーザリフトオフを用いた誘電体薄膜を有する薄膜キャパシタが内蔵された印刷回路基板の製造方法、及びこれから製造された薄膜キャパシタが内蔵された印刷回路基板 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9453289B2 (en) * | 2010-04-13 | 2016-09-27 | Lawrence Livermore National Security, Llc | Methods of three-dimensional electrophoretic deposition for ceramic and cermet applications and systems thereof |
US9062952B2 (en) * | 2011-08-08 | 2015-06-23 | Lawrence Livermore National Security, Llc | Methods and systems for electrophoretic deposition of energetic materials and compositions thereof |
TWI540475B (zh) * | 2014-05-20 | 2016-07-01 | 恆顥科技股份有限公司 | 觸控面板、走線結構及走線結構形成方法 |
JP2021021102A (ja) * | 2019-07-25 | 2021-02-18 | セイコーエプソン株式会社 | ポーラス構造を有する金属造形物の製造方法 |
CN114497352B (zh) * | 2022-04-06 | 2022-06-24 | 淄博高新技术产业开发区Mems研究院 | 具有微结构阵列的压电材料层及其制备方法和应用 |
Citations (2)
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JPH0897483A (ja) * | 1994-09-28 | 1996-04-12 | Sumitomo Electric Ind Ltd | 微細セラミックス構造体の形成方法 |
JP2002134806A (ja) * | 2000-10-19 | 2002-05-10 | Canon Inc | 圧電膜型アクチュエータおよび液体噴射ヘッドとその製造方法 |
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US5580511A (en) * | 1990-01-25 | 1996-12-03 | Dai Nippon Insatsu Kabushiki Kaisha | Method of forming thick film pattern and material for forming thick film pattern |
US6375880B1 (en) * | 1997-09-30 | 2002-04-23 | The Board Of Trustees Of The Leland Stanford Junior University | Mold shape deposition manufacturing |
US6265139B1 (en) * | 1998-12-30 | 2001-07-24 | Samsung Electro-Mechanics Co., Ltd. | Method for fabricating piezoelectric/electrostrictive ceramic micro actuator using photolithography |
CA2371914A1 (en) * | 1999-05-20 | 2000-11-30 | Russell A. Giordano | Polymer re-inforced anatomically accurate bioactive prostheses |
JP3638473B2 (ja) * | 1999-05-31 | 2005-04-13 | 京セラ株式会社 | インクジェットプリンタヘッドの製造方法 |
JP2001274528A (ja) * | 2000-01-21 | 2001-10-05 | Fujitsu Ltd | 薄膜デバイスの基板間転写方法 |
JP2001261454A (ja) * | 2000-03-23 | 2001-09-26 | Sumitomo Electric Ind Ltd | セラミックス部品の製造方法 |
JP2002075999A (ja) * | 2000-08-31 | 2002-03-15 | Ulvac Japan Ltd | 銅配線パターンの形成方法 |
JP4387623B2 (ja) | 2000-12-04 | 2009-12-16 | キヤノン株式会社 | 圧電素子の製造方法 |
US7089635B2 (en) | 2003-02-25 | 2006-08-15 | Palo Alto Research Center, Incorporated | Methods to make piezoelectric ceramic thick film arrays and elements |
US6964201B2 (en) | 2003-02-25 | 2005-11-15 | Palo Alto Research Center Incorporated | Large dimension, flexible piezoelectric ceramic tapes |
US7070669B1 (en) | 2004-12-20 | 2006-07-04 | Xerox Corporation | Method for forming ceramic thick film element arrays |
-
2004
- 2004-12-20 US US11/017,569 patent/US7401403B2/en not_active Expired - Fee Related
-
2005
- 2005-12-19 JP JP2005364311A patent/JP2006179910A/ja active Pending
- 2005-12-20 EP EP05112474A patent/EP1672712B1/en not_active Expired - Fee Related
- 2005-12-20 DE DE602005019527T patent/DE602005019527D1/de active Active
-
2008
- 2008-06-16 US US12/139,798 patent/US8001666B2/en not_active Expired - Fee Related
-
2013
- 2013-02-25 JP JP2013034240A patent/JP5657044B2/ja not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0897483A (ja) * | 1994-09-28 | 1996-04-12 | Sumitomo Electric Ind Ltd | 微細セラミックス構造体の形成方法 |
JP2002134806A (ja) * | 2000-10-19 | 2002-05-10 | Canon Inc | 圧電膜型アクチュエータおよび液体噴射ヘッドとその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008028372A (ja) * | 2006-07-19 | 2008-02-07 | Samsung Electro Mech Co Ltd | レーザリフトオフを用いた誘電体薄膜を有する薄膜キャパシタが内蔵された印刷回路基板の製造方法、及びこれから製造された薄膜キャパシタが内蔵された印刷回路基板 |
US8039759B2 (en) | 2006-07-19 | 2011-10-18 | Samsung Electro-Mechanics Co., Ltd. | Method for manufacturing a printed circuit board with a thin film capacitor embedded therein having a dielectric film by using laser lift-off, and printed circuit board with a thin film capacitor embedded therein manufactured thereby |
US8049117B2 (en) | 2006-07-19 | 2011-11-01 | Samsung Electro-Mechanics Co., Ltd. | Method for manufacturing a printed circuit board with a thin film capacitor embedded therein having a dielectric film by using laser lift-off, and printed circuit board with a thin film capacitor embedded therein manufactured thereby |
Also Published As
Publication number | Publication date |
---|---|
US20060130302A1 (en) | 2006-06-22 |
DE602005019527D1 (de) | 2010-04-08 |
US7401403B2 (en) | 2008-07-22 |
EP1672712A3 (en) | 2007-09-12 |
JP5657044B2 (ja) | 2015-01-21 |
EP1672712A2 (en) | 2006-06-21 |
EP1672712B1 (en) | 2010-02-24 |
US8001666B2 (en) | 2011-08-23 |
JP2013168654A (ja) | 2013-08-29 |
US20080244884A1 (en) | 2008-10-09 |
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