JP2005530924A5 - - Google Patents

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Publication number
JP2005530924A5
JP2005530924A5 JP2004510496A JP2004510496A JP2005530924A5 JP 2005530924 A5 JP2005530924 A5 JP 2005530924A5 JP 2004510496 A JP2004510496 A JP 2004510496A JP 2004510496 A JP2004510496 A JP 2004510496A JP 2005530924 A5 JP2005530924 A5 JP 2005530924A5
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JP
Japan
Prior art keywords
silane
power
electric field
nitrogen
flow rate
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JP2004510496A
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English (en)
Japanese (ja)
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JP2005530924A (ja
JP4825418B2 (ja
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Priority claimed from DE10223954A external-priority patent/DE10223954A1/de
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Publication of JP2005530924A publication Critical patent/JP2005530924A/ja
Publication of JP2005530924A5 publication Critical patent/JP2005530924A5/ja
Application granted granted Critical
Publication of JP4825418B2 publication Critical patent/JP4825418B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2004510496A 2002-05-29 2003-05-14 窒化シリコンまたは酸窒化シリコンを蒸着するためのプラズマ化学蒸着方法、および層構造の製造方法、並びに、層構造 Expired - Fee Related JP4825418B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10223954.1 2002-05-29
DE10223954A DE10223954A1 (de) 2002-05-29 2002-05-29 Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren zum Abscheiden von Siliziumnitrid oder Siliziumoxinitrid, Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
PCT/DE2003/001552 WO2003102264A2 (de) 2002-05-29 2003-05-14 Verfahren zum abscheiden von siliziumnitrid oder siliziumoxinitrid sowie entsprechendes erzeugnis,

Publications (3)

Publication Number Publication Date
JP2005530924A JP2005530924A (ja) 2005-10-13
JP2005530924A5 true JP2005530924A5 (https=) 2010-01-21
JP4825418B2 JP4825418B2 (ja) 2011-11-30

Family

ID=29432440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004510496A Expired - Fee Related JP4825418B2 (ja) 2002-05-29 2003-05-14 窒化シリコンまたは酸窒化シリコンを蒸着するためのプラズマ化学蒸着方法、および層構造の製造方法、並びに、層構造

Country Status (6)

Country Link
US (1) US7294553B2 (https=)
EP (1) EP1507888B1 (https=)
JP (1) JP4825418B2 (https=)
DE (2) DE10223954A1 (https=)
TW (1) TWI312543B (https=)
WO (1) WO2003102264A2 (https=)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050073678A1 (en) * 2003-09-26 2005-04-07 Jamil Tahir-Kheli Detection and reduction of dielectric breakdown in semiconductor devices
DE102004003337A1 (de) * 2004-01-22 2005-08-18 Infineon Technologies Ag Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stickstoff-haltiges Material und Schicht-Anordnung
US7097779B2 (en) * 2004-07-06 2006-08-29 Tokyo Electron Limited Processing system and method for chemically treating a TERA layer
DE102004050391B4 (de) * 2004-10-15 2007-02-08 Infineon Technologies Ag Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
US7268038B2 (en) * 2004-11-23 2007-09-11 Newport Fab, Llc Method for fabricating a MIM capacitor having increased capacitance density and related structure
JP5186776B2 (ja) 2007-02-22 2013-04-24 富士通株式会社 半導体装置及びその製造方法
US7606021B2 (en) * 2007-02-26 2009-10-20 United Microelectronics Corp. Metal-insulator-metal capacitor and method for fabricating the same
US20090071371A1 (en) * 2007-09-18 2009-03-19 College Of William And Mary Silicon Oxynitride Coating Compositions
US7678715B2 (en) * 2007-12-21 2010-03-16 Applied Materials, Inc. Low wet etch rate silicon nitride film
US7943527B2 (en) * 2008-05-30 2011-05-17 The Board Of Trustees Of The University Of Illinois Surface preparation for thin film growth by enhanced nucleation
KR101017763B1 (ko) * 2008-10-16 2011-02-28 주식회사 동부하이텍 Ｍｉｍ 커패시터 및 그 제조 방법
US8563095B2 (en) * 2010-03-15 2013-10-22 Applied Materials, Inc. Silicon nitride passivation layer for covering high aspect ratio features
JP5922352B2 (ja) * 2011-08-11 2016-05-24 Ｓｐｐテクノロジーズ株式会社 窒化膜の製造装置及びその製造方法、並びにその製造プログラム
CN103094076B (zh) * 2011-11-02 2015-12-16 无锡华润上华半导体有限公司 用于提高0.18μm工艺MIM电容性能的方法
CN103060778B (zh) * 2013-01-23 2015-03-11 深圳市劲拓自动化设备股份有限公司 平板式pecvd装置
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
JP2015149404A (ja) * 2014-02-06 2015-08-20 富士フイルム株式会社 シリコンオキシナイトライド膜およびその製造方法、トランジスタ
US10693062B2 (en) * 2015-12-08 2020-06-23 Crossbar, Inc. Regulating interface layer formation for two-terminal memory
GB201813467D0 (en) * 2018-08-17 2018-10-03 Spts Technologies Ltd Method of depositing silicon nitride
US11710631B2 (en) * 2020-10-23 2023-07-25 Applied Materials, Inc. Tensile nitride deposition systems and methods
WO2023017780A1 (ja) * 2021-08-11 2023-02-16 株式会社村田製作所 弾性波装置
KR102438504B1 (ko) * 2021-11-24 2022-08-31 주식회사 아이에스티이 SiCN 박막 형성 방법
CN115955913A (zh) * 2023-02-13 2023-04-11 广州粤芯半导体技术有限公司 电容结构及其制备方法、半导体结构
CN119486379A (zh) * 2023-08-04 2025-02-18 北京北方华创微电子装备有限公司 一种电流阻挡层的制备方法及led芯片

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US4786612A (en) * 1986-02-03 1988-11-22 Intel Corporation Plasma enhanced chemical vapor deposited vertical silicon nitride resistor
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