JP2005509282A5 - - Google Patents

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Publication number
JP2005509282A5
JP2005509282A5 JP2003543032A JP2003543032A JP2005509282A5 JP 2005509282 A5 JP2005509282 A5 JP 2005509282A5 JP 2003543032 A JP2003543032 A JP 2003543032A JP 2003543032 A JP2003543032 A JP 2003543032A JP 2005509282 A5 JP2005509282 A5 JP 2005509282A5
Authority
JP
Japan
Prior art keywords
electrode
electrodes
thin film
layer
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2003543032A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005509282A (ja
Filing date
Publication date
Priority claimed from NO20015509A external-priority patent/NO20015509D0/no
Application filed filed Critical
Publication of JP2005509282A publication Critical patent/JP2005509282A/ja
Publication of JP2005509282A5 publication Critical patent/JP2005509282A5/ja
Abandoned legal-status Critical Current

Links

JP2003543032A 2001-11-09 2002-11-08 メモリ構造体用電極、方法および装置 Abandoned JP2005509282A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NO20015509A NO20015509D0 (no) 2001-11-09 2001-11-09 Elektrodeanordning, fremgangsmåte til dets fremstilling, apparat omfattende elektrodeanordningene, samt bruk av sistnevnte
PCT/NO2002/000414 WO2003041084A1 (en) 2001-11-09 2002-11-08 Electrodes, method and apparatus for memory structure

Publications (2)

Publication Number Publication Date
JP2005509282A JP2005509282A (ja) 2005-04-07
JP2005509282A5 true JP2005509282A5 (enExample) 2006-01-05

Family

ID=19913010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003543032A Abandoned JP2005509282A (ja) 2001-11-09 2002-11-08 メモリ構造体用電極、方法および装置

Country Status (12)

Country Link
EP (1) EP1446805B8 (enExample)
JP (1) JP2005509282A (enExample)
KR (1) KR100577544B1 (enExample)
CN (1) CN1582481A (enExample)
AT (1) ATE295990T1 (enExample)
AU (1) AU2002339770B2 (enExample)
CA (1) CA2466267C (enExample)
DE (1) DE60204239T2 (enExample)
ES (1) ES2242883T3 (enExample)
NO (1) NO20015509D0 (enExample)
RU (1) RU2275697C2 (enExample)
WO (1) WO2003041084A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6833593B2 (en) 2001-11-09 2004-12-21 Thin Film Electronics Asa Electrode means, a method for its manufacture, an apparatus comprising the electrode means as well as use of the latter
US6724028B2 (en) 2001-12-10 2004-04-20 Hans Gude Gudesen Matrix-addressable array of integrated transistor/memory structures
US6649504B2 (en) 2001-12-14 2003-11-18 Thin Film Electronics Asa Method for fabricating high aspect ratio electrodes
NO321280B1 (no) 2004-07-22 2006-04-18 Thin Film Electronics Asa Organisk, elektronisk krets og fremgangsmate til dens fremstilling
US7808024B2 (en) * 2004-09-27 2010-10-05 Intel Corporation Ferroelectric polymer memory module
WO2014158187A1 (en) * 2013-03-29 2014-10-02 Applied Materials, Inc. Substrate imprinted with a pattern for forming isolated device regions
US10199386B2 (en) * 2015-07-23 2019-02-05 Toshiba Memory Corporation Semiconductor memory device and method for manufacturing same
KR102408494B1 (ko) * 2019-08-13 2022-06-15 브이메모리 주식회사 전기장을 이용한 전류 경로 제어 방법 및 전자 소자
CN114582632B (zh) * 2022-01-11 2024-05-17 华东师范大学 一种应用于动态目标提取的铁电电容阵列及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4952031A (en) * 1987-06-19 1990-08-28 Victor Company Of Japan, Ltd. Liquid crystal display device
US5017515A (en) * 1989-10-02 1991-05-21 Texas Instruments Incorporated Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
JPH07106450A (ja) * 1993-10-08 1995-04-21 Olympus Optical Co Ltd 強誘電体ゲートトランジスタメモリ
NO972803D0 (no) * 1997-06-17 1997-06-17 Opticom As Elektrisk adresserbar logisk innretning, fremgangsmåte til elektrisk adressering av samme og anvendelse av innretning og fremgangsmåte
DE69739045D1 (de) * 1997-08-27 2008-11-27 St Microelectronics Srl Herstellungsverfahren für elektronische Speicherbauelemente mit virtueller Masse
US6072716A (en) * 1999-04-14 2000-06-06 Massachusetts Institute Of Technology Memory structures and methods of making same
US6473388B1 (en) * 2000-08-31 2002-10-29 Hewlett Packard Company Ultra-high density information storage device based on modulated cathodoconductivity

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