AU2002339770B2 - Electrodes, method and apparatus for memory structure - Google Patents

Electrodes, method and apparatus for memory structure Download PDF

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Publication number
AU2002339770B2
AU2002339770B2 AU2002339770A AU2002339770A AU2002339770B2 AU 2002339770 B2 AU2002339770 B2 AU 2002339770B2 AU 2002339770 A AU2002339770 A AU 2002339770A AU 2002339770 A AU2002339770 A AU 2002339770A AU 2002339770 B2 AU2002339770 B2 AU 2002339770B2
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AU
Australia
Prior art keywords
electrodes
electrode
layer
thin film
electrode means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU2002339770A
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English (en)
Other versions
AU2002339770A1 (en
Inventor
Hans Gude Gudesen
Geirr I. Leistad
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ensurge Micropower ASA
Original Assignee
Thin Film Electronics ASA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics ASA filed Critical Thin Film Electronics ASA
Publication of AU2002339770A1 publication Critical patent/AU2002339770A1/en
Application granted granted Critical
Publication of AU2002339770B2 publication Critical patent/AU2002339770B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B51/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors
    • H10B51/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/202—Integrated devices comprising a common active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)
  • Cold Cathode And The Manufacture (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Electrolytic Production Of Metals (AREA)
  • Liquid Crystal (AREA)
AU2002339770A 2001-11-09 2002-11-08 Electrodes, method and apparatus for memory structure Ceased AU2002339770B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NO20015509 2001-11-09
NO20015509A NO20015509D0 (no) 2001-11-09 2001-11-09 Elektrodeanordning, fremgangsmåte til dets fremstilling, apparat omfattende elektrodeanordningene, samt bruk av sistnevnte
PCT/NO2002/000414 WO2003041084A1 (en) 2001-11-09 2002-11-08 Electrodes, method and apparatus for memory structure

Publications (2)

Publication Number Publication Date
AU2002339770A1 AU2002339770A1 (en) 2003-07-24
AU2002339770B2 true AU2002339770B2 (en) 2006-01-05

Family

ID=19913010

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002339770A Ceased AU2002339770B2 (en) 2001-11-09 2002-11-08 Electrodes, method and apparatus for memory structure

Country Status (12)

Country Link
EP (1) EP1446805B8 (enExample)
JP (1) JP2005509282A (enExample)
KR (1) KR100577544B1 (enExample)
CN (1) CN1582481A (enExample)
AT (1) ATE295990T1 (enExample)
AU (1) AU2002339770B2 (enExample)
CA (1) CA2466267C (enExample)
DE (1) DE60204239T2 (enExample)
ES (1) ES2242883T3 (enExample)
NO (1) NO20015509D0 (enExample)
RU (1) RU2275697C2 (enExample)
WO (1) WO2003041084A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6833593B2 (en) 2001-11-09 2004-12-21 Thin Film Electronics Asa Electrode means, a method for its manufacture, an apparatus comprising the electrode means as well as use of the latter
US6724028B2 (en) 2001-12-10 2004-04-20 Hans Gude Gudesen Matrix-addressable array of integrated transistor/memory structures
US6649504B2 (en) 2001-12-14 2003-11-18 Thin Film Electronics Asa Method for fabricating high aspect ratio electrodes
NO321280B1 (no) 2004-07-22 2006-04-18 Thin Film Electronics Asa Organisk, elektronisk krets og fremgangsmate til dens fremstilling
US7808024B2 (en) * 2004-09-27 2010-10-05 Intel Corporation Ferroelectric polymer memory module
WO2014158187A1 (en) * 2013-03-29 2014-10-02 Applied Materials, Inc. Substrate imprinted with a pattern for forming isolated device regions
US10199386B2 (en) * 2015-07-23 2019-02-05 Toshiba Memory Corporation Semiconductor memory device and method for manufacturing same
KR102408494B1 (ko) * 2019-08-13 2022-06-15 브이메모리 주식회사 전기장을 이용한 전류 경로 제어 방법 및 전자 소자
CN114582632B (zh) * 2022-01-11 2024-05-17 华东师范大学 一种应用于动态目标提取的铁电电容阵列及其制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017515A (en) * 1989-10-02 1991-05-21 Texas Instruments Incorporated Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
WO1998058383A2 (en) * 1997-06-17 1998-12-23 Thin Film Electronics Asa Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method
US6072716A (en) * 1999-04-14 2000-06-06 Massachusetts Institute Of Technology Memory structures and methods of making same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4952031A (en) * 1987-06-19 1990-08-28 Victor Company Of Japan, Ltd. Liquid crystal display device
JPH07106450A (ja) * 1993-10-08 1995-04-21 Olympus Optical Co Ltd 強誘電体ゲートトランジスタメモリ
DE69739045D1 (de) * 1997-08-27 2008-11-27 St Microelectronics Srl Herstellungsverfahren für elektronische Speicherbauelemente mit virtueller Masse
US6473388B1 (en) * 2000-08-31 2002-10-29 Hewlett Packard Company Ultra-high density information storage device based on modulated cathodoconductivity

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017515A (en) * 1989-10-02 1991-05-21 Texas Instruments Incorporated Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
WO1998058383A2 (en) * 1997-06-17 1998-12-23 Thin Film Electronics Asa Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method
US6072716A (en) * 1999-04-14 2000-06-06 Massachusetts Institute Of Technology Memory structures and methods of making same

Also Published As

Publication number Publication date
CN1582481A (zh) 2005-02-16
RU2275697C2 (ru) 2006-04-27
DE60204239T2 (de) 2006-01-26
CA2466267A1 (en) 2003-05-15
ATE295990T1 (de) 2005-06-15
EP1446805A1 (en) 2004-08-18
DE60204239D1 (de) 2005-06-23
RU2004116275A (ru) 2005-10-27
ES2242883T3 (es) 2005-11-16
NO20015509D0 (no) 2001-11-09
EP1446805B8 (en) 2006-06-14
KR20040063929A (ko) 2004-07-14
JP2005509282A (ja) 2005-04-07
KR100577544B1 (ko) 2006-05-10
CA2466267C (en) 2006-05-23
WO2003041084A1 (en) 2003-05-15
EP1446805B1 (en) 2005-05-18

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MK14 Patent ceased section 143(a) (annual fees not paid) or expired