JP2005333107A - 半導体装置、画像表示装置および半導体装置の製造方法 - Google Patents

半導体装置、画像表示装置および半導体装置の製造方法 Download PDF

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Publication number
JP2005333107A
JP2005333107A JP2005037949A JP2005037949A JP2005333107A JP 2005333107 A JP2005333107 A JP 2005333107A JP 2005037949 A JP2005037949 A JP 2005037949A JP 2005037949 A JP2005037949 A JP 2005037949A JP 2005333107 A JP2005333107 A JP 2005333107A
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Japan
Prior art keywords
region
impurity
impurity region
semiconductor layer
forming
Prior art date
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Pending
Application number
JP2005037949A
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English (en)
Japanese (ja)
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JP2005333107A5 (enExample
Inventor
Yoshihiko Toyoda
吉彦 豊田
Takao Sakamoto
孝雄 坂本
Kazuyuki Sugahara
和之 須賀原
Naoki Nakagawa
直紀 中川
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2005037949A priority Critical patent/JP2005333107A/ja
Priority to US11/109,818 priority patent/US20050253195A1/en
Publication of JP2005333107A publication Critical patent/JP2005333107A/ja
Publication of JP2005333107A5 publication Critical patent/JP2005333107A5/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0221Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2005037949A 2004-04-21 2005-02-15 半導体装置、画像表示装置および半導体装置の製造方法 Pending JP2005333107A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005037949A JP2005333107A (ja) 2004-04-21 2005-02-15 半導体装置、画像表示装置および半導体装置の製造方法
US11/109,818 US20050253195A1 (en) 2004-04-21 2005-04-20 Semiconductor device and image display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004125489 2004-04-21
JP2005037949A JP2005333107A (ja) 2004-04-21 2005-02-15 半導体装置、画像表示装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2005333107A true JP2005333107A (ja) 2005-12-02
JP2005333107A5 JP2005333107A5 (enExample) 2007-02-15

Family

ID=35308599

Family Applications (1)

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JP2005037949A Pending JP2005333107A (ja) 2004-04-21 2005-02-15 半導体装置、画像表示装置および半導体装置の製造方法

Country Status (2)

Country Link
US (1) US20050253195A1 (enExample)
JP (1) JP2005333107A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010245484A (ja) * 2009-03-17 2010-10-28 Ricoh Co Ltd Mosトランジスタおよび該mosトランジスタを内蔵した半導体装置ならびに該半導体装置を用いた電子機器
JP2015005728A (ja) * 2013-06-21 2015-01-08 上海和輝光電有限公司Everdisplay Optronics (Shanghai) Limited 薄膜トランジスタ
JPWO2016175086A1 (ja) * 2015-04-28 2018-02-01 シャープ株式会社 半導体装置及びその製造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005311037A (ja) * 2004-04-21 2005-11-04 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2006269808A (ja) * 2005-03-24 2006-10-05 Mitsubishi Electric Corp 半導体装置および画像表示装置
US20070052021A1 (en) * 2005-08-23 2007-03-08 Semiconductor Energy Laboratory Co., Ltd. Transistor, and display device, electronic device, and semiconductor device using the same
KR102181301B1 (ko) 2009-07-18 2020-11-20 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치 제조 방법
GB2524486A (en) * 2014-03-24 2015-09-30 Cambridge Silicon Radio Ltd Ultra low power transistor for 40nm processes
JPWO2015151337A1 (ja) * 2014-03-31 2017-04-13 株式会社東芝 薄膜トランジスタ、半導体装置及び薄膜トランジスタの製造方法
CN106611764B (zh) * 2015-10-27 2019-12-10 群创光电股份有限公司 显示设备

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000332257A (ja) * 1999-03-12 2000-11-30 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2002190479A (ja) * 2000-09-22 2002-07-05 Semiconductor Energy Lab Co Ltd 半導体表示装置及びその作製方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6306694B1 (en) * 1999-03-12 2001-10-23 Semiconductor Energy Laboratory Co., Ltd. Process of fabricating a semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000332257A (ja) * 1999-03-12 2000-11-30 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2002190479A (ja) * 2000-09-22 2002-07-05 Semiconductor Energy Lab Co Ltd 半導体表示装置及びその作製方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010245484A (ja) * 2009-03-17 2010-10-28 Ricoh Co Ltd Mosトランジスタおよび該mosトランジスタを内蔵した半導体装置ならびに該半導体装置を用いた電子機器
JP2015005728A (ja) * 2013-06-21 2015-01-08 上海和輝光電有限公司Everdisplay Optronics (Shanghai) Limited 薄膜トランジスタ
US9401376B2 (en) 2013-06-21 2016-07-26 Everdisplay Optronics (Shanghai) Limited Thin film transistor and active matrix organic light emitting diode assembly and method for manufacturing the same
JPWO2016175086A1 (ja) * 2015-04-28 2018-02-01 シャープ株式会社 半導体装置及びその製造方法
US10468533B2 (en) 2015-04-28 2019-11-05 Sharp Kabushiki Kaisha Semiconductor device and method for manufacturing same

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Publication number Publication date
US20050253195A1 (en) 2005-11-17

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