JP2005175489A - 分離された電源リングを有する低電力半導体チップとその製造及び制御方法 - Google Patents
分離された電源リングを有する低電力半導体チップとその製造及び制御方法 Download PDFInfo
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- JP2005175489A JP2005175489A JP2004356040A JP2004356040A JP2005175489A JP 2005175489 A JP2005175489 A JP 2005175489A JP 2004356040 A JP2004356040 A JP 2004356040A JP 2004356040 A JP2004356040 A JP 2004356040A JP 2005175489 A JP2005175489 A JP 2005175489A
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- G06F1/32—Means for saving power
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- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
【解決手段】 外部から電源が供給される電極パッドと、機能により少なくとも一つの入出力パッドを含むようにグループ化された複数のパッドグループと、電極パッドから供給された電源を複数のパッドグループのそれぞれに連結する分離された電源リングと、パッドグループの入出力パッドについての使用の有無を判断してパッドグループについて個別的にオン/オフ制御を遂行するスイッチ制御部と、を含む。パッドグループは、一つの電極パッドにより供給された電源を共有するパッドを含む。スイッチ制御部は、複数のパッドグループのそれぞれについて使用の有無を判断し、判断の結果、使用されないパッドグループの入出力パッドをオフさせる。これにより、ディジタルパッド電源を使用有無状況によりオン/オフ制御して、半導体集積回路の静的電流による電力消費を減らすことができる。
【選択図】 図2
Description
14 多数のリード
16 タイバー
18 半導体チップ
20,20a ワイヤー
22 ボンドフィンガー
24 入出力及び電源パッド
26 リードフレーム
28 電源金属板
Claims (8)
- 半導体チップであって、
外部から電源が供給される電極パッドと、
機能により少なくとも一つの入出力パッドを含むようにグループ化された複数のパッドグループと、
前記電極パッドから供給された電源を前記複数のパッドグループのそれぞれに連結する分離された電源リングと、
前記パッドグループの入出力パッドについての使用の有無を判断して前記パッドグループについて個別的にオン/オフ制御を実行するスイッチ制御部と、
を含んで構成されることを特徴とする半導体チップ。 - 前記スイッチ制御部は、
前記パッドグループのそれぞれについて使用の有無を判断し、使用されないパッドグループの入出力パッドと当該電源リングとの接続を切ること
を特徴とする請求項1に記載の半導体チップ。 - 前記パッドグループのそれぞれは、
同時に動作する少なくとも一つの入出力パッドでグループ化されること
を特徴とする請求項1に記載の半導体チップ。 - 信号入出力及び電源供給のためのパッドを備える半導体チップの製造方法であって、
入出力パッドを同時に動作する少なくとも一つのパッドをそれぞれ含む複数のパッドグループにグループ化する過程と、
前記複数のパッドグループのそれぞれを個別的にオン/オフ制御することができるように分離された電源リングにそれぞれ連結する過程と、
を含むことを特徴とする前記製造方法。 - 前記グループ化する過程は、
一つの電極パッドにより供給された電源を共有するパッドを少なくとも含むようにグループ化すること
を特徴とする請求項4に記載の前記製造方法。 - 外部から電源が供給される電極パッドと、機能によりグループ化された複数のパッドグループと、前記電極パッドから供給された電源を前記複数のパッドグループのそれぞれに連結する分離された電源リングと、を含む半導体チップの制御方法であって、
前記複数のパッドグループのそれぞれについて使用の有無を判断する過程と、
前記判断結果使用されないパッドグループの入出力パッドをオフさせる過程と、
を特徴とする前記制御方法。 - 前記オフさせる過程は、
前記パッドグループの入出力パッドと当該電源リングとの接続を切ること
を特徴とする請求項6に記載の前記制御方法。 - 前記判断の結果使用されるパッドグループの入出力パッドをオンさせる過程をさらに含むこと
を特徴とする請求項6に記載の前記制御方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030088598A KR100594142B1 (ko) | 2003-12-08 | 2003-12-08 | 분리된 전원 링을 가지는 저전력 반도체 칩과 그 제조 및제어방법 |
Publications (1)
Publication Number | Publication Date |
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JP2005175489A true JP2005175489A (ja) | 2005-06-30 |
Family
ID=34511185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2004356040A Pending JP2005175489A (ja) | 2003-12-08 | 2004-12-08 | 分離された電源リングを有する低電力半導体チップとその製造及び制御方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20050121753A1 (ja) |
EP (1) | EP1542282A1 (ja) |
JP (1) | JP2005175489A (ja) |
KR (1) | KR100594142B1 (ja) |
CN (1) | CN1649153A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010118590A (ja) * | 2008-11-14 | 2010-05-27 | Renesas Technology Corp | 半導体集積回路装置 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1638145A1 (en) * | 2004-09-20 | 2006-03-22 | Infineon Technologies AG | Embedded switchable power ring |
US7075179B1 (en) * | 2004-12-17 | 2006-07-11 | Lsi Logic Corporation | System for implementing a configurable integrated circuit |
TWI358815B (en) * | 2006-09-12 | 2012-02-21 | Chipmos Technologies Inc | Stacked chip package structure with lead-frame hav |
TWI378539B (en) * | 2006-10-26 | 2012-12-01 | Chipmos Technologies Inc | Stacked chip package structure with lead-frame having inner leads with transfer pad |
KR100843441B1 (ko) * | 2007-01-02 | 2008-07-03 | 삼성전기주식회사 | 멀티칩 패키지 |
US9252598B2 (en) * | 2012-01-25 | 2016-02-02 | Microsoft Technology Licensing, Llc | Data plant—a raw material powered data generator |
US9305898B2 (en) | 2014-01-23 | 2016-04-05 | Freescale Semiconductor, Inc. | Semiconductor device with combined power and ground ring structure |
US9177834B2 (en) | 2014-02-19 | 2015-11-03 | Freescale Semiconductor, Inc. | Power bar design for lead frame-based packages |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US6195755B1 (en) * | 1994-08-09 | 2001-02-27 | Larry D. Webster | Nonvolatile power management apparatus for integrated circuit application |
JP3747968B2 (ja) * | 1996-12-16 | 2006-02-22 | 富士通株式会社 | 集積回路装置 |
US6735706B2 (en) * | 2000-12-06 | 2004-05-11 | Lattice Semiconductor Corporation | Programmable power management system and method |
TW571603B (en) * | 2001-10-05 | 2004-01-11 | Silicon Integrated Sys Corp | Circuit substrate |
JP2003188351A (ja) * | 2001-12-17 | 2003-07-04 | Hitachi Ltd | 半導体集積回路 |
JP2003202935A (ja) * | 2002-01-08 | 2003-07-18 | Mitsubishi Electric Corp | 電力管理方式及び電力管理方法 |
-
2003
- 2003-12-08 KR KR1020030088598A patent/KR100594142B1/ko not_active IP Right Cessation
-
2004
- 2004-12-03 US US11/002,316 patent/US20050121753A1/en not_active Abandoned
- 2004-12-08 CN CNA2004101033973A patent/CN1649153A/zh active Pending
- 2004-12-08 JP JP2004356040A patent/JP2005175489A/ja active Pending
- 2004-12-08 EP EP04029114A patent/EP1542282A1/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010118590A (ja) * | 2008-11-14 | 2010-05-27 | Renesas Technology Corp | 半導体集積回路装置 |
Also Published As
Publication number | Publication date |
---|---|
KR100594142B1 (ko) | 2006-06-28 |
CN1649153A (zh) | 2005-08-03 |
KR20050055390A (ko) | 2005-06-13 |
EP1542282A1 (en) | 2005-06-15 |
US20050121753A1 (en) | 2005-06-09 |
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