JP2005150283A - Bgaパッケージ - Google Patents
Bgaパッケージ Download PDFInfo
- Publication number
- JP2005150283A JP2005150283A JP2003383617A JP2003383617A JP2005150283A JP 2005150283 A JP2005150283 A JP 2005150283A JP 2003383617 A JP2003383617 A JP 2003383617A JP 2003383617 A JP2003383617 A JP 2003383617A JP 2005150283 A JP2005150283 A JP 2005150283A
- Authority
- JP
- Japan
- Prior art keywords
- bga package
- pads
- pad
- bypass capacitor
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16265—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19103—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19104—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003383617A JP2005150283A (ja) | 2003-11-13 | 2003-11-13 | Bgaパッケージ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003383617A JP2005150283A (ja) | 2003-11-13 | 2003-11-13 | Bgaパッケージ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005150283A true JP2005150283A (ja) | 2005-06-09 |
| JP2005150283A5 JP2005150283A5 (enExample) | 2006-11-24 |
Family
ID=34692286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003383617A Pending JP2005150283A (ja) | 2003-11-13 | 2003-11-13 | Bgaパッケージ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2005150283A (enExample) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007173669A (ja) * | 2005-12-26 | 2007-07-05 | Murata Mfg Co Ltd | 多層回路基板及びicパッケージ |
| JP2007250928A (ja) * | 2006-03-17 | 2007-09-27 | Mitsubishi Electric Corp | 多層プリント配線板 |
| US9847299B2 (en) | 2014-09-30 | 2017-12-19 | Murata Manufacturing Co., Ltd. | Semiconductor package and mounting structure thereof |
| JP2020520121A (ja) * | 2017-05-15 | 2020-07-02 | エイブイエックス コーポレイション | 積層コンデンサ、および積層コンデンサを含む回路板 |
| WO2020250947A1 (ja) * | 2019-06-14 | 2020-12-17 | キヤノン株式会社 | 半導体モジュールの製造方法、電子機器の製造方法、半導体モジュール、及び電子機器 |
| JP2020205409A (ja) * | 2019-06-14 | 2020-12-24 | キヤノン株式会社 | 半導体モジュールの製造方法、電子機器の製造方法、半導体モジュール、及び電子機器 |
| WO2023022047A1 (ja) * | 2021-08-20 | 2023-02-23 | 株式会社村田製作所 | 高周波モジュール |
| JP2023531696A (ja) * | 2020-07-01 | 2023-07-25 | インターナショナル・ビジネス・マシーンズ・コーポレーション | はんだカラムグリッドアレイコンデンサ |
| US12387877B2 (en) | 2021-07-08 | 2025-08-12 | KYOCERA AVX Components Corporation | Multilayer ceramic capacitor |
-
2003
- 2003-11-13 JP JP2003383617A patent/JP2005150283A/ja active Pending
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007173669A (ja) * | 2005-12-26 | 2007-07-05 | Murata Mfg Co Ltd | 多層回路基板及びicパッケージ |
| JP2007250928A (ja) * | 2006-03-17 | 2007-09-27 | Mitsubishi Electric Corp | 多層プリント配線板 |
| US9847299B2 (en) | 2014-09-30 | 2017-12-19 | Murata Manufacturing Co., Ltd. | Semiconductor package and mounting structure thereof |
| JP2023093671A (ja) * | 2017-05-15 | 2023-07-04 | キョーセラ・エイブイエックス・コンポーネンツ・コーポレーション | 積層コンデンサ、および積層コンデンサを含む回路板 |
| US11636978B2 (en) | 2017-05-15 | 2023-04-25 | KYOCERA AVX Components Corporation | Multilayer capacitor and circuit board containing the same |
| US12112891B2 (en) | 2017-05-15 | 2024-10-08 | KYOCERA AVX Components Corporation | Multilayer capacitor and circuit board containing the same |
| JP2020520121A (ja) * | 2017-05-15 | 2020-07-02 | エイブイエックス コーポレイション | 積層コンデンサ、および積層コンデンサを含む回路板 |
| JP2020520122A (ja) * | 2017-05-15 | 2020-07-02 | エイブイエックス コーポレイション | 積層コンデンサ、および積層コンデンサを含む回路板 |
| JP2023093670A (ja) * | 2017-05-15 | 2023-07-04 | キョーセラ・エイブイエックス・コンポーネンツ・コーポレーション | 積層コンデンサ、および積層コンデンサを含む回路板 |
| CN114145079A (zh) * | 2019-06-14 | 2022-03-04 | 佳能株式会社 | 半导体模块制造方法、电子装置制造方法、半导体模块和电子装置 |
| US20220102330A1 (en) * | 2019-06-14 | 2022-03-31 | Canon Kabushiki Kaisha | Semiconductor module manufacturing method, electronic equipment manufacturing method, semiconductor module, and electronic equipment |
| JP2020205409A (ja) * | 2019-06-14 | 2020-12-24 | キヤノン株式会社 | 半導体モジュールの製造方法、電子機器の製造方法、半導体モジュール、及び電子機器 |
| WO2020250947A1 (ja) * | 2019-06-14 | 2020-12-17 | キヤノン株式会社 | 半導体モジュールの製造方法、電子機器の製造方法、半導体モジュール、及び電子機器 |
| JP7592402B2 (ja) | 2019-06-14 | 2024-12-02 | キヤノン株式会社 | 半導体モジュールの製造方法、電子機器の製造方法、半導体モジュール、及び電子機器 |
| JP2023531696A (ja) * | 2020-07-01 | 2023-07-25 | インターナショナル・ビジネス・マシーンズ・コーポレーション | はんだカラムグリッドアレイコンデンサ |
| JP7566054B2 (ja) | 2020-07-01 | 2024-10-11 | インターナショナル・ビジネス・マシーンズ・コーポレーション | はんだカラムグリッドアレイコンデンサ |
| US12387877B2 (en) | 2021-07-08 | 2025-08-12 | KYOCERA AVX Components Corporation | Multilayer ceramic capacitor |
| WO2023022047A1 (ja) * | 2021-08-20 | 2023-02-23 | 株式会社村田製作所 | 高周波モジュール |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20061005 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061005 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080501 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090714 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20091215 |