JP2004519860A - 低ループ高の接着配線接続部を備えるチップモジュール - Google Patents

低ループ高の接着配線接続部を備えるチップモジュール Download PDF

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Publication number
JP2004519860A
JP2004519860A JP2002576011A JP2002576011A JP2004519860A JP 2004519860 A JP2004519860 A JP 2004519860A JP 2002576011 A JP2002576011 A JP 2002576011A JP 2002576011 A JP2002576011 A JP 2002576011A JP 2004519860 A JP2004519860 A JP 2004519860A
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chip
layer
connection
support means
connection layer
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JP2002576011A
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スコベル　ヨアチム　エイチ
トス　マルカス
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Abstract

チップモジュール（３）を備えたデータ担体（１）において、チップモジュール（３）のチップ（５）は、そのチップ接続層（８）の領域において、平坦な金属層（１０）により形成されボンディングワイヤ（１１）の楔形に接着された端部（１３）が接続されたそれぞれの配線接続手段を備える。

Description

【０００１】
【発明の属する技術分野】
本発明は、チップモジュール及びチップモジュールを備えるデータ担体に関する。かかるチップモジュールは、支持手段接続層を備える支持手段とチップ接続層を備えるチップとを有するものであり、これら接続層は、接着ワイヤにより互いに接続され、各チップ接続層には、接着ワイヤの楔形に接着される端部が接続される配線接続手段が設けられるものである。
【０００２】
【従来の技術】
上述したようなチップモジュールは、特許文献の欧州特許出願公開第ＥＰ０３９７４２６Ａ２号公報に描かれかつ説明されている。この既知のチップモジュールにおいては、接着ワイヤの球状に接着された端部が配線接続手段として各チップ接続層上に設けられており、これはよく技術的言葉として「ネイルボンド」と呼ばれている。かかる「ネイルボンド」のなされたチップ接続層の平面図において、当該「ネイルボンド」はその下に延びているチップ接続層よりも寸法が小さい。さらに、その下に延びているチップ接続層に垂直な方向において当該「ネイルボンド」は比較的に大きな寸法すなわち比較的に大なる高さを有している。このような「ネイルボンド」の小さい領域は、接着ワイヤの楔形に接着された端部を「ネイルボンド」に接着するボンディング処理において、当該接続を確実になすためにその接着ワイヤを非常に正確に当該「ネイルボンド」に送らなければならない、という問題が伴う。残念ながら、かかる「ネイルボンド」の大なる高さは、例えば、特許文献の上記第ＥＰ０３９７４２６Ａ２号公報に記述されているようにプラスチックスリーブの中にチップモジュールを埋め込むことにより形成可能な、当該チップモジュールを含むデータ担体の、或いは当該チップモジュールの全体の高さに好ましくない影響を及ぼす。このような「ネイルボンド」の組み立ては、その「ネイルボンド」がワイヤボンデリング法の仕様で形成されなければならないので、ワイヤボンデリング法の比較的長い期間を必要とする。
【０００３】
【発明が解決しようとする課題】
本発明の目的は、上述した欠点を回避し、チップモジュールを改良し、そうしたチップモジュールを備える改良されたデータ担体を実現することである。
【０００４】
【課題を解決するための手段】
上記目的を達成するため、発明の特徴は、本発明によりチップモジュールに施され、本発明によるチップモジュールは、次のように特徴づけられる。すなわち、支持手段及びこの支持手段に接続されたチップを備えるチップモジュールであって、前記チップは、少なくとも１つのチップ接続層を有し、前記支持手段は、少なくとも１つの支持手段接続層を有し、関連づけられる配線接続手段は、前記チップ接続層上に設けられ、前記配線接続手段及び前記支持手段接続層は、接着ワイヤにより互いに接続され、前記接着ワイヤは、第１の接着端部と楔形に接着された第２の接着端部とを有し、前記第１の接着端部は、前記支持手段接続層に接続され、楔形に接着された前記第２の端部は、前記配線接続手段に接続され、前記チップ接続層と平行に延びる平坦金属層は、前記配線接続手段として設けられている、チップモジュールである。
【０００５】
上記目的を達成するため、発明の特徴は、本発明によりデータ担体に施され、本発明によるデータ担体は、次のように特徴づけられる。すなわち、支持手段及びこの支持手段に接続されたチップを備えるチップモジュールであって、前記チップは、少なくとも１つのチップ接続層を有し、前記支持手段は、少なくとも１つの支持手段接続層を有し、関連づけられる配線接続手段は、前記チップ接続層上に設けられ、前記配線接続手段及び前記支持手段接続層は、接着ワイヤにより互いに接続され、前記接着ワイヤは、第１の接着端部と楔形に接着された第２の接着端部とを有し、前記第１の接着端部は、前記支持手段接続層に接続され、楔形に接着された前記第２の端部は、前記配線接続手段に接続され、前記チップ接続層と平行に延びる平坦金属層は、前記配線接続手段として設けられている、チップモジュール、を備えるデータ担体である。
【０００６】
本発明によるこれら特徴を備えることによって、当該接着ワイヤの楔形形状に接着されるべき端部と配線接続手段との間に組み立てられるべき楔形接着（ボンド）は、当該配線接続手段として設けられる金属層へ当該接着ワイヤを送ることについて上述した既知の方策の場合よりも遥かに精度を落とした形で作ることが可能である。さらに、本発明により採用されるステップの結果として、各配線接続手段は、上述した既知の従来技術の場合よりも、配線接続手段の下に延在するチップ接続層に垂直な方向において遥かに少ないスペースで済む。本発明によるチップモジュールにおいては、また本発明によるデータ担体においては、さらに次のような効果がある。すなわち、各配線接続手段は、ワイヤボンディング法に依存しない方法によって組み立てることができ、当該ワイヤボンディング法の前に行われるものであり、これにより、上述した既知のチップモジュールの組み立ての場合よりも相当に短い時間でワイヤボンディング法を行うことができ、この結果、チップモジュールの製造におけるいわゆるスループットすなわち工程期間を当該既知の方法に比べて本発明により十分に短くすることができるのである。
【０００７】
本発明によるチップモジュールにおいて、また本発明によるデータ担体において、チップ接続層上に設けられる金属層は、チップ接続層の適当に寸法合わせされた領域が与えられ、チップ接続層の一部だけをカバーし、このようにするにもかかわらず、楔形に接着されるべき端部を当該配線接続手段として設けられた金属層に送る際に複雑さを伴わないことを確実にする十分大なる領域（面積）をとることになる。但し、請求項２又は請求項５による特徴が追加されたときには、特に有利なものとなることが分かった。したがって、とりうる最も大なる領域（面積）は、当該チップ接続層全体に対する保護機能をも付加的になす金属層について効果的に実現される。
【０００８】
本発明によるチップモジュールにおいて、また本発明によるデータ担体において、当該配線接続手段として設けられる各金属層は、銀又は鈴からなるものとすることができる。但し、当該配線接続手段として設けられる各金属層を金からなるものとすると、特に有効であることが分かった。
【０００９】
上記態様その他の本発明は、以下に記述する代表的実施例から見い出され、これら代表的実施例に基づいて説明される。
【００１０】
【発明の実施の形態】
本発明は、図面に描かれた２つの代表的実施例により以下にさらに詳述されるが、これらに本発明が限定されるものではない。
【００１１】
図１にはデータ担体１が描かれている。データ担体１は、プラスチックインジェクション成形（モールディング）処理を用いて製造されたデータ担体ボディ２を有する。但し、他の知られた方法、例えばいわゆる（積層）ラミネーション処理によりカード状ボディ２を製造することもできる。
【００１２】
データ担体１に収納されるのは、部分的にしか図示されていないデータ担体１のようなチップモジュール３である。チップモジュール３は、チップモジュール３のチップ５のための保持又は支持（ホルダ）手段を形成する支持（サポート）プレート４を有する。チップ５は、具体的には粘着層６により、支持プレート４に結合される。その粘着層６から逸れた側７において、チップ５は２つのチップ接続層８を有するが、図１にはそのうちの一方のチップ接続層８だけが示されている。なお、かかるチップ５は、一般に知られているように３つ以上のチップ接続層を有するものとすることができる。チップモジュール３の場合においては、２つのチップ接続層８を有するチップ５から類推して、支持プレート４は２つの支持プレート接続層９を有し、そのうちの一方の支持手段接続層９のみが図１に描かれている。本例においては、これは必ずしも必須ではないが、支持手段接続層９は、導電体トラックにより実現される伝達コイルの構成要素であり、データ担体１の構成要素であり、適切な通信ステーションを具備したデータ担体１の非接触通信のために設けられている。支持手段接続層９は、いわゆる導電体フレームの断面によっても形成可能でもあり、支持手段接続層９と当該導電体フレームの残りの部分は、１片又は１つの材料、特に金属からなるものとしている。
【００１３】
関連付けられる配線（ワイヤ）接続手段１０は、当該２つのチップ接続層８の各々の上に設けられ、図１によるようにチップモジュール３において特に有効な方法により、関連のチップ接続層８に平行に延び金により効果的に形成される平坦金属層１０によって形成される。２つの配線接続手段１０の各々、すなわち２つの金属層１０の各々は、ボンディング（接着）ワイヤ１１により支持プレート接続層９に接続される。
【００１４】
各ボンディングワイヤ１１は、本例では球状に接着された第１の端部１２と楔形の形態で接着された第２の端部１３とを有する。球状に接着された各第１端部１２は、支持プレート接続層９に接続され、楔形形態に接着された各第２端部１３は、配線接続手段１０すなわち平坦金属層１０に接続される。図１による構成においては、各金属層１０は、その下に延在するチップ接続層８の一部のみ被覆する。
【００１５】
図２に描かれているデータ担体１の場合、各金属層１０は、その下に延びるチップ接続層８を全体的にカバーする。これにより、可能な限り金属層１０を大きくするという利点の他にも、金属層１０がチップ接続層８を効果的に保護するという利点もある。図２によるデータ担体１の改変バージョンにおいては、チップ接続層８の領域を、その上に延びる金属層１０よりも小さくすることができる。これにより、可及的に小さな接続層８で足りるという効果を奏する。また、これにより、できる限り小さなチップ表面による実現形態について効果的となる。チップ接続層８の小さな領域にもかかわらず、チップ接続層８に比べて大きな領域を持つ金属層１０により、ボンディングワイヤ１１との良好な電気的接続が確実となる。
【００１６】
図１及び図２による２つのデータ担体１においては、配線接続手段１０が非常に低い全体の高さを持って構成され、大きな表面領域を有することが効果的に達成される。これにより、出来る限り全体の高さの小さいデータ担体１及び／又はチップモジュール３を実現することについて、また金属層１０の領域において出来る限り複雑さの伴わないように接着することを達成することについて効果的なものとなる。
【００１７】
当業者の間では、上述したようなチップ接続層８はよく「パッド」とも呼ばれ、上述したような金属層１０はよく「直線状壁バンプ」（ｓｔｒａｉｇｈｔ ｗａｌｌ ｂｕｍｐ）又は「直線状壁金バンプ」（ｓｔｒａｉｇｈｔ ｗａｌｌ ｇｏｌｄ ｂｕｍｐ）とも呼ばれる。実際上は、かかるパッドは概ね１．０μｍの厚さを有し、当該直線状壁バンプは、ボンディングワイヤの球状に結合される端部に比し１０．０μｍないし１８．０μｍの範囲の厚さを有し、その球状に結合された端部は、少なくとも３０．０μｍの厚さすなわち高さを有する。これは、本発明による構成により、少なくとも１２．０μｍだけ全体の高さの効果的な縮減が達成されることを意味する。
【図面の簡単な説明】
【図１】本発明の第１の代表的実施例によるデータ担体の概略断面図。
【図２】図１と同様にして本発明の第２の代表的実施例によるデータ担体を示す図。

Claims (6)

  1. 支持手段及びこの支持手段に接続されたチップを備えるチップモジュールであって、
    前記チップは、少なくとも１つのチップ接続層を有し、前記支持手段は、少なくとも１つの支持手段接続層を有し、関連づけられる配線接続手段は、前記チップ接続層上に設けられ、前記配線接続手段及び前記支持手段接続層は、接着ワイヤにより互いに接続され、前記接着ワイヤは、第１の接着端部と楔形に接着された第２の接着端部とを有し、前記第１の接着端部は、前記支持手段接続層に接続され、楔形に接着された前記第２の端部は、前記配線接続手段に接続され、前記チップ接続層と平行に延びる平坦金属層は、前記配線接続手段として設けられている、チップモジュール。
  2. 請求項１に記載のチップモジュールであって、前記チップ接続層上に設けられる前記平坦金属層は、前記チップ接続層を全体的に被覆する、チップモジュール。
  3. 請求項１に記載のチップモジュールであって、前記平坦金属層は金からなる、チップモジュール。
  4. 支持手段及びこの支持手段に接続されたチップを備えるチップモジュールであって、前記チップは、少なくとも１つのチップ接続層を有し、前記支持手段は、少なくとも１つの支持手段接続層を有し、関連づけられる配線接続手段は、前記チップ接続層上に設けられ、前記配線接続手段及び前記支持手段接続層は、接着ワイヤにより互いに接続され、前記接着ワイヤは、第１の接着端部と楔形に接着された第２の接着端部とを有し、前記第１の接着端部は、前記支持手段接続層に接続され、楔形に接着された前記第２の端部は、前記配線接続手段に接続され、前記チップ接続層と平行に延びる平坦金属層は、前記配線接続手段として設けられている、チップモジュール、を備えるデータ担体。
  5. 請求項４に記載のデータ担体であって、前記チップ接続層上に設けられる前記平坦金属層は、前記チップ接続層を全体的に被覆する、データ担体。
  6. 請求項４に記載のデータ担体であって、前記平坦金属層は金からなる、データ担体。
JP2002576011A 2001-03-23 2002-02-18 低ループ高の接着配線接続部を備えるチップモジュール Pending JP2004519860A (ja)

Applications Claiming Priority (2)

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EP01890093 2001-03-23
PCT/IB2002/000486 WO2002078080A1 (en) 2001-03-23 2002-02-18 Chip module with bond-wire connections with small loop height

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Families Citing this family (4)

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Publication number Priority date Publication date Assignee Title
JP3727272B2 (ja) * 2002-01-15 2005-12-14 沖電気工業株式会社 半導体装置及び半導体装置の製造方法
JP2009043793A (ja) * 2007-08-07 2009-02-26 Panasonic Corp 半導体装置、およびその半導体装置の製造方法
US9721872B1 (en) * 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US8963310B2 (en) 2011-08-24 2015-02-24 Tessera, Inc. Low cost hybrid high density package

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249447A (ja) * 1988-05-20 1990-02-19 Hitachi Ltd 半導体装置とその製造方法
JPH01293626A (ja) * 1988-05-23 1989-11-27 Ricoh Co Ltd フレキシブル配線板におけるワイヤボンディング法
JPH0372641A (ja) * 1989-05-09 1991-03-27 Citizen Watch Co Ltd Ｉｃ実装構造及びその実装方法
US4943539A (en) 1989-05-09 1990-07-24 Motorola, Inc. Process for making a multilayer metallization structure
JPH05211192A (ja) * 1991-07-02 1993-08-20 Oki Electric Ind Co Ltd 半導体装置のワイヤボンディング方法
JPH05326601A (ja) * 1992-05-18 1993-12-10 Murata Mfg Co Ltd ワイヤボンディング方法
US5455461A (en) * 1992-09-21 1995-10-03 Fujitsu Limited Semiconductor device having reformed pad
GB2307103B (en) * 1993-06-25 1997-09-17 Mitsubishi Electric Corp Electrode connections for semiconductor devices
KR980005922A (ko) * 1995-06-28 1998-03-30 윌리엄 이. 힐러 낮은 루프 와이어 본딩
US5874354A (en) * 1995-09-26 1999-02-23 Siemens Aktiengesellschaft Method for electrically connecting a semiconductor chip to at least one contact surface and smart card module and smart card produced by the method
WO1998021780A2 (de) * 1996-11-11 1998-05-22 Siemens Aktiengesellschaft Verbindung zwischen zwei kontaktflächen und verfahren zum herstellen einer solchen verbindung
DE19703639A1 (de) * 1997-01-31 1998-08-06 Bosch Gmbh Robert Verfahren zur Herstellung von Bonddrahtverbindungen
JPH1167809A (ja) * 1997-08-26 1999-03-09 Sanyo Electric Co Ltd 半導体装置
JP2000228422A (ja) * 1999-02-05 2000-08-15 Seiko Epson Corp 半導体装置及びその製造方法

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CN100401488C (zh) 2008-07-09
CN1460291A (zh) 2003-12-03
US6593664B2 (en) 2003-07-15
EP1374298A1 (en) 2004-01-02
WO2002078080A1 (en) 2002-10-03

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