JP2004349687A - 抗磁ランダムアクセスメモリ（ｍｒａｍ）装置の製造方法 - Google Patents

抗磁ランダムアクセスメモリ（ｍｒａｍ）装置の製造方法 Download PDF

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Publication number
JP2004349687A
JP2004349687A JP2004123262A JP2004123262A JP2004349687A JP 2004349687 A JP2004349687 A JP 2004349687A JP 2004123262 A JP2004123262 A JP 2004123262A JP 2004123262 A JP2004123262 A JP 2004123262A JP 2004349687 A JP2004349687 A JP 2004349687A
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plasma
substrate
layer
etching
metal
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JP2004349687A5 (enExample
Inventor
Chentsau Ying
エン チェンサウ
Xiaoyi Chen
チェン シャウイー
Chun Yan
ヤン チュン
Ajay Kumar
クマール アジャイ
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Applied Materials Inc
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Applied Materials Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
    • G09B9/00—Simulators for teaching or training purposes
    • G09B9/02—Simulators for teaching or training purposes for teaching control of vehicles or other craft
    • G09B9/04—Simulators for teaching or training purposes for teaching control of vehicles or other craft for teaching control of land vehicles
    • G09B9/042—Simulators for teaching or training purposes for teaching control of vehicles or other craft for teaching control of land vehicles providing simulation in a real vehicle
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y25/00—Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/14—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
    • H01F41/30—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE]
    • H01F41/302—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices
    • H01F41/308—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices lift-off processes, e.g. ion milling, for trimming or patterning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Organic Chemistry (AREA)
  • Theoretical Computer Science (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Educational Technology (AREA)
  • Educational Administration (AREA)
  • Business, Economics & Management (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
JP2004123262A 2003-04-17 2004-04-19 抗磁ランダムアクセスメモリ（ｍｒａｍ）装置の製造方法 Withdrawn JP2004349687A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/418,449 US6841484B2 (en) 2003-04-17 2003-04-17 Method of fabricating a magneto-resistive random access memory (MRAM) device

Publications (2)

Publication Number Publication Date
JP2004349687A true JP2004349687A (ja) 2004-12-09
JP2004349687A5 JP2004349687A5 (enExample) 2007-05-31

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JP2004123262A Withdrawn JP2004349687A (ja) 2003-04-17 2004-04-19 抗磁ランダムアクセスメモリ（ｍｒａｍ）装置の製造方法

Country Status (4)

Country Link
US (1) US6841484B2 (enExample)
EP (1) EP1469511A2 (enExample)
JP (1) JP2004349687A (enExample)
KR (1) KR20040090928A (enExample)

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JP2008264675A (ja) * 2007-04-19 2008-11-06 Tosoh Corp ルテニウムのエッチング用組成物の除害方法
WO2010026703A1 (ja) * 2008-09-02 2010-03-11 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010026704A1 (ja) * 2008-09-04 2010-03-11 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010029701A1 (ja) * 2008-09-09 2010-03-18 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010064564A1 (ja) * 2008-12-01 2010-06-10 キヤノンアネルバ株式会社 磁気抵抗素子、その製造方法、および該製造方法に用いる記憶媒体
JP2011504301A (ja) * 2007-11-20 2011-02-03 クゥアルコム・インコーポレイテッド 磁気トンネル接合構造体を形成する方法
WO2011071028A1 (ja) * 2009-12-08 2011-06-16 株式会社 アルバック 積層電極の加工方法
JP2013512575A (ja) * 2009-11-25 2013-04-11 クアルコム，インコーポレイテッド 磁気トンネル接合デバイス及び製造
WO2016031520A1 (ja) * 2014-08-26 2016-03-03 東京エレクトロン株式会社 被処理体をエッチングする方法
JP2016208031A (ja) * 2015-04-20 2016-12-08 ラム リサーチ コーポレーションＬａｍ Ｒｅｓｅａｒｃｈ Ｃｏｒｐｏｒａｔｉｏｎ Ｍｒａｍスタックをパターニングする乾式プラズマ・エッチング法
US10784086B2 (en) 2015-04-24 2020-09-22 Lam Research Corporation Cobalt etch back
US10832909B2 (en) 2017-04-24 2020-11-10 Lam Research Corporation Atomic layer etch, reactive precursors and energetic sources for patterning applications
US10998187B2 (en) 2017-04-19 2021-05-04 Lam Research Corporation Selective deposition with atomic layer etch reset
US11069535B2 (en) 2015-08-07 2021-07-20 Lam Research Corporation Atomic layer etch of tungsten for enhanced tungsten deposition fill
US11239094B2 (en) 2016-12-19 2022-02-01 Lam Research Corporation Designer atomic layer etching
US11450513B2 (en) 2018-03-30 2022-09-20 Lam Research Corporation Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition

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US6942813B2 (en) * 2003-03-05 2005-09-13 Applied Materials, Inc. Method of etching magnetic and ferroelectric materials using a pulsed bias source
US20040226911A1 (en) * 2003-04-24 2004-11-18 David Dutton Low-temperature etching environment
US20050186690A1 (en) * 2004-02-25 2005-08-25 Megic Corporation Method for improving semiconductor wafer test accuracy
US7153780B2 (en) * 2004-03-24 2006-12-26 Intel Corporation Method and apparatus for self-aligned MOS patterning
CN100438115C (zh) * 2004-12-02 2008-11-26 北京科技大学 一种具有高磁电阻效应的磁性隧道结
US7265404B2 (en) * 2005-08-30 2007-09-04 Magic Technologies, Inc. Bottom conductor for integrated MRAM
US7635546B2 (en) * 2006-09-15 2009-12-22 Applied Materials, Inc. Phase shifting photomask and a method of fabricating thereof
US20100304504A1 (en) * 2009-05-27 2010-12-02 Canon Anelva Corporation Process and apparatus for fabricating magnetic device
JP2010283095A (ja) * 2009-06-04 2010-12-16 Hitachi Ltd 半導体装置の製造方法
US9105569B2 (en) 2010-08-19 2015-08-11 Iii Holdings 1, Llc Method of etching MTJ using CO process chemistries
US8211801B2 (en) 2010-09-02 2012-07-03 United Microelectronics Corp. Method of fabricating complementary metal-oxide-semiconductor (CMOS) device
KR20120058113A (ko) 2010-11-29 2012-06-07 삼성전자주식회사 자기 터널 접합 구조체의 제조 방법 및 이를 이용하는 자기 메모리 소자의 제조 방법
US8642457B2 (en) 2011-03-03 2014-02-04 United Microelectronics Corp. Method of fabricating semiconductor device
US8501634B2 (en) 2011-03-10 2013-08-06 United Microelectronics Corp. Method for fabricating gate structure
US8519487B2 (en) 2011-03-21 2013-08-27 United Microelectronics Corp. Semiconductor device
US8324118B2 (en) 2011-03-28 2012-12-04 United Microelectronics Corp. Manufacturing method of metal gate structure
US8921238B2 (en) 2011-09-19 2014-12-30 United Microelectronics Corp. Method for processing high-k dielectric layer
US8426277B2 (en) 2011-09-23 2013-04-23 United Microelectronics Corp. Semiconductor process
US9000568B2 (en) 2011-09-26 2015-04-07 United Microelectronics Corp. Semiconductor structure and fabrication method thereof
US8802579B2 (en) 2011-10-12 2014-08-12 United Microelectronics Corp. Semiconductor structure and fabrication method thereof
US8440511B1 (en) 2011-11-16 2013-05-14 United Microelectronics Corp. Method for manufacturing multi-gate transistor device
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KR20140013201A (ko) * 2012-07-20 2014-02-05 삼성전자주식회사 반도체 소자의 제조 방법
US8501636B1 (en) 2012-07-24 2013-08-06 United Microelectronics Corp. Method for fabricating silicon dioxide layer
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US8951884B1 (en) 2013-11-14 2015-02-10 United Microelectronics Corp. Method for forming a FinFET structure
US9576811B2 (en) 2015-01-12 2017-02-21 Lam Research Corporation Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)
US10096487B2 (en) 2015-08-19 2018-10-09 Lam Research Corporation Atomic layer etching of tungsten and other metals
US9984858B2 (en) 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
US10236442B2 (en) 2015-10-15 2019-03-19 Samsung Electronics Co., Ltd. Methods of forming an interconnection line and methods of fabricating a magnetic memory device using the same
CN106676532B (zh) * 2015-11-10 2019-04-05 江苏鲁汶仪器有限公司 金属刻蚀装置及方法
US9397287B1 (en) 2015-12-29 2016-07-19 International Business Machines Corporation Magnetic tunnel junction with post-deposition hydrogenation
US10229837B2 (en) 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
US9991128B2 (en) 2016-02-05 2018-06-05 Lam Research Corporation Atomic layer etching in continuous plasma
US10269566B2 (en) 2016-04-29 2019-04-23 Lam Research Corporation Etching substrates using ale and selective deposition
US9837312B1 (en) 2016-07-22 2017-12-05 Lam Research Corporation Atomic layer etching for enhanced bottom-up feature fill
US10858727B2 (en) 2016-08-19 2020-12-08 Applied Materials, Inc. High density, low stress amorphous carbon film, and process and equipment for its deposition
US9997371B1 (en) 2017-04-24 2018-06-12 Lam Research Corporation Atomic layer etch methods and hardware for patterning applications
WO2018231695A1 (en) * 2017-06-13 2018-12-20 Tokyo Electron Limited Process for patterning a magnetic tunnel junction

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JP2008264675A (ja) * 2007-04-19 2008-11-06 Tosoh Corp ルテニウムのエッチング用組成物の除害方法
JP2013243395A (ja) * 2007-11-20 2013-12-05 Qualcomm Inc 磁気トンネル接合構造体を形成する方法
JP2011504301A (ja) * 2007-11-20 2011-02-03 クゥアルコム・インコーポレイテッド 磁気トンネル接合構造体を形成する方法
US9136463B2 (en) 2007-11-20 2015-09-15 Qualcomm Incorporated Method of forming a magnetic tunnel junction structure
WO2010026703A1 (ja) * 2008-09-02 2010-03-11 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010026704A1 (ja) * 2008-09-04 2010-03-11 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010029701A1 (ja) * 2008-09-09 2010-03-18 キヤノンアネルバ株式会社 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体
WO2010064564A1 (ja) * 2008-12-01 2010-06-10 キヤノンアネルバ株式会社 磁気抵抗素子、その製造方法、および該製造方法に用いる記憶媒体
JPWO2010064564A1 (ja) * 2008-12-01 2012-05-10 キヤノンアネルバ株式会社 磁気抵抗素子、その製造方法、および該製造方法に用いる記憶媒体
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
JP2013512575A (ja) * 2009-11-25 2013-04-11 クアルコム，インコーポレイテッド 磁気トンネル接合デバイス及び製造
US8837208B2 (en) 2009-11-25 2014-09-16 Qualcomm Incorporated Magnetic tunnel junction device with diffusion barrier layer
US8912012B2 (en) 2009-11-25 2014-12-16 Qualcomm Incorporated Magnetic tunnel junction device and fabrication
WO2011071028A1 (ja) * 2009-12-08 2011-06-16 株式会社 アルバック 積層電極の加工方法
JP5587911B2 (ja) * 2009-12-08 2014-09-10 株式会社アルバック 積層電極の加工方法
WO2016031520A1 (ja) * 2014-08-26 2016-03-03 東京エレクトロン株式会社 被処理体をエッチングする方法
JP2016046470A (ja) * 2014-08-26 2016-04-04 東京エレクトロン株式会社 被処理体をエッチングする方法
JP2016208031A (ja) * 2015-04-20 2016-12-08 ラム リサーチ コーポレーションＬａｍ Ｒｅｓｅａｒｃｈ Ｃｏｒｐｏｒａｔｉｏｎ Ｍｒａｍスタックをパターニングする乾式プラズマ・エッチング法
US10784086B2 (en) 2015-04-24 2020-09-22 Lam Research Corporation Cobalt etch back
US11069535B2 (en) 2015-08-07 2021-07-20 Lam Research Corporation Atomic layer etch of tungsten for enhanced tungsten deposition fill
US11239094B2 (en) 2016-12-19 2022-02-01 Lam Research Corporation Designer atomic layer etching
US11721558B2 (en) 2016-12-19 2023-08-08 Lam Research Corporation Designer atomic layer etching
US10998187B2 (en) 2017-04-19 2021-05-04 Lam Research Corporation Selective deposition with atomic layer etch reset
US10832909B2 (en) 2017-04-24 2020-11-10 Lam Research Corporation Atomic layer etch, reactive precursors and energetic sources for patterning applications
US11450513B2 (en) 2018-03-30 2022-09-20 Lam Research Corporation Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials

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Publication number Publication date
EP1469511A2 (en) 2004-10-20
US20040209476A1 (en) 2004-10-21
US6841484B2 (en) 2005-01-11
KR20040090928A (ko) 2004-10-27

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