JP2004310700A5 - - Google Patents
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- JP2004310700A5 JP2004310700A5 JP2003129584A JP2003129584A JP2004310700A5 JP 2004310700 A5 JP2004310700 A5 JP 2004310700A5 JP 2003129584 A JP2003129584 A JP 2003129584A JP 2003129584 A JP2003129584 A JP 2003129584A JP 2004310700 A5 JP2004310700 A5 JP 2004310700A5
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Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003129584A JP4505195B2 (ja) | 2003-04-01 | 2003-04-01 | メモリデバイスにおいてデータを反転させるための方法および装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003129584A JP4505195B2 (ja) | 2003-04-01 | 2003-04-01 | メモリデバイスにおいてデータを反転させるための方法および装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010048024A Division JP5726425B2 (ja) | 2010-03-04 | 2010-03-04 | メモリデバイスにおいてデータを反転させるための方法および装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2004310700A JP2004310700A (ja) | 2004-11-04 |
JP2004310700A5 true JP2004310700A5 (ja) | 2009-09-24 |
JP4505195B2 JP4505195B2 (ja) | 2010-07-21 |
Family
ID=33474699
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003129584A Expired - Lifetime JP4505195B2 (ja) | 2003-04-01 | 2003-04-01 | メモリデバイスにおいてデータを反転させるための方法および装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4505195B2 (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100546335B1 (ko) * | 2003-07-03 | 2006-01-26 | 삼성전자주식회사 | 데이터 반전 스킴을 가지는 반도체 장치 |
US9262326B2 (en) * | 2006-08-14 | 2016-02-16 | Qualcomm Incorporated | Method and apparatus to enable the cooperative signaling of a shared bus interrupt in a multi-rank memory subsystem |
JP2008276343A (ja) * | 2007-04-26 | 2008-11-13 | Nec Electronics Corp | 情報処理装置 |
US7783846B2 (en) * | 2007-08-09 | 2010-08-24 | International Business Machines Corporation | Method, apparatus and computer program product providing energy reduction when storing data in a memory |
KR100954109B1 (ko) * | 2008-08-29 | 2010-04-23 | 주식회사 하이닉스반도체 | 데이터 입력회로 및 이를 포함하는 반도체 메모리장치 |
KR101039862B1 (ko) * | 2008-11-11 | 2011-06-13 | 주식회사 하이닉스반도체 | 클럭킹 모드를 구비하는 반도체 메모리장치 및 이의 동작방법 |
US8260992B2 (en) * | 2010-04-12 | 2012-09-04 | Advanced Micro Devices, Inc. | Reducing simultaneous switching outputs using data bus inversion signaling |
WO2012141161A1 (ja) * | 2011-04-12 | 2012-10-18 | ルネサスエレクトロニクス株式会社 | 半導体記憶回路、半導体記憶回路の動作方法、及び半導体記憶回路の設計方法 |
US9864536B2 (en) * | 2013-10-24 | 2018-01-09 | Qualcomm Incorporated | System and method for conserving power consumption in a memory system |
WO2015181933A1 (ja) * | 2014-05-29 | 2015-12-03 | 株式会社日立製作所 | メモリモジュールとメモリバスシステム及び計算機システム |
US10747909B2 (en) * | 2018-09-25 | 2020-08-18 | Northrop Grumman Systems Corporation | System architecture to mitigate memory imprinting |
US10754993B2 (en) * | 2018-09-25 | 2020-08-25 | Northrop Grumman Systems Corporation | Architecture to mitigate configuration memory imprinting in programmable logic |
CN110688813B (zh) * | 2019-08-19 | 2023-04-25 | 青芯半导体科技(上海)有限公司 | 降低芯片逻辑翻转率的方法及结构 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08314589A (ja) * | 1995-05-15 | 1996-11-29 | Hitachi Ltd | 信号伝達装置 |
JP3346999B2 (ja) * | 1996-01-08 | 2002-11-18 | 株式会社東芝 | 入出力装置 |
KR100272171B1 (ko) * | 1998-08-19 | 2000-12-01 | 윤종용 | 저전류 동작 출력 회로 및 입출력 시스템과이를 이용한 데이터입출력 방법 |
JP3259696B2 (ja) * | 1998-10-27 | 2002-02-25 | 日本電気株式会社 | 同期型半導体記憶装置 |
JP4279404B2 (ja) * | 1999-06-17 | 2009-06-17 | 富士通マイクロエレクトロニクス株式会社 | 半導体記憶装置およびこの半導体記憶装置の試験方法 |
JP4025002B2 (ja) * | 2000-09-12 | 2007-12-19 | 株式会社東芝 | 半導体記憶装置 |
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2003
- 2003-04-01 JP JP2003129584A patent/JP4505195B2/ja not_active Expired - Lifetime