JP2004273614A - Semiconductor device and its fabricating process - Google Patents

Semiconductor device and its fabricating process Download PDF

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Publication number
JP2004273614A
JP2004273614A JP2003059905A JP2003059905A JP2004273614A JP 2004273614 A JP2004273614 A JP 2004273614A JP 2003059905 A JP2003059905 A JP 2003059905A JP 2003059905 A JP2003059905 A JP 2003059905A JP 2004273614 A JP2004273614 A JP 2004273614A
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Prior art keywords
semiconductor
conductive
layer
electrode
conductive layer
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JP2003059905A
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JP4166105B2 (en
Inventor
Tatsuya Fujita
Masashi Kawasaki
Hisao Ochi
Hideo Ono
Toshinori Sugihara
英男 大野
雅司 川崎
利典 杉原
達也 藤田
久雄 越智
Original Assignee
Masashi Kawasaki
Hideo Ono
Sharp Corp
シャープ株式会社
英男 大野
雅司 川崎
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which a semiconductor layer is formed of ZnO and aluminium is used as the material of electrode and interconnect line. <P>SOLUTION: The semiconductor device comprises a substrate 1, at least one electrode supported by the substrate 1, and a semiconductor layer (ZnO) 4 touching the upper surface of the electrode at least partially. The electrode comprises a first conductive layer 2 of aluminium, a second conductive layer 3 formed of a material (Ti, or the like) causing less electrolytic corrosion reaction than aluminium between the upper surface of the first conductive layer 2 and the semiconductor layer 4, and an insulating protective layer 7 located between the lower surface of the semiconductor layer 4 and the side face of the first conductive layer 2. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same.
[0002]
[Prior art]
A semiconductor portion of a thin film transistor used for a display panel of a liquid crystal display device is usually formed of amorphous silicon (a-Si) or polycrystalline silicon (poly-Si).
[0003]
Since these semiconductor materials absorb visible light, electron-hole pairs are formed in the semiconductor by light irradiation, and the transistor characteristics deteriorate. Specifically, even when the transistor is off, carriers are generated in the channel region of the semiconductor layer by light irradiation, so that a current flows between the source region and the drain region. The current flowing through the transistor when the transistor is off is called “off-leakage current”. If this value is large, there is a problem that the display panel does not operate normally. Therefore, a pattern of a light-shielding film is formed so that light does not irradiate the semiconductor layer. However, forming a pattern of the light-shielding film requires a deposition step of the light-shielding film and a photolithography / etching step, which complicates the process.
[0004]
In order to solve such a problem, in recent years, a transparent transistor formed from zinc oxide (ZnO) or a compound semiconductor containing ZnO as a main component, which is a direct transition type semiconductor having a wide band gap of 3.4 eV. Is attracting attention. Such a transparent transistor has the advantage that the band gap of the semiconductor is larger than the light energy in the visible light band and does not absorb visible light, so that the off-leak current does not increase even when irradiated with light. I have.
[0005]
A staggered thin film transistor using ZnO for a semiconductor layer is disclosed in, for example, Patent Document 1. A configuration of a staggered thin film transistor using ZnO for a semiconductor layer will be described with reference to FIG.
[0006]
The thin film transistor of FIG. 1 has a source electrode 20 a and a drain electrode 20 b formed on an insulating substrate 1, a ZnO layer 4 arranged to be in contact with the source / drain electrodes 20 a, 20 b, and a stack on the ZnO layer 4. The gate insulating layer 5 and the gate electrode 6 are provided.
[0007]
This thin film transistor has a staggered configuration having source / drain electrodes 20a and 20b below the ZnO layer 4 and a gate electrode 6 above the ZnO layer 4. In order to form such a staggered thin film transistor, a step of patterning a source / drain electrode material film and a step of patterning a laminate of a ZnO film, a gate insulating material film, and a gate electrode material film are necessary. The mask alignment required in the photolithography process for this is at least twice, and a reduction in manufacturing cost can be expected.
[0008]
On the other hand, with the recent increase in size and definition of display panels, as the material of the source / drain electrodes 20a and 20b and the source bus wiring formed integrally with the source electrode 20a, a metal having lower electric resistance is used. Is required. For this reason, attention has been paid to aluminum (Al) or an Al alloy containing Al as a main component, which has a lower specific resistance than a high melting point metal such as Ta which has been widely used in the past.
[0009]
[Patent Document 1]
JP 2000-150900 A
[0010]
[Problems to be solved by the invention]
However, according to the study of the present inventor, when Al is used as the conductive material for the source / drain electrodes 20a and 20b of the staggered thin film transistor shown in FIG. 1, the source / drain electrodes 20a and 20b and the ZnO layer 4 It has been found that defects and defects such as partial omissions occur in the source / drain electrodes 20a and 20b at the contact portions.
[0011]
Such defects and defects were caused by contact of the thin film transistor with moisture in a solution containing an electrolyte such as a developer or in the air. For this reason, it is considered that a local battery reaction occurs at a contact portion between the source / drain electrodes 20a and 20b and the ZnO layer 4, and as a result, an electrolytic corrosion reaction proceeds to cause a failure such as disconnection.
[0012]
The present invention has been made in view of the above circumstances, and a purpose thereof is to generate defects and defects due to electrolytic corrosion even when a semiconductor layer is formed from ZnO and aluminum is used as an electrode and wiring material. There is not to provide a semiconductor device.
[0013]
[Means for Solving the Problems]
A semiconductor device according to the present invention is a semiconductor device including a substrate, at least one electrode supported by the substrate, and a semiconductor layer in contact with at least a part of an upper surface of the electrode, wherein the electrode includes: A first conductive layer formed of a first conductive material; and a second conductive layer disposed between an upper surface of the first conductive layer and the semiconductor layer and formed of a second conductive material different from the first conductive material. A conductive layer; and an insulating protective layer located between a lower surface of the semiconductor layer and a side surface of the first conductive layer.
[0014]
In a preferred embodiment, the semiconductor layer is formed of a semiconductor having a band gap of 3 eV or more.
[0015]
In a preferred embodiment, the semiconductor layer is made of ZnO or a compound semiconductor containing ZnO as a main component.
[0016]
In a preferred embodiment, the first conductive material mainly includes aluminum.
[0017]
In a preferred embodiment, the insulating protective layer is formed from an oxide and / or a nitride of the first conductive material.
[0018]
In a preferred embodiment, the specific resistance of the first conductive material is lower than the specific resistance of the second conductive material, and the second conductive material is less susceptible to corrosion due to a local battery reaction than the first conductive material. .
[0019]
In a preferred embodiment, ohmic contact occurs between the second conductive material and the semiconductor layer.
[0020]
In a preferred embodiment, the second conductive material is a Group IV, V, or VI metal or a nitride of these metals.
[0021]
In a preferred embodiment, the metal is at least one metal selected from the group consisting of Ti, Ta, and Mo.
[0022]
In a preferred embodiment, the at least one electrode includes two electrodes formed at separate positions on the substrate.
[0023]
In a preferred embodiment, the insulating protective layer in each of the two electrodes is continuous on the substrate.
[0024]
In a preferred embodiment, the insulating protective layer is formed from a material that transmits visible light.
[0025]
In a preferred embodiment, the insulating protective layer is made of SiO 2 2 , Al 2 O 3 , Ta 2 O 3 , And at least one insulating material selected from the group consisting of SiNx (0 ≦ x <3).
[0026]
In a preferred embodiment, the semiconductor device further includes a second electrode disposed on the upper surface side of the semiconductor layer and in contact with the semiconductor layer.
[0027]
In a preferred embodiment, the two electrodes are a source electrode and a drain electrode, respectively, and the second electrode faces the semiconductor layer via a gate insulating film formed on an upper surface of the semiconductor layer. It is a gate electrode.
[0028]
A display device according to the present invention includes any one of the semiconductor devices described above.
[0029]
A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device, comprising: a step of forming at least one electrode on a substrate; and a step of forming a semiconductor layer so as to cover the electrode. Forming a first conductive material film; depositing a second conductive material film other than the first conductive material film on the first conductive layer material film; Forming a layered structure including a first conductive layer formed of the first conductive material and a second conductive layer formed of the second conductive material by patterning a film; Forming an insulating protective layer covering at least a part of the side surface of the layer.
[0030]
In a preferred embodiment, the steps of patterning the two films include: depositing a resist mask on the two films; and etching a portion of the two films not covered by the resist mask. including.
[0031]
In a preferred embodiment, the step of forming the insulating protective layer includes a step of oxidizing and / or nitrogen side surfaces of the first conductive layer.
[0032]
In a preferred embodiment, the step of forming the insulating protective layer includes, before removing the resist mask, a step of depositing an insulating film on a substrate, and removing the resist mask to form the insulating film. Lifting off unnecessary portions and leaving a part of the insulating film on side surfaces of the first conductive layer.
[0033]
Another semiconductor device according to the present invention is a semiconductor device comprising a substrate, at least one electrode supported by the substrate, and a semiconductor layer in contact with at least a part of an upper surface of the electrode, wherein the semiconductor device The layer is made of ZnO or a compound semiconductor containing ZnO as a main component, and the electrode is made of a first conductive layer made of a first conductive material containing aluminum as a main component, and an upper surface of the first conductive layer. And a second conductive layer formed of a second conductive material different from the first conductive material, the second conductive material being disposed between the semiconductor layer and the first conductive material. Corrosion due to a local battery reaction is less likely to occur.
[0034]
In a preferred embodiment, the second conductive layer covers both a top surface and a side surface of the first conductive layer.
[0035]
In a preferred embodiment, the at least one electrode includes two electrodes formed at separate positions on the substrate, and the second conductive layer in each of the two electrodes is formed on the substrate. Electrically isolated.
[0036]
In a preferred embodiment, ohmic contact occurs between the second conductive material and the semiconductor layer.
[0037]
In a preferred embodiment, the second conductive material is a Group IV, V, or VI metal or a nitride of these metals.
[0038]
In a preferred embodiment, the metal is at least one metal selected from the group consisting of Ti, Ta, and Mo.
[0039]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
[0040]
(Embodiment 1)
First, the configuration of a first embodiment of a semiconductor device according to the present invention will be described with reference to FIG. The semiconductor device of the present embodiment is an active matrix substrate suitably used for a display panel such as a liquid crystal display device.
[0041]
Note that the term "semiconductor device" in this specification does not refer to a semiconductor element itself such as a thin film transistor formed over a substrate, but refers to a structure including a substrate over which a semiconductor element such as a thin film transistor is formed, or A device equipped with an object shall be widely referred to. Further, a semiconductor element formed over a substrate is not limited to a three-terminal element such as a thin film transistor, and includes a diode functioning as a light-emitting element or a switching element.
[0042]
Hereinafter, for simplicity, the present embodiment will be described in detail focusing on a single thin film transistor on an active matrix substrate in which a plurality of thin film transistors are arranged in a matrix composed of rows and columns. Although only a single thin film transistor is illustrated in the drawings, a plurality of thin film transistors are formed on an actual substrate.
[0043]
As shown in FIG. 2, the semiconductor device of the present embodiment includes a substrate 1, a source electrode 20a and a drain electrode 20b supported on the substrate 1, and at least a part of an upper surface of each of the source / drain electrodes 20a and 20b. And a semiconductor layer 4 in contact therewith. On the semiconductor layer 4, a gate insulating film 5 and a gate electrode 6 are laminated in this order, and are configured as a thin film transistor. Although not shown, a source bus line, a gate bus line, and a pixel electrode connected to the above-described thin film transistor are formed on an actual active matrix substrate. A film has been deposited.
[0044]
The substrate 1 in the present embodiment is formed of non-alkali glass (1737 glass manufactured by Corning) for a liquid crystal display device. The substrate 1 is preferably formed from a transparent material such as glass or plastic, but does not necessarily need to be formed from a transparent insulating material depending on the application.
[0045]
The semiconductor layer 4 is formed from ZnO. As described above, ZnO is a compound semiconductor having a band gap exceeding 3 eV and transmits visible light. In the active matrix substrate used for the transmission type liquid crystal display device, a visible light source (backlight) is disposed on the back side, so that the illustrated thin film transistor is also irradiated with the light from the backlight. In the case of a thin film transistor formed using silicon as in the related art, it is necessary to appropriately arrange a light shielding film so that light from a backlight does not irradiate the thin film transistor. However, in the present embodiment, this is not necessary.
[0046]
The gate insulating layer 5 is made of SiO 2 , And the gate electrode 6 is formed of Al. The materials of the gate insulating layer 5 and the gate electrode 6 are not limited to those shown here, and an appropriate material can be appropriately selected and used.
[0047]
Each of the source / drain electrodes 20a and 20b includes a first conductive layer 2 formed of aluminum (Al), a second conductive layer 3 formed of titanium (Ti), a first conductive layer 2 and a second conductive layer. An insulating protective layer covering the side surface of the layer. In other words, the second conductive layer 3 is disposed between the upper surface of the first conductive layer 2 and the semiconductor layer 4, and the insulating protective layer is provided between the side surface of the first conductive layer 2 and the lower surface of the semiconductor layer 4. 7 are arranged.
[0048]
In the present embodiment, since direct contact between the first conductive layer 2 and the semiconductor layer 4 is avoided as described above, even when Al is used for the first conductive layer 2 and ZnO is used for the semiconductor layer 4, Since no electrolytic corrosion occurs due to the local battery reaction, it is possible to prevent defects and defects such as disconnection of the source / drain electrodes 20a and 20b.
[0049]
As the material of the second conductive layer 3 (second conductive material), a material that is less likely to cause corrosion due to a local battery reaction between the semiconductor layers 4 than the material of the first conductive layer 2 (first conductive material) is used. It is also preferable to select a material that makes ohmic contact with the semiconductor layer 4. When ZnO or a compound semiconductor containing ZnO as a main component is used as the material of the semiconductor layer 4, a metal of Group IV, Group V, or Group IV or a nitride of these metals is used as the second conductive material. It is possible that these metals are specifically Ti, Ta, and / or Mo.
[0050]
When a semiconductor other than ZnO or a compound semiconductor containing ZnO as a main component is used as a material of the semiconductor layer 4, a material which is unlikely to cause electrolytic corrosion between the semiconductor and the ohmic contact can be appropriately selected. Good.
[0051]
The thickness of the second conductive layer 3 only needs to be between the first conductive layer 2 and the semiconductor layer 4 and large enough to exhibit an anti-corrosion effect. On the other hand, if the second conductive layer 3 is formed too thick, the process time required for depositing the second conductive material becomes longer, which is not preferable. The thickness of the second conductive layer 3 can be set, for example, in a range from 30 nm to 200 nm.
[0052]
As the material of the first conductive layer 2 (first conductive material), high-purity aluminum is used from the viewpoint of low specific resistance. However, an aluminum alloy to which an additive is added may be used instead. . Aluminum has a problem that hillocks easily grow after a high-temperature process. However, as in this embodiment, the upper surface is covered with the second conductive layer 3 and the side surfaces are covered with the insulating protective layer 7. Thereby, the effect of suppressing the generation and growth of hillocks can also be obtained. In order to lower the wiring resistance, it is preferable to form the first conductive layer 2 thicker. When the liquid crystal display device has a large screen, it is necessary to form the first conductive layer 2 thicker than before. . As the first conductive layer 2 becomes thicker, a short circuit due to a hillock growing from the side surface of the second conductive layer 2 may cause a problem. However, if the side surface is covered with the insulating protective layer 7 as in the present embodiment, The advantage is that such hillocks can be effectively suppressed.
[0053]
A preferred thickness range of the first conductive layer 2 is, for example, not less than 50 nm and not more than 700 nm. If the first conductive layer 2 is thinner than 50 nm, the resistance reduction effect is hardly obtained, which is not preferable. If the first conductive layer 2 is thicker than 700 nm, the surface step becomes too large, which is not preferable. .
[0054]
It is preferable that the thickness of the insulating protective layer 7 be large enough to exhibit an insulating property sufficient to exhibit the effect of preventing electrolytic corrosion. If the insulating protective layer 7 is formed too thick, the process time required for that is too long, which is not preferable. For this reason, the thickness of the insulating protective layer 7 can be set, for example, in the range of 5 nm or more and 50 nm or less.
[0055]
In this embodiment, the insulating protective layer 7 is formed from an insulating film selectively formed on the side surface of the first conductive layer 2. Therefore, no special patterning step is required.
[0056]
Hereinafter, a method of manufacturing the thin film transistor of FIG. 2 will be described.
[0057]
First, an Al film having a thickness (for example, 100 nm) selected from the range of 50 to 700 nm is deposited on the substrate 1 by using a thin film deposition technique such as a DC sputtering method, A Ti film having a thickness (for example, 50 nm) selected from the range of 200 nm is deposited.
[0058]
Next, as shown in FIG. 3A, the shape of the wiring formed integrally with the source / drain electrodes and the source / drain electrodes 20a and 20b is formed on the laminated metal film (Al / Ti laminated film). A prescribed resist mask 8 is formed. The resist mask 8 is formed by exposing and developing a photoresist material by a known photolithography technique.
[0059]
Next, by etching a portion of the Al / Ti laminated film that is not covered with the resist mask 8, the Ti / Ti of the first conductive layer 2 and the second conductive layer 3 as shown in FIG. An Al laminate is produced. This etching is preferably performed by a highly anisotropic dry etching technique using plasma.
[0060]
Next, an insulating protective layer 7 is formed on the side surface of the Ti / Al laminate. In the present embodiment, the insulating protective layer 7 is formed by oxygen plasma processing. Specifically, first, the substrate 1 is inserted into the chamber of the plasma processing apparatus, and oxygen gas is introduced so that the pressure in the chamber becomes 400 to 1000 mTorr. Next, a high-frequency electric field of, for example, 13.6 MHz is applied between the lower electrode on which the substrate 1 is placed and the upper electrode disposed opposite thereto. The input power can be set, for example, in the range of 500 to 1000 W. Oxygen plasma generated between the upper and lower electrodes in the plasma processing apparatus oxidizes a region (side surface portion) of the Ti / Al laminate that is not covered with the resist mask 8, and has a thickness of 5 to 50 nm (preferably). An insulating oxide (10 to 30 nm) grows, thereby forming an insulating protective layer 7. The insulating protective layer 7 in the present embodiment is made of Al 2 O 3 Part and TiO x It is composed of parts. More specifically, the Al of the insulating protective layer 7 2 O 3 The portion covers the side surface of the first conductive layer 2 and is made of TiO. x The portion covers the side surface of the second conductive layer 3. Since the oxidation rates of Al and Ti are different, Al of the insulating protective layer 7 2 O 3 Part and TiO x The thickness may differ from the part.
[0061]
It is also possible to form the insulating protective layer 7 from a nitride film. Nitrogen is introduced into the chamber of the plasma processing apparatus, and the exposed side surfaces of the Ti / Al laminate are nitrided by nitrogen plasma. When the side surface of the Ti / Al laminate is nitrided, the insulating protective layer 7 is made of AlN formed on the side surface of the first conductive layer 2. Although TiN is formed on the side surface of the second conductive layer 3, it does not function as the insulating protective layer 7 because TiN has conductivity.
[0062]
In the present embodiment, the oxide is formed on the side surface of the first conductive layer 2 by oxidation using plasma, but an oxide of about several tens nm may be formed by anodization. The anodic oxidation can be performed by immersing the substrate 1 in a chemical conversion solution and applying a chemical formation voltage of 70 to 100 V. When performing anodic oxidation of Al, it is preferable to use tartaric acid (pH: about 7) diluted with ethylene glycol or propylene glycol as the chemical liquid. As described above, when the optimum conditions for the anodic oxidation of Al are adopted, it is difficult to form an anodic oxide film on the side surface of the second conductive layer 3 made of Ti or the like. Since the formation voltage is unlikely to increase, the Al formed on the side surface of the first conductive layer 2 in the source / drain electrodes 20a and 20b 2 O 3 Growth rate is also small. However, Al 2 O 3 With a thickness of about several tens of nanometers, the effect of suppressing the electrolytic corrosion reaction is sufficiently exhibited. Further, since the side surface of the second conductive layer 3 does not need to be covered with the oxide film, there is no problem even if the anodic oxide film of Ti cannot be formed.
[0063]
Next, a ZnO film (thickness: for example, 100 nm) and SiO 2 are deposited by a thin film deposition technique such as a CVD method or a sputtering method. 2 After a film (thickness: for example, 200 nm) is continuously deposited on the substrate 1, an Al film (thickness: for example, 100 nm) is converted to SiO 2 by sputtering. 2 Deposits on the film. When the sputtering method is used for depositing the ZnO film, it is preferable to use a ZnO sintering target and maintain the substrate temperature at, for example, 250 ° C. while Ar and O 2 are deposited. 2 In a mixed gas atmosphere (gas flow rate is Ar: O 2 = 2: 1), ZnO can be deposited. Thereafter, heat treatment may be performed as necessary.
[0064]
Next, a resist mask for defining the pattern of the gate electrode / wiring is formed by photolithography, and Al / SiO 2 A portion of the / ZnO laminated film not covered with the resist mask is continuously etched. This etching is preferably performed using a highly anisotropic dry etching method using plasma or the like. Thereafter, a peeling and cleaning step is performed to remove the resist mask. Thus, as shown in FIG. 2, the semiconductor layer 4, the gate insulating film 5, and the gate electrode 6 can be formed.
[0065]
According to the method of the present embodiment, the semiconductor layer 4, the gate insulating film 5, and the gate electrode 6 have the same planar layout, and the semiconductor layer 4 exists below the gate electrode 6. Note that when the semiconductor layer 4 is isolated for each transistor, the semiconductor film may be patterned to obtain the island-shaped semiconductor 4 before depositing the films for the gate insulating film 5 and the gate electrode 6.
[0066]
In the staggered thin film transistor manufactured in this manner, since contact between Al and ZnO can be completely avoided, an electrolytic corrosion reaction does not occur between Al and ZnO, and occurrence of wiring failure can be prevented. .
[0067]
(Embodiment 2)
Hereinafter, a second embodiment of the semiconductor device according to the present invention will be described with reference to FIG.
[0068]
The difference between the semiconductor device according to the present embodiment and the semiconductor device according to the first embodiment lies in the configuration of the source / drain electrodes 20a and 20b, and is otherwise the same. The configuration of 20b and its manufacturing method will be described in detail.
[0069]
The source / drain electrodes 20a and 20b in the present embodiment are respectively shown in FIG. It has a first conductive layer 2 made of Al, a second conductive layer 3 made of Ti, and an insulating protective layer 7 covering the side surfaces of the first conductive layer 2 and the second conductive layer 3 and the substrate surface. are doing. As in the first embodiment, the second conductive layer 3 is disposed between the upper surface of the first conductive layer 2 and the semiconductor layer 4, and between the side surface of the first conductive layer 2 and the lower surface of the semiconductor layer 4. Since the insulating protective layer 7 is provided, direct contact between the first conductive layer 2 made of aluminum and the semiconductor layer 4 is avoided.
[0070]
One of the features of the present embodiment is that the insulating protective layer 7 is continuous between the source electrode 20a and the drain electrode 20b.
[0071]
Hereinafter, a method for manufacturing the semiconductor device of the present embodiment will be described with reference to FIGS.
[0072]
First, an alkali-free glass substrate (Corning 1737 glass) 1 is prepared as an insulating substrate 1, and an Al film (thickness: for example, 100 nm) and a Ti film (thickness: 100 nm) are formed on the substrate 1 by a DC sputtering film forming method. : For example, 50 nm). Next, by a photolithography process, a resist mask 8 for defining the shapes of the source / drain electrodes 20a and 20b and the wiring integrally connected to the source / drain electrodes 20a and 20b is formed on the Ti / Al laminated film.
[0073]
Next, portions of the Ti / Al laminated film that are not covered by the resist mask 8 are etched to form the first conductive layer 2 and the second conductive layer 3 in the source / drain electrodes. This etching is preferably performed by a reactive ion etching (RIE) method. Specifically, Cl 2 The etching can be performed by filling the chamber of the etching apparatus with a gas (pressure: 10 mTorr, for example) and applying RF of about 5 kW between the electrodes.
[0074]
Through the above steps, the structure shown in FIG. 5A is obtained. Next, without removing the resist mask 8, in this embodiment, SiO 2 is removed by RF sputtering or CVD. 2 A film (thickness: about 30 nm) is deposited on the substrate 1 (FIG. 5B). Since the resist mask 8 exists on the substrate 1, SiO 2 2 The deposition temperature of the film is preferably set to 200 ° C. or lower.
[0075]
Thereafter, a step of removing the resist mask 8 is performed, so that the SiO 2 on the resist mask 8 is removed. 2 A part of the film is removed by lift-off. By this lift-off, SiO 2 2 Since the portion of the film located above the dotted line in FIG. 5B is removed together with the resist mask 8, the side surfaces of the first and second conductive layers 2, 3 in the source / drain electrodes 20a, 20b and the substrate SiO covering surface 1 2 The membrane will be left behind. SiO remaining in this way 2 Functions as an insulating protection 7. As described above, in the present embodiment, the region of the upper surface of the substrate 1 where the source / drain electrodes 20a and 20b are not formed is covered with the insulating protective layer 7.
[0076]
Next, a ZnO film (thickness: for example, 100 nm) and SiO 2 are deposited by a thin film deposition technique such as a CVD method or a sputtering method. 2 After a film (thickness: for example, 200 nm) is continuously deposited on the substrate 1, an Al film (thickness: for example, 100 nm) is converted to SiO 2 by sputtering. 2 Deposits on the film.
[0077]
Next, a resist mask (not shown) for defining a gate electrode / wiring pattern is formed by photolithography, and Al / SiO 2 A portion of the / ZnO laminated film not covered with the resist mask is continuously etched. This etching is preferably performed by a highly anisotropic dry etching method using plasma. Thereafter, a peeling and cleaning step is performed to remove the resist mask. Thus, the semiconductor layer 4, the gate insulating film 5, and the gate electrode 6 shown in FIG. 4 can be formed.
[0078]
In the staggered thin film transistor manufactured by the above method, since Al and ZnO are not in contact with each other, an electrolytic corrosion reaction between Al and ZnO is suppressed.
[0079]
In this embodiment, the insulating protective layer 7 is made of SiO 2. 2 Is used, but the material of the insulating protective layer 7 is SiO 2 2 It is not limited to. In the case of a liquid crystal display device, since a pixel electrode is formed on the insulating protective layer 7, in order to perform transmission type display, the property that the insulating protective layer 7 transmits light from a backlight with high efficiency is required. It is preferable to have.
[0080]
In addition, since the insulating protective layer 7 according to the present embodiment exists continuously between the source electrode and the drain electrode, it is desired that the insulating property is sufficiently high. As a material of the insulating protective layer 7, SiNx, Al 2 O 3 , Ta 2 O 5 Such materials are suitable.
[0081]
When the thin film transistors according to the first and second embodiments are used as switching elements in an image display area of a liquid crystal display device, the source electrode 20a is connected to a source bus line (signal line), and the drain electrode 20b is connected to a corresponding pixel electrode. Connected. In a preferred embodiment, the source bus line is formed integrally with the source electrode 20a. In that case, the source bus line also has the same cross-sectional structure as the source / drain electrodes 20a and 20b. As described above, since aluminum has a lower specific resistance than tantalum or the like, the wiring resistance of the source bus line can be significantly reduced as compared with the case where the source bus line is formed from tantalum.
[0082]
When a liquid crystal display device is manufactured using the active matrix substrate in each of the above embodiments, a liquid crystal panel is formed by sealing liquid crystal between the opposing substrate and the active matrix substrate by a known manufacturing method. Just fine.
[0083]
(Embodiment 3)
Next, a third embodiment of the semiconductor device according to the present invention will be described with reference to FIG.
[0084]
In this embodiment, a thin film diode is formed on a substrate instead of a thin film transistor. As shown in FIG. 6, the semiconductor device of the present embodiment includes a substrate 1, a first electrode 30 supported on the substrate 1, and a semiconductor layer 4 that contacts at least a part of the upper surface of the first electrode 30. ing. The second electrode 12 is disposed on the semiconductor layer 4. The first electrode 30 and the second electrode 12 function as a cathode or an anode of a diode.
[0085]
In the present embodiment, the semiconductor layer 4 is formed of ZnO, the first electrode 30 located below the semiconductor layer 4 has the first conductive layer 10 and the second conductive layer 11, and the side surfaces have insulating properties. It has a structure covered by the protective layer 7.
[0086]
Hereinafter, a method for manufacturing the semiconductor device of FIG. 6 will be described.
[0087]
First, an insulating substrate 1 is prepared, and an Al film (thickness: for example, 100 nm) and a Ti film (thickness: for example, 50 nm) are successively deposited thereon by DC sputtering. Next, in a photolithography process, a resist mask that defines the shape of the first electrode is formed on the Ti / Al laminated film. The portion of the Ti / Al laminated film that is not covered with the resist mask is etched to form the first conductive layer 10 and the second conductive layer 11 of the first electrode 30. Dry etching is performed by a reactive ion etching (RIE) method. Specifically, Cl 2 This can be performed by filling the chamber of the etching apparatus with a gas (pressure: 10 mTorr) and applying RF of about 5 kW between the electrodes.
[0088]
Next, the insulating protective layer 7 is formed on the side surfaces of the first conductive layer 10 and the second conductive image 11 in the same manner as in the first embodiment. Thereafter, a semiconductor layer (thickness: 100 nm) 4 made of ZnO is deposited by CVD or sputtering, and is patterned into a predetermined shape. Thereafter, a Schottky junction electrode (second electrode) 12 is formed from a material capable of forming a Schottky junction with ZnO (gold, platinum, Ni, or the like), and the thin-film diode shown in FIG. 6 is obtained.
[0089]
Also in the thin-film diode shown in FIG. 6, since the contact between Al and ZnO is completely avoided, the electrolytic corrosion reaction between Al and ZnO is suppressed.
[0090]
(Embodiment 4)
FIG. 7 shows a cross-sectional configuration of a thin film diode manufactured by the same method as in the above-described third embodiment, except that the insulating protective layer 7 is formed by the method described in the second embodiment. Also in the thin-film diode of the present embodiment, since the contact between Al and ZnO is completely avoided, the electrolytic corrosion reaction between Al and ZnO is suppressed.
[0091]
In each of the embodiments described above, the semiconductor layer is formed from ZnO, but the present invention is not limited to this. Even when the semiconductor layer is formed from a compound semiconductor containing ZnO as a main component, the effect of preventing electric corrosion of the present invention is exhibited. In addition, even when a silicon layer is used as a semiconductor layer, various effects can be obtained due to direct contact between aluminum and silicon. Aluminum and silicon are liable to mutually diffuse, and if a high-temperature heat treatment is performed in a state of direct contact, there is a problem that aluminum deeply diffuses into the silicon layer. In addition, hillocks are likely to grow from aluminum depending on the heat treatment, which may cause a short circuit in wiring. However, according to the configuration of the above-described embodiment, since the upper surface and the side surfaces of the first conductive layer are covered with a layer formed of a material that is unlikely to generate hillocks, a hillock is generated as a material of the first conductive layer like aluminum. Even if a material that is easy to use is used, a short circuit of the wiring can be prevented. A conductive material containing aluminum as a main component is a material having a low specific resistance and tends to be preferably used as an electrode or a wiring, but has a disadvantage that a hillock is easily formed. According to the present invention, while the second conductive layer effectively suppresses the generation of hillocks extending from the upper surface of the first conductive layer, the insulating protective layer effectively reduces the generation of hillocks extending from the side surface of the first conductive layer. Suppress. When the thickness of the first conductive layer is relatively small, the problem of the hillock extending from the side surface of the first conductive layer is not so important. As the layer becomes thicker, hillocks from the sides can be an important factor of failure. However, according to each of the above embodiments, the occurrence of such side hillocks can be effectively suppressed by the insulating protective layer disposed between the first conductive layer and the semiconductor layer.
[0092]
The material of the first conductive layer (first conductive material) is not limited to aluminum. Even in the case of an alloy or a composite material in which other elements are added to aluminum, it is considered that an electrolytic corrosion reaction occurs with ZnO or a compound semiconductor containing ZnO as a main component. Has the effect.
[0093]
Further, even when the first conductive layer is formed from a conductive material substantially not containing aluminum, the side surface is covered with the insulating protective layer, so that an effect that at least a short circuit or disconnection hardly occurs is obtained. It is thought that it is possible. For this reason, according to the present invention, it is considered that the reliability of the semiconductor device is improved regardless of the combination of the material of the first conductive layer and the material of the semiconductor layer.
[0094]
(Embodiment 5)
A fifth embodiment of the semiconductor device according to the present invention will be described with reference to FIG.
[0095]
A feature of the present embodiment is that each of the source electrode 25a and the drain electrode 25b has a laminated structure of the first conductive layer 2 and the second conductive layer 3, but the side face of the first conductive layer 2 is insulated. That the protective layer does not exist.
[0096]
According to the present embodiment, direct contact between the upper surface of the first conductive layer 2 and the lower surface of the semiconductor layer 4 can be avoided, but direct contact between the side surface of the first conductive layer 2 and the lower surface of the semiconductor layer 4 can be avoided. are doing. For this reason, when the area of the side surface of the first conductive layer 2 is much smaller than the area of the upper surface of the first conductive layer 2 or when the first conductive layer 2 is formed by a natural oxide film formed on the side surface of the first conductive layer 2. When the electric resistance between the semiconductor layer 2 and the semiconductor layer 4 is sufficiently high, it is possible to suppress the electrolytic corrosion due to the local battery reaction to some extent. Further, according to the present embodiment, there is an advantage that the step of forming the insulating protective layer is not required, so that the manufacturing process can be simplified.
[0097]
(Embodiment 6)
The sixth embodiment of the semiconductor device according to the present invention will be described with reference to FIG.
[0098]
A feature of this embodiment is that the source / drain electrodes 25a and 25b have a laminated structure of the first conductive layer 2 and the second conductive layer 3, and the second conductive layer 3 is formed of the first conductive layer. In that it also covers the two sides.
[0099]
According to the present embodiment, direct contact of the first conductive layer 2 with the semiconductor layer 4 can be avoided, so that electrolytic corrosion due to a local battery reaction can be sufficiently suppressed. However, it is necessary to electrically separate the second conductive layer 3 between the source electrode 25a and the drain electrode 25b. For this reason, after depositing the second conductive layer 3 on the upper surface of the substrate 1, a step of patterning the second conductive layer 3 by a photolithography step and an etching step is additionally required.
[0100]
Note that if the second conductive layer 3 can be selectively grown only on the upper surface and the side surface of the first conductive layer 2 by the selective growth method, the photolithography step and the etching step are unnecessary.
[0101]
【The invention's effect】
According to the present invention, since the second conductive layer is disposed between the upper surface of the first conductive layer and the semiconductor layer, a material that is easily corroded between the semiconductor layer and the first conductive layer is used as the material of the first conductive layer. Even if it does, it is possible to suppress the local battery reaction and thereby suppress the electrolytic corrosion. Furthermore, by providing an insulating protective layer between the side surface of the first semiconductor layer and the semiconductor layer, the effect of preventing electrolytic corrosion can be further enhanced, and disconnection caused by a hick extending from the side surface of the first conductive layer can be effectively prevented. Can be prevented.
[0102]
According to the present invention, a semiconductor layer is formed from ZnO or a compound semiconductor containing ZnO as a main component, which is attracting attention as a transparent semiconductor, and aluminum or aluminum which has low resistance as an electrode / wiring material but easily causes an electrolytic corrosion reaction is used. It becomes possible to use an aluminum alloy.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a conventional semiconductor device.
FIG. 2 is a sectional view showing a first embodiment of a semiconductor device according to the present invention.
FIGS. 3A and 3B are process cross-sectional views illustrating a method for manufacturing the semiconductor device according to the first embodiment of the present invention;
FIG. 4 is a sectional view showing a second embodiment of the semiconductor device according to the present invention.
FIGS. 5A and 5B are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 6 is a sectional view showing a third embodiment of the semiconductor device according to the present invention.
FIG. 7 is a sectional view showing a fourth embodiment of the semiconductor device according to the present invention;
FIG. 8 is a sectional view showing a fifth embodiment of the semiconductor device according to the present invention.
FIG. 9 is a sectional view showing a sixth embodiment of a semiconductor device according to the present invention.
[Explanation of symbols]
1 ... substrate
2... First conductive layer of source / drain electrode
3... Second conductive layer of source / drain electrode
4 ... semiconductor layer
5 ... gate insulating layer
6 ... gate electrode
7 ... Insulating protective layer
8 Resist mask
10 first conductive layer of first electrode
11... Second conductive layer of first electrode
12 second electrode
20a: Source electrode
20b ... Drain electrode
25a: Source electrode
25b ... Drain electrode
30 first electrode

Claims (26)

  1. Board and
    At least one electrode supported on the substrate;
    A semiconductor layer that contacts at least a part of the upper surface of the electrode,
    A semiconductor device comprising:
    The electrode is
    A first conductive layer formed from a first conductive material;
    A second conductive layer formed between a top surface of the first conductive layer and the semiconductor layer and formed of a second conductive material different from the first conductive material;
    An insulating protective layer located between a lower surface of the semiconductor layer and a side surface of the first conductive layer;
    A semiconductor device having:
  2. The semiconductor device according to claim 1, wherein the semiconductor layer is formed of a semiconductor having a band gap of 3 eV or more.
  3. The semiconductor device according to claim 2, wherein the semiconductor layer is formed of ZnO or a compound semiconductor containing ZnO as a main component.
  4. The semiconductor device according to claim 1, wherein the first conductor material mainly includes aluminum.
  5. The semiconductor device according to claim 1, wherein the insulating protective layer is formed of an oxide and / or nitride of the first conductive material.
  6. The specific resistance of the first conductive material is lower than the specific resistance of the second conductive material, and the second conductive material is less susceptible to corrosion due to a local battery reaction than the first conductive material. The semiconductor device according to any one of the above.
  7. The semiconductor device according to claim 1, wherein an ohmic contact occurs between the second conductive material and the semiconductor layer.
  8. The semiconductor device according to claim 7, wherein the second conductive material is a Group IV, V, or VI metal or a nitride of these metals.
  9. The semiconductor device according to claim 8, wherein the metal is at least one metal selected from the group consisting of Ti, Ta, and Mo.
  10. 10. The semiconductor device according to claim 1, wherein the at least one electrode includes two electrodes formed at separate positions on the substrate.
  11. The semiconductor device according to claim 10, wherein the insulating protective layer in each of the two electrodes is continuous on the substrate.
  12. The semiconductor device according to claim 11, wherein the insulating protective layer is formed of a material that transmits visible light.
  13. 13. The method according to claim 12, wherein the insulating protective layer is formed of at least one insulating material selected from the group consisting of SiO 2 , Al 2 O 3 , Ta 2 O 3 , and SiNx (0 ≦ x <3). 13. The semiconductor device according to claim 1.
  14. The semiconductor device according to claim 1, further comprising a second electrode disposed on an upper surface side of the semiconductor layer and in contact with the semiconductor layer.
  15. The two electrodes are a source electrode and a drain electrode, respectively.
    The semiconductor device according to claim 11, wherein the second electrode is a gate electrode facing the semiconductor layer via a gate insulating film formed on an upper surface of the semiconductor layer.
  16. A display device comprising the semiconductor device according to claim 1.
  17. Forming at least one electrode on a substrate;
    Forming a semiconductor layer so as to cover the electrode, a method of manufacturing a semiconductor device,
    The step of forming the electrode,
    Forming a film of a first conductive material;
    Depositing a film of a second conductive material other than the first conductive material on the film of the first conductive layer material;
    Forming a stacked structure including a first conductive layer formed from the first conductive material and a second conductive layer formed from the second conductive material by patterning the two films;
    Forming an insulating protective layer covering at least a part of the side surface of the first conductive layer.
  18. Patterning the two films,
    Depositing a resist mask on the two films;
    Etching the portion of the two films that is not covered with the resist mask.
  19. 19. The method according to claim 17, wherein the step of forming the insulating protective layer includes a step of oxidizing and / or nitrogen side surfaces of the first conductive layer.
  20. The step of forming the insulating protective layer,
    Before removing the resist mask, depositing an insulating film on the substrate,
    Removing the resist mask, performing a lift-off of an unnecessary portion of the insulating film, and leaving a part of the insulating film on a side surface of the first conductive layer;
    The method according to claim 17, comprising:
  21. Board and
    At least one electrode supported on the substrate;
    A semiconductor layer that contacts at least a part of the upper surface of the electrode,
    A semiconductor device comprising:
    The semiconductor layer is formed of ZnO or a compound semiconductor containing ZnO as a main component,
    The electrode is
    A first conductive layer formed from a first conductive material containing aluminum as a main component,
    A second conductive layer formed between a top surface of the first conductive layer and the semiconductor layer and formed of a second conductive material different from the first conductive material;
    Has,
    The semiconductor device, wherein the second conductive material is less likely to be corroded by a local battery reaction than the first conductive material.
  22. 22. The semiconductor device according to claim 21, wherein the second conductive layer covers both a top surface and a side surface of the first conductive layer.
  23. The at least one electrode includes two electrodes formed at separate positions on the substrate, and the second conductive layer in each of the two electrodes is electrically separated on the substrate. The semiconductor device according to claim 22.
  24. 24. The semiconductor device according to claim 23, wherein an ohmic contact occurs between the second conductive material and the semiconductor layer.
  25. 25. The semiconductor device according to claim 24, wherein the second conductive material is a Group IV, Group V, or Group IV metal or a nitride of these metals.
  26. 26. The semiconductor device according to claim 25, wherein the metal is at least one metal selected from the group consisting of Ti, Ta, and Mo.
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