KR101522240B1 - Liquid crystal display device and method of fabricating the same - Google Patents

Abstract

A liquid crystal display device according to the present invention has a substrate, a semiconductor layer formed on the substrate, a source electrode and a drain electrode formed to be spaced a predetermined distance above the semiconductor layer, A gate insulating layer formed on the source electrode and the drain electrode, and a gate electrode formed on the gate insulating layer. The semiconductor layer is a metal oxide semiconductor material, and is formed of zinc oxide (ZnO) or zinc gallium oxide (GZO). According to the above structure, the channel layer of the semiconductor layer is formed in a horizontal path with the substrate, and the parasitic resistance in the vertical direction can be reduced.

Thin film transistor, metal oxide semiconductor, top gate, parasitic resistance, liquid crystal

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display device and a method of manufacturing the same,

The present invention relates to a liquid crystal display device and a method of manufacturing the same, and more particularly, to a liquid crystal display device using a metal oxide semiconductor material and forming a semiconductor layer below the source electrode and the drain electrode, thereby improving the aperture ratio and transmittance, And a manufacturing method thereof.

2. Description of the Related Art Recently, there has been a growing interest in an information display device and a demand for a portable information medium has increased, and a lightweight thin film flat panel display (FPD), which replaces a cathode ray tube (CRT) And research and commercialization of these products have been focused on. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or desktop monitor.

The liquid crystal display device mainly comprises a color filter substrate and an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

The active matrix (AM) method, which is a driving method mainly used in the liquid crystal display, is a method of driving a liquid crystal of a pixel portion by using an amorphous silicon thin film transistor as a switching element.

Since a manufacturing process of such a liquid crystal display device basically requires a number of mask processes (that is, a photolithography process) in manufacturing an array substrate including thin film transistors, a method of reducing the number of masks in terms of productivity is required have.

Hereinafter, the structure of a typical liquid crystal display device will be described in detail with reference to FIG.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

1, the liquid crystal display comprises a color filter substrate 5, an array substrate 10, and a liquid crystal layer 30 formed between the color filter substrate 5 and the array substrate 10 do.

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 implementing colors of red (R), green (G) and blue (B) A black matrix 6 for separating the sub-color filters 7 from each other and shielding light transmitted through the liquid crystal layer 30 and a transparent common electrode for applying a voltage to the liquid crystal layer 30 8).

The array substrate 10 includes a plurality of gate lines 16 and data lines 17 arranged vertically and horizontally to define a plurality of pixel regions P and a plurality of gate lines 16 and data lines 17, A thin film transistor T which is a switching element formed in a crossing region of the pixel region P and a pixel electrode 18 formed on the pixel region P. [

The color filter substrate 5 and the array substrate 10 constituted as described above are adhered to each other by a sealant (not shown) formed on the periphery of the image display area to constitute a liquid crystal panel, and the color filter substrate 5 (Not shown) formed on the color filter substrate 5 or the array substrate 10 are bonded to each other.

Since a manufacturing process of the liquid crystal display device basically requires a plurality of mask processes to fabricate an array substrate including thin film transistors, a method of reducing the number of masks in terms of productivity is required. Conventionally, a mask reduction study for a liquid crystal display device fabrication process was continued until now to a 4-mask process.

2A to 2G are diagrams showing a conventional 4-mask process for forming a liquid crystal display element.

First, as shown in Fig. 2A, a metal is deposited on the first substrate 30 and etched to form the gate electrode 32. Next, as shown in Fig. 2B, an insulating material and a semiconductor material are stacked over the entire first substrate 30 to form a gate insulating layer 31 and a semiconductor layer 34a. Thereafter, a first metal layer 36a is formed by laminating a metal on the semiconductor layer 34a, and a photoresist is laminated thereon to form a first photoresist layer 38a. After the mask 60 is placed on the first photoresist layer 38a, the first photoresist layer 38a is irradiated with light.

The mask 60 includes a shielding region 60a for blocking transmission of light as a halftone mask, a light-transmitting region 60c for transmitting light entirely, and a semi-transmission region 60b for transmitting a part of light. Accordingly, when the first photoresist layer 38a is irradiated with light in a state of being blocked by the mask 60, the amount of light irradiated to the regions 60a, 60b, and 60c varies.

Thereafter, as shown in FIG. 2C, the first photoresist layer 38a irradiated with the light is developed to form the second photoresist layer 38b. At this time, the photoresist corresponding to the transmissive area 60c of the photomask 60 is completely removed, only the photoresist corresponding to the transflective area 60b is partially removed, and the photoresist corresponding to the blocking area 60a is removed It remains. The first metal layer 36a is etched by applying an etching solution in a state where the first metal layer 36a is blocked with the second photoresist layer 38b.

As the metal layer 36a is etched, a second metal layer 36b and a semiconductor layer 34 are formed on the first substrate 30 as shown in FIG. 2D.

Subsequently, ashing the second photoresist layer 38b removes a portion of the upper portion of the second photoresist layer 38b to form a second photoresist layer 38b corresponding to the second gate electrode 32 as shown in FIG. A third photoresist layer 38c is formed in which the metal layer 36b is exposed to the outside. At this time, not only the upper part of the second photoresist layer 38b is removed by the ace of the second photoresist layer 38b but the side surface of the second photoresist layer 38b is also removed, so that the second metal layer 36b ) Are partially exposed.

Therefore, if the second metal layer 36b is etched while the second metal layer 36b is blocked by the third photoresist layer 38c as described above, as shown in FIG. 3F, The source electrode 36 and the drain electrode 37 are formed.

2G, a passivation layer 38 is formed over the entire surface of the first substrate 30 and a contact hole is formed. Then, a drain electrode 37 is formed on the passivation layer 38 through a contact hole. The pixel electrode 39 is formed.

After the black matrix 42 and the color filter layer 46 are formed on the second substrate 40 and the first substrate 30 and the second substrate 40 are bonded to each other with the liquid crystal layer 50 therebetween Thereby completing the liquid crystal display element.

However, the conventional liquid crystal display device manufactured by the 4-mask process has the following problems.

First, a semiconductor layer made of an amorphous semiconductor is exposed to a backlight that supplies light to a liquid crystal panel, and is excited by light incident from the backlight to generate a leakage current. An opaque gate electrode is formed under the semiconductor layer to partially block the light incident from the backlight. However, since the width of the gate electrode is smaller than that of the semiconductor layer, the backlight is incident on the exposed semiconductor layer, It will be done.

Second, the aperture ratio and transmittance are reduced by the semiconductor layer of the thin film transistor. In the 4-mask process described above, not only a part of the upper portion of the second photoresist layer 38b is removed when the photoresist layer is ace, but a part of the upper portion of the photoresist layer as well as the photoresist layer is partially removed, 36b are partially exposed. A part of the exposed second metal layer 36b is also etched so that a part of the region A of the semiconductor layer 34 contacts the source electrode 36 and the drain electrode 37 Since the semiconductor layer is made of opaque amorphous silicon, the extended region A causes a decrease in the aperture ratio and transmittance of the liquid crystal display device.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and an object of the present invention is to provide a thin film transistor which can improve an aperture ratio and a transmittance and minimize a parasitic resistance and a manufacturing method thereof.

Another object of the present invention is to provide a liquid crystal display device having the thin film transistor and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a thin film transistor including: a first substrate and a second substrate including a plurality of pixel regions; A semiconductor layer directly disposed on an upper surface of the first substrate with a predetermined width; A source electrode and a drain electrode spaced apart from each other by a predetermined distance on both sides of the semiconductor layer; A pixel electrode directly provided on the first substrate and the drain electrode of the pixel region and electrically connected to the drain electrode; A gate insulating layer disposed on the source electrode and the drain electrode; A gate electrode disposed on the gate insulating layer; A black matrix and a color filter layer provided on the second substrate; And a liquid crystal layer provided between the first substrate and the second substrate, wherein the semiconductor layer directly contacts the upper surface of the first substrate and the upper surface thereof is in direct contact with the lower surface of the source electrode and the drain electrode, The insulating layer is disposed over a partial area of the pixel electrode.

The semiconductor layer is a metal oxide semiconductor material, and is formed of zinc oxide (ZnO) or zinc gallium oxide (GZO). According to the above structure, the channel layer of the semiconductor layer is formed in a horizontal path with the substrate, and the parasitic resistance in the vertical direction can be reduced.

According to another aspect of the present invention, there is provided a method of fabricating a thin film transistor, comprising: forming a semiconductor layer and a metal layer on a substrate; etching the semiconductor layer and the metal layer using a halftone mask to form a source electrode and a drain Forming a gate insulating layer on the semiconductor layer, the source electrode, and the drain electrode; and forming a gate electrode on the gate insulating layer.

The thin film transistor of the present invention can be manufactured by a 4-mask process.

As described above, since the thin film transistor of the present invention is a transparent thin film transistor in which the semiconductor layer is made of a metal oxide semiconductor material, the opening ratio and the transmittance can be prevented from being lowered by the semiconductor layer, It is possible to prevent leakage current from occurring because the semiconductor layer is not excited.

Further, in the present invention, since the source electrode and the drain electrode are formed on the semiconductor layer and the channel layer is formed as a straight path to the semiconductor layer, the parasitic resistance can be minimized.

Hereinafter, a liquid crystal display device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view showing a structure of a liquid crystal display element according to the present invention.

3, the liquid crystal display according to the present invention includes a first substrate 130 and a second substrate 140, and a liquid crystal layer 140 formed between the first substrate 130 and the second substrate 140. [ (150).

A semiconductor layer 134 is formed on the first substrate 130 and a source electrode 136 and a drain electrode 137 are formed thereon. The source electrode 136 and the drain electrode 137 may be formed of a metal oxide semiconductor material such as Mo, Cu, MoTi, Al, or the like. The source electrode 136 and the drain electrode 137 may be formed of a metal oxide semiconductor material such as zinc oxide (ZnO) or zinc gallium oxide (GZO) , Cr, or the like.

A pixel electrode 139 made of a transparent conductive material such as ITO (Indium Tin Oxide) is formed on the drain electrode 137 and the first substrate 130 and the semiconductor layer 134 and the source electrode 136 are formed. The drain electrode 137, and the pixel electrode 139 are formed. A gate electrode 132 made of Mo, Cu, MoTi, Al or Cr is formed on the gate insulating layer 131 and a passivation layer 138 is formed on the entire surface of the first substrate 130.

On the other hand, a black matrix 142 and a color filter layer 142 are formed on the second substrate 140. The black matrix 142 is formed of an opaque material such as CrO or CrO ₂ to prevent light from being transmitted through the black matrix 142. The color filter layer 142 is made up of sub-color filters of red and green to realize the actual color. Although not shown in the drawing, a common electrode made of a transparent conductive material is formed on the black matrix 144. A planarization layer may be formed on the black matrix 144. In this case, a common electrode is formed on the planarization layer.

Although not shown in the figure, alignment layers are formed on the first substrate 130 and the second substrate 140 to align the liquid crystal molecules of the liquid crystal layer 150 in a predetermined direction.

When a scanning signal is inputted to the gate electrode 132 from the outside in the liquid crystal display device constructed as described above, a channel layer is formed in the lower semiconductor layer 134, and the image signal input from the outside to the source electrode 136 is Is applied to the drain electrode 137 through the channel layer formed in the semiconductor layer 134, and then supplied to the pixel electrode 139, thereby realizing an image.

As shown in FIG. 3, the thin film transistor of the liquid crystal display according to the present invention is a top gate thin film transistor. However, the top gate type thin film transistor according to the present invention has the following differences from the conventional top gate type thin film transistor.

4, a typical top gate type thin film transistor has a light blocking layer 239 formed on a substrate 230 and an insulating layer 238 formed thereon. That is, a conventional top gate type thin film transistor is formed in a state where the source electrode 236 and the drain electrode 237 are spaced apart from each other by a predetermined distance on the insulating layer 238 and the upper part of the source electrode 236 and the drain electrode 237 And a semiconductor layer 234 is formed on the insulating layer 238. A gate insulating layer 232 is formed on the semiconductor layer 234 and a gate electrode 231 is formed thereon. As the light blocking layer 239 is formed below the semiconductor layer 234 as described above, light can be incident on the semiconductor layer 234 from the backlight and prevent leakage current from being generated by excitation of the semiconductor layer 234 do.

The most significant difference between this conventional top gate type thin film transistor and the top gate type thin film transistor of the present invention is that in a conventional top gate type thin film transistor, a semi-conductor layer 234 is formed on the source electrode 236 and the drain 237 In contrast, in the top gate type thin film transistor of the present invention, the semiconductor layer 134 is formed below the source electrode 136 and the drain electrode 137. By this difference, the top gate type thin film transistor of the present invention can minimize the parasitic resistance as compared with the normal top gate type thin film transistor. That is, in the conventional top gate type thin film transistor, the channel layer c of the semiconductor layer has a plurality of curved paths along the upper portion of the source electrode 236, the upper portion of the insulating layer 238 and the upper portion of the drain electrode 237 In the top gate type thin film transistor of the present invention, since the source electrode 136 and the drain electrode 137 are formed on the semiconductor layer 134, the path of the channel layer is formed along the surface of the first substrate 130, .

In other words, in the top gate type thin film transistor of the present invention, the channel layer is formed only in a horizontal path with the surface of the substrate, and in a normal top gate type thin film transistor, the channel layer is formed not only in a parallel path but also in a vertical path. Therefore, the parasitic resistance of the channel layer in the top gate type thin film transistor of the present invention is reduced as compared with the conventional top gate type thin film transistor. As a result, the mobility of electrons through the channel layer is improved, It can be improved.

In addition, in the present invention, the semiconductor layer 134 is formed of a metal oxide semiconductor material such as zinc oxide (ZnO) or zinc gallium oxide (GZO). The zinc oxide (ZnO) or zinc gallium oxide (GZO) has a larger band gap than that of a general semiconductor material such as Si (the band gap of Si is 1.12 eV and the band gap of ZnO is 3.35 eV). Therefore, in Si, when photons of visible light incident from the backlight enter between the lattices of atoms, electrons absorb the photons and electrons in the valence band are excited into the conduction band. In ZnO, The photons of the visible light are not absorbed by the electrons but are directly transmitted through the ZnO. Therefore, in the thin film transistor of the present invention, visible light is transmitted through the semiconductor layer 134 as it is, so that the semiconductor layer 134 becomes transparent.

Unlike the conventional thin film transistor, even when the semiconductor layer 134 is larger than the width of the source electrode 136 and the drain electrode 137 (that is, as shown in FIG. 2G), since the semiconductor layer 134 is formed as described above, Even when a part of the semiconductor layer extends beyond the source electrode and the drain electrode as in the conventional structure shown in the drawing), the aperture ratio and the transmittance decrease due to the semiconductor layer 134 do not occur. In addition, since zinc oxide (ZnO) or zinc gallium oxide (GZO) penetrates the visible light incident from the backlight as it is without absorbing it, leakage current is prevented from being generated by excitation of the semiconductor layer 134 by light . Therefore, it is not necessary to form a light blocking layer as compared with the conventional top gate type thin film transistor jaster.

Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described in detail with reference to FIGS. 5A to 5H.

5, a first substrate 130 made of a transparent material such as glass is doped with zinc oxide (ZnO) or zinc gallium (ZnO) by a supptering process or a chemical vapor deposition A first metal layer 136a is formed by depositing a metal layer such as Mo, Cu, MoTi, Al, Cr or the like by evaporation or sputtering on the first semiconductor layer 134a by laminating oxide (GZO) .

Next, a photoresist is coated on the first metal layer 136a by a spin coating process or the like to form a first photoresist layer 138a, a mask 160 is placed on the first photoresist layer 138a, The first photoresist layer 138a is exposed by irradiating light such as UV (ultraviolet) in a state where the first photoresist layer 138a is blocked by the first photoresist layer 138a.

At this time, the mask 160 is a diffraction mask or a half tone mask, and includes a blocking region 160a for blocking light, a transmission region 160c for transmitting light entirely, and a semi-transmission Area 160b. At this time, the transflective region 160b is made of a material having a predetermined transmittance and can absorb light of a desired intensity by absorbing a part of incident light. The light is made of a plurality of slits, and diffracts incident light, As shown in FIG.

On the other hand, the semiconductor layer 134a may not be subjected to any additional processing, and may be heat-treated. When the semiconductor layer 134a is heat-treated, the heat treatment is performed at a temperature of about 150 ° C or more. The metal oxide semiconductor material such as zinc oxide (ZnO) or zinc gallium oxide (GZO) The characteristics of the transistor can be improved.

Then, as shown in FIG. 5B, the exposed first photoresist layer 138a is developed to form a second photoresist layer 138b. At this time, the first photoresist layer corresponding to the transmissive region of the mask 160 is completely removed to expose the first metal layer 136a to the outside, and the first photoresist layer corresponding to the transflective region region of the mask 160 Only a portion thereof is removed, and the first photoresist layer corresponding to the blocking region of the mask 160 is left unremoved.

5C, the first metal layer 136a and the first semiconductor layer 134a are blocked with the second photoresist layer 138b, and the first metal layer 136a and the first semiconductor layer 134a are blocked with the second photoresist layer 138b, The semiconductor layer 134 and the first metal layer 136b are formed on the first substrate 130 by etching the first semiconductor layer 134a. At this time, the first metal layer 136a and the semiconductor layer 134a may be etched by wet etching.

As shown in FIG. 5D, the first metal layer 136 exposed to the outside by the etching is etched to form a second metal layer 136b on the semiconductor layer 134. Referring to FIG. Then, the third photoresist layer 138c is formed by ashing the second photoresist layer 138b. The upper portion of the second photoresist layer 138b is removed by the above-mentioned ace, so that the second photoresist layer 138b corresponding to the cut-off region of the photomask 160 is completely removed. Accordingly, the third photoresist layer 138c is formed on the second metal layer 136b in a plurality of patterns spaced apart from each other by a predetermined distance. That is, the central region of the second metal layer 136b is exposed to the outside.

In addition, since the upper portion of the second photoresist layer 139b is not removed by the ashing of the second photoresist layer 139b but the side surface of the second photoresist layer 139b is also removed, 136b are also partially exposed to the outside.

As shown in FIG. 5E, the second metal layer 136b is etched in a state where the second metal layer 136b is blocked with the third photoresist layer 138c, so that the second metal layer 136b exposed to the outside Are etched to form a source electrode 136 and a drain electrode 137 spaced apart from each other by a predetermined distance on the semiconductor layer 134.

5F, a transparent conductive metal such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is deposited over the entire surface of the first substrate 130 on which the source electrode 136 and the drain electrode 137 are formed. An oxide is deposited by vapor deposition or sputtering and then etched by a photolithography process using a mask and an etchant to form a pixel electrode 139 on the first substrate 130. Since the pixel electrode 139 is formed on the drain electrode 137 and the pixel region of the liquid crystal display device so that the drain electrode 137 and the pixel electrode 139 are electrically connected to each other, Is supplied to the pixel electrode 139. Subsequently, an insulating material such as SiO ₂ or SiN _{2 is} deposited on the first substrate 130 by a plasma enhanced chemical vapor deposition And the gate insulating layer 131 is formed on the semiconductor layer 134, the source electrode 136, the drain electrode 137, and the pixel electrode 139 by etching.

Metal such as Mo, Cu, MoTi, Al, or Cr is deposited on the first substrate 130 by vapor deposition or sputtering, and then etched by a photolithography process to form a gate metal ( 132 are formed.

At this time, although not shown in the drawing, an electrode for storage capacitance may be formed when the gate metal 132 is formed. An insulating layer formed when the gate insulating layer 131 is formed is provided under the electrode for the storage capacitor, and a storage capacitor is formed between the storage capacitor electrode and the pixel electrode 139.

A gate pad and a data pad for connecting the gate line and the data line to the outside are formed at the edge of the end portion of the liquid crystal panel, that is, at the end of the gate line and the data line of the liquid crystal panel.

The data pad is formed on the metal layer made of the same metal as the source electrode 136 and the drain electrode 137 by the same process as the source electrode 136 and the drain electrode 137, And is formed by forming a metal oxide such as ITO or IZO (it is formed when the pixel electrode is formed). Further, the gate pad is formed at the same time when forming the gate electrode.

A protective layer 138 is formed over the entire surface of the first substrate 130 on which the thin film transistor formed of the semiconductor layer 134, the source electrode 136 and the drain electrode 137 and the gate electrode 132 is formed, And a second substrate 140 on which the first substrate 130, the black matrix 142 and the color filter layer 144 are formed are adhered to each other and the first substrate 130 and the second substrate 140 are bonded together, The liquid crystal display element is completed.

The protective layer 138 is formed by stacking an inorganic material such as SiO ₂ or SiN ₂ by a PECVD method or applying an organic material such as photoacrylic or BCB (Benzo Cyclo Butene) by a spin coating method. The black matrix 142 is formed by laminating a metal oxide such as CrO or CrO ₂ and then etching it by a photolithography process. The color filter layer is formed by laminating red, green and blue inks And a resist is laminated.

The first substrate 130 and the second substrate 140 are adhered to each other by a sealant formed on an outer region of the first substrate 130 or the second substrate 140. The liquid crystal layer 150 may be formed by laminating the first substrate 130 and the second substrate 140 and then injecting liquid crystal therebetween. Alternatively, the first substrate 130 or the second substrate 140, The liquid crystal dropped by the pressure when the first substrate 130 and the second substrate 140 are attached together is dropped on the first substrate 130 and the second substrate 140 uniformly As shown in FIG.

As described above, in the liquid crystal display according to the present invention, a transparent thin film transistor is formed by using a metal oxide semiconductor material such as zinc oxide (ZnO) or zinc gallium oxide (GZO) as a semiconductor layer, And the parasitic resistance generated in the semiconductor layer can be minimized by forming the semiconductor layer under the source electrode and the drain electrode.

The thin film transistor of the liquid crystal display element according to the present invention has a total of four masks including a semiconductor layer and a source electrode, a mask for forming a drain electrode, a mask for forming a pixel electrode, a mask for forming a gate insulating layer, Since it is manufactured by the used 4-mask process, it can be manufactured by a simplified process.

In the above description, only a structure in which a thin film transistor of a new structure is applied to a liquid crystal display element is disclosed. However, the present invention is not limited to such a liquid crystal display element but may be applied to other display elements provided with a thin film transistor, The present invention may be applied to an organic light emitting diode (OLED) including a transistor or a switching thin film transistor.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

1 is an exploded perspective view showing a structure of a general liquid crystal display element.

2A to 2G are views showing a conventional method of manufacturing a liquid crystal display element.

3 is a view showing a structure of a liquid crystal display element according to the present invention.

4 is a diagram showing the structure of a typical top gate type thin film transistor.

5A to 5H are views showing a method of manufacturing a liquid crystal display element according to the present invention.

Description of the Related Art [0002]

130, 140: substrate 131: gate insulating layer

132: gate electrode 134: semiconductor layer

136: source electrode 137: drain electrode

138: protective layer 142: black matrix

144: color filter layer 150: liquid crystal layer

Claims (19)

delete delete delete delete A first substrate and a second substrate including a plurality of pixel regions; A semiconductor layer directly disposed on an upper surface of the first substrate with a predetermined width; A source electrode and a drain electrode spaced apart from each other by a predetermined distance on both sides of the semiconductor layer; A pixel electrode directly provided on the first substrate and the drain electrode of the pixel region and electrically connected to the drain electrode; A gate insulating layer disposed on the source electrode and the drain electrode; A gate electrode disposed on the gate insulating layer; A black matrix and a color filter layer provided on the second substrate; And And a liquid crystal layer provided between the first substrate and the second substrate, Wherein the semiconductor layer directly contacts the upper surface of the first substrate and the upper surface thereof is in direct contact with the lower surface of the source electrode and the drain electrode, and the gate insulating layer is disposed over a partial region of the pixel electrode. The liquid crystal display element according to claim 5, wherein the semiconductor layer is made of a metal oxide semiconductor material. The liquid crystal display device according to claim 6, wherein the metal oxide semiconductor material is zinc oxide (ZnO) or zinc gallium oxide (GZO). delete delete delete delete delete delete delete delete delete delete delete The liquid crystal display element according to claim 5, wherein the semiconductor layer is made of a transparent semiconductor material and extends a predetermined distance from the source electrode and the drain electrode to transmit the semiconductor layer having the extended light.

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