JP2004055588A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP2004055588A JP2004055588A JP2002206881A JP2002206881A JP2004055588A JP 2004055588 A JP2004055588 A JP 2004055588A JP 2002206881 A JP2002206881 A JP 2002206881A JP 2002206881 A JP2002206881 A JP 2002206881A JP 2004055588 A JP2004055588 A JP 2004055588A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- main surface
- isolation
- gate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0144—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Landscapes
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002206881A JP2004055588A (ja) | 2002-07-16 | 2002-07-16 | 半導体装置およびその製造方法 |
| TW091135781A TW583735B (en) | 2002-07-16 | 2002-12-11 | Semiconductor device and manufacturing method for the same |
| US10/338,669 US20040012069A1 (en) | 2002-07-16 | 2003-01-09 | Semiconductor device and manufacturing method for the same |
| KR10-2003-0015945A KR100521511B1 (ko) | 2002-07-16 | 2003-03-14 | 반도체 장치 및 그 제조 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002206881A JP2004055588A (ja) | 2002-07-16 | 2002-07-16 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004055588A true JP2004055588A (ja) | 2004-02-19 |
| JP2004055588A5 JP2004055588A5 (https=) | 2005-10-27 |
Family
ID=30437469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002206881A Withdrawn JP2004055588A (ja) | 2002-07-16 | 2002-07-16 | 半導体装置およびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20040012069A1 (https=) |
| JP (1) | JP2004055588A (https=) |
| KR (1) | KR100521511B1 (https=) |
| TW (1) | TW583735B (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100700279B1 (ko) * | 2005-12-28 | 2007-03-26 | 동부일렉트로닉스 주식회사 | 플랫 노아 마스크롬의 제조 방법 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6150072A (en) * | 1997-08-22 | 2000-11-21 | Siemens Microelectronics, Inc. | Method of manufacturing a shallow trench isolation structure for a semiconductor device |
| US6130467A (en) * | 1997-12-18 | 2000-10-10 | Advanced Micro Devices, Inc. | Shallow trench isolation with spacers for improved gate oxide quality |
| US6051478A (en) * | 1997-12-18 | 2000-04-18 | Advanced Micro Devices, Inc. | Method of enhancing trench edge oxide quality |
| US6146975A (en) * | 1998-07-10 | 2000-11-14 | Lucent Technologies Inc. | Shallow trench isolation |
| EP1005079B1 (en) * | 1998-11-26 | 2012-12-26 | STMicroelectronics Srl | Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry |
| US6388303B1 (en) * | 1999-04-21 | 2002-05-14 | Sanyo Electric Co., Ltd. | Semiconductor device and semiconductor device manufacture method |
| US6498106B1 (en) * | 2001-04-30 | 2002-12-24 | Taiwan Semiconductor Manufacturing Company | Prevention of defects formed in photoresist during wet etching |
| US6900085B2 (en) * | 2001-06-26 | 2005-05-31 | Advanced Micro Devices, Inc. | ESD implant following spacer deposition |
-
2002
- 2002-07-16 JP JP2002206881A patent/JP2004055588A/ja not_active Withdrawn
- 2002-12-11 TW TW091135781A patent/TW583735B/zh not_active IP Right Cessation
-
2003
- 2003-01-09 US US10/338,669 patent/US20040012069A1/en not_active Abandoned
- 2003-03-14 KR KR10-2003-0015945A patent/KR100521511B1/ko not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100700279B1 (ko) * | 2005-12-28 | 2007-03-26 | 동부일렉트로닉스 주식회사 | 플랫 노아 마스크롬의 제조 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100521511B1 (ko) | 2005-10-12 |
| KR20040007235A (ko) | 2004-01-24 |
| US20040012069A1 (en) | 2004-01-22 |
| TW583735B (en) | 2004-04-11 |
| TW200402107A (en) | 2004-02-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6476444B1 (en) | Semiconductor device and method for fabricating the same | |
| US20070057288A1 (en) | Methods of Fabricating Semiconductor Devices with Enlarged Recessed Gate Electrodes | |
| JP2004064083A (ja) | 自己整列した接合領域コンタクトホールを有する半導体装置及びその製造方法 | |
| JP4480323B2 (ja) | 半導体デバイスの製造方法 | |
| US6847086B2 (en) | Semiconductor device and method of forming the same | |
| JP2000150806A (ja) | 半導体装置及びその製造方法 | |
| JP2002246485A (ja) | 不揮発性半導体記憶装置およびその製造方法 | |
| JP2004111429A (ja) | 半導体装置 | |
| JP2000036536A (ja) | 半導体素子の素子隔離構造及びその隔離方法 | |
| US6780691B2 (en) | Method to fabricate elevated source/drain transistor with large area for silicidation | |
| JP2004055588A (ja) | 半導体装置およびその製造方法 | |
| US7179713B2 (en) | Method of fabricating a fin transistor | |
| KR100834440B1 (ko) | 반도체 소자의 형성방법 | |
| JP2002190515A (ja) | 半導体装置およびその製造方法 | |
| JPH10242264A (ja) | 半導体装置の製造方法 | |
| JPH0969608A (ja) | 半導体装置の製造方法 | |
| JPH08264771A (ja) | 半導体装置及びその製造方法 | |
| JPH11163325A (ja) | 半導体装置及びその製造方法 | |
| JPH11274486A (ja) | 半導体装置およびその製造方法 | |
| JP3523244B1 (ja) | 半導体装置の製造方法 | |
| JPH0923007A (ja) | 半導体装置およびその製造方法 | |
| JPH10270544A (ja) | 半導体装置およびその製造方法 | |
| JPH11317444A (ja) | 半導体装置及びその製造方法 | |
| JPH0917856A (ja) | 半導体装置の製造方法 | |
| JP2709200B2 (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050712 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050712 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20060828 |