JP2003511003A5 - - Google Patents

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Publication number
JP2003511003A5
JP2003511003A5 JP2001527423A JP2001527423A JP2003511003A5 JP 2003511003 A5 JP2003511003 A5 JP 2003511003A5 JP 2001527423 A JP2001527423 A JP 2001527423A JP 2001527423 A JP2001527423 A JP 2001527423A JP 2003511003 A5 JP2003511003 A5 JP 2003511003A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2001527423A
Other languages
Japanese (ja)
Other versions
JP2003511003A (ja
Filing date
Publication date
Priority claimed from US09/405,977 external-priority patent/US6297974B1/en
Application filed filed Critical
Publication of JP2003511003A publication Critical patent/JP2003511003A/ja
Publication of JP2003511003A5 publication Critical patent/JP2003511003A5/ja
Ceased legal-status Critical Current

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JP2001527423A 1999-09-27 2000-07-18 集積回路に使用されるキャパシタの端子間のストレスを軽減するための方法および装置 Ceased JP2003511003A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/405,977 US6297974B1 (en) 1999-09-27 1999-09-27 Method and apparatus for reducing stress across capacitors used in integrated circuits
US09/405,977 1999-09-27
PCT/US2000/019623 WO2001024348A1 (en) 1999-09-27 2000-07-18 Method and apparatus for reducing stress across capacitors used in integrated circuits

Publications (2)

Publication Number Publication Date
JP2003511003A JP2003511003A (ja) 2003-03-18
JP2003511003A5 true JP2003511003A5 (enExample) 2007-08-16

Family

ID=23606020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001527423A Ceased JP2003511003A (ja) 1999-09-27 2000-07-18 集積回路に使用されるキャパシタの端子間のストレスを軽減するための方法および装置

Country Status (7)

Country Link
US (2) US6297974B1 (enExample)
JP (1) JP2003511003A (enExample)
KR (1) KR100438371B1 (enExample)
CN (1) CN1187884C (enExample)
AU (1) AU6109300A (enExample)
TW (1) TW473786B (enExample)
WO (1) WO2001024348A1 (enExample)

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US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
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US7123532B2 (en) 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
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US7317633B2 (en) 2004-07-06 2008-01-08 Saifun Semiconductors Ltd Protection of NROM devices from charge damage
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US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7535765B2 (en) 2004-12-09 2009-05-19 Saifun Semiconductors Ltd. Non-volatile memory device and method for reading cells
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US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US8400841B2 (en) 2005-06-15 2013-03-19 Spansion Israel Ltd. Device to program adjacent storage cells of different NROM cells
US7184313B2 (en) 2005-06-17 2007-02-27 Saifun Semiconductors Ltd. Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells
JP2007027760A (ja) 2005-07-18 2007-02-01 Saifun Semiconductors Ltd 高密度不揮発性メモリアレイ及び製造方法
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7638835B2 (en) 2006-02-28 2009-12-29 Saifun Semiconductors Ltd. Double density NROM with nitride strips (DDNS)
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7605579B2 (en) 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
US7629831B1 (en) * 2006-10-11 2009-12-08 Altera Corporation Booster circuit with capacitor protection circuitry
US8228175B1 (en) 2008-04-07 2012-07-24 Impinj, Inc. RFID tag chips and tags with alternative behaviors and methods
US8115597B1 (en) * 2007-03-07 2012-02-14 Impinj, Inc. RFID tags with synchronous power rectifier
KR20090105684A (ko) * 2008-04-03 2009-10-07 삼성전자주식회사 플래시 메모리 장치 및 그것을 위한 전압 발생회로
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KR200452404Y1 (ko) * 2008-08-11 2011-02-28 (주) 케이.아이.씨.에이 플러그의 착탈이 용이한 어댑터
IT1404156B1 (it) 2010-12-30 2013-11-15 St Microelectronics Srl Moltiplicatore di tensione
WO2012131425A1 (en) * 2011-03-25 2012-10-04 Freescale Semiconductor, Inc. Integrated circuit and method for reducing an impact of electrical stress in an integrated circuit
US9013938B1 (en) * 2011-12-02 2015-04-21 Cypress Semiconductor Corporation Systems and methods for discharging load capacitance circuits
CN103138248B (zh) * 2011-12-02 2016-02-24 赛普拉斯半导体公司 用于从负载电容电路释放电压的系统和方法
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CN105210278B (zh) * 2013-03-15 2018-04-03 维斯普瑞公司 充电泵系统和方法
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