JP2003209033A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2003209033A5 JP2003209033A5 JP2002004124A JP2002004124A JP2003209033A5 JP 2003209033 A5 JP2003209033 A5 JP 2003209033A5 JP 2002004124 A JP2002004124 A JP 2002004124A JP 2002004124 A JP2002004124 A JP 2002004124A JP 2003209033 A5 JP2003209033 A5 JP 2003209033A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- wafer
- inclined surface
- main surface
- mirror
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002093 peripheral effect Effects 0.000 claims 5
- 239000004065 semiconductor Substances 0.000 claims 5
- 238000000034 method Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 238000005498 polishing Methods 0.000 claims 1
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002004124A JP4162892B2 (ja) | 2002-01-11 | 2002-01-11 | 半導体ウェハおよびその製造方法 |
| US10/472,518 US6900522B2 (en) | 2002-01-11 | 2002-12-17 | Chamfered semiconductor wafer and method of manufacturing the same |
| PCT/JP2002/013164 WO2003060965A1 (en) | 2002-01-11 | 2002-12-17 | Semiconductor wafer and method for producing the same |
| EP02786107A EP1465242B1 (en) | 2002-01-11 | 2002-12-17 | Semiconductor wafer and method for producing the same |
| DE60217977T DE60217977T2 (de) | 2002-01-11 | 2002-12-17 | Halbleiterwafer und verfahren zu dessen herstellung |
| CNB028081331A CN1269185C (zh) | 2002-01-11 | 2002-12-17 | 半导体晶片及其制造方法 |
| KR10-2003-7012325A KR100536932B1 (ko) | 2002-01-11 | 2002-12-17 | 반도체 웨이퍼 및 그 제조 방법 |
| TW092100105A TWI291724B (en) | 2002-01-11 | 2003-01-03 | Semiconductor wafer and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002004124A JP4162892B2 (ja) | 2002-01-11 | 2002-01-11 | 半導体ウェハおよびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003209033A JP2003209033A (ja) | 2003-07-25 |
| JP2003209033A5 true JP2003209033A5 (https=) | 2005-03-17 |
| JP4162892B2 JP4162892B2 (ja) | 2008-10-08 |
Family
ID=19190960
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002004124A Expired - Lifetime JP4162892B2 (ja) | 2002-01-11 | 2002-01-11 | 半導体ウェハおよびその製造方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6900522B2 (https=) |
| EP (1) | EP1465242B1 (https=) |
| JP (1) | JP4162892B2 (https=) |
| KR (1) | KR100536932B1 (https=) |
| CN (1) | CN1269185C (https=) |
| DE (1) | DE60217977T2 (https=) |
| TW (1) | TWI291724B (https=) |
| WO (1) | WO2003060965A1 (https=) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3580311B1 (ja) * | 2003-03-28 | 2004-10-20 | 住友電気工業株式会社 | 表裏識別した矩形窒化物半導体基板 |
| US20050161808A1 (en) * | 2004-01-22 | 2005-07-28 | Anderson Douglas G. | Wafer, intermediate wafer assembly and associated method for fabricating a silicon on insulator wafer having an improved edge profile |
| US8710665B2 (en) * | 2008-10-06 | 2014-04-29 | Infineon Technologies Ag | Electronic component, a semiconductor wafer and a method for producing an electronic component |
| US20120028555A1 (en) * | 2010-07-30 | 2012-02-02 | Memc Electronic Materials, Inc. | Grinding Tool For Trapezoid Grinding Of A Wafer |
| JP2013008769A (ja) * | 2011-06-23 | 2013-01-10 | Sumitomo Electric Ind Ltd | 炭化珪素基板の製造方法 |
| TWI473283B (zh) * | 2011-09-21 | 2015-02-11 | 國立清華大學 | 晶片 |
| JP6130995B2 (ja) * | 2012-02-20 | 2017-05-17 | サンケン電気株式会社 | エピタキシャル基板及び半導体装置 |
| JP2015018960A (ja) * | 2013-07-11 | 2015-01-29 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JP6045542B2 (ja) * | 2014-09-11 | 2016-12-14 | 信越半導体株式会社 | 半導体ウェーハの加工方法、貼り合わせウェーハの製造方法、及びエピタキシャルウェーハの製造方法 |
| US10199216B2 (en) * | 2015-12-24 | 2019-02-05 | Infineon Technologies Austria Ag | Semiconductor wafer and method |
| JP6750592B2 (ja) * | 2017-08-15 | 2020-09-02 | 信越半導体株式会社 | シリコンウエーハのエッジ形状の評価方法および評価装置、シリコンウエーハ、ならびにその選別方法および製造方法 |
| JP7067465B2 (ja) * | 2018-12-27 | 2022-05-16 | 株式会社Sumco | 半導体ウェーハの評価方法及び半導体ウェーハの製造方法 |
| JP7549322B2 (ja) * | 2020-04-01 | 2024-09-11 | 株式会社ノベルクリスタルテクノロジー | 半導体基板及びその製造方法 |
| EP4170700A4 (en) * | 2021-09-07 | 2024-01-03 | JX Nippon Mining & Metals Corporation | INDIUM PHOSPHIDE SUBSTRATE |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS504544B1 (https=) * | 1970-12-21 | 1975-02-20 | ||
| JPH0624179B2 (ja) * | 1989-04-17 | 1994-03-30 | 信越半導体株式会社 | 半導体シリコンウェーハおよびその製造方法 |
| JP2719855B2 (ja) * | 1991-05-24 | 1998-02-25 | 信越半導体株式会社 | ウエーハ外周の鏡面面取り装置 |
| JP3027882B2 (ja) * | 1992-07-31 | 2000-04-04 | 信越半導体株式会社 | ウエーハ面取部研磨装置 |
| JP2825048B2 (ja) * | 1992-08-10 | 1998-11-18 | 信越半導体株式会社 | 半導体シリコン基板 |
| JP2827885B2 (ja) * | 1994-02-12 | 1998-11-25 | 信越半導体株式会社 | 半導体単結晶基板およびその製造方法 |
| JPH09251934A (ja) * | 1996-03-18 | 1997-09-22 | Hitachi Ltd | 半導体集積回路装置の製造方法および半導体ウエハ |
| JP3328193B2 (ja) * | 1998-07-08 | 2002-09-24 | 信越半導体株式会社 | 半導体ウエーハの製造方法 |
| JP3516203B2 (ja) * | 1999-11-08 | 2004-04-05 | 株式会社日鉱マテリアルズ | 化合物半導体ウェハ |
| JP4846915B2 (ja) * | 2000-03-29 | 2011-12-28 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
-
2002
- 2002-01-11 JP JP2002004124A patent/JP4162892B2/ja not_active Expired - Lifetime
- 2002-12-17 EP EP02786107A patent/EP1465242B1/en not_active Expired - Lifetime
- 2002-12-17 KR KR10-2003-7012325A patent/KR100536932B1/ko not_active Expired - Lifetime
- 2002-12-17 US US10/472,518 patent/US6900522B2/en not_active Expired - Lifetime
- 2002-12-17 DE DE60217977T patent/DE60217977T2/de not_active Expired - Lifetime
- 2002-12-17 WO PCT/JP2002/013164 patent/WO2003060965A1/ja not_active Ceased
- 2002-12-17 CN CNB028081331A patent/CN1269185C/zh not_active Expired - Lifetime
-
2003
- 2003-01-03 TW TW092100105A patent/TWI291724B/zh not_active IP Right Cessation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2003209033A5 (https=) | ||
| CN101673679B (zh) | 薄型半导体晶片和减薄半导体晶片的方法 | |
| TWI237587B (en) | Novel finishing pad design for multidirectional use | |
| WO2003043071A1 (en) | Grinding pad and method of producing the same | |
| JP2003031650A5 (https=) | ||
| WO2003083918A1 (en) | Polishing pad and semiconductor substrate manufacturing method using the polishing pad | |
| JP2005515514A5 (https=) | ||
| EP0950466A3 (en) | Method for chamfering a wafer | |
| WO2008120578A1 (ja) | 金属膜研磨用パッドおよびそれを用いる金属膜の研磨方法 | |
| JP5472073B2 (ja) | 半導体ウェーハ及びその製造方法 | |
| JP2005509896A5 (https=) | ||
| JP2024156000A5 (https=) | ||
| JP2025015717A5 (https=) | ||
| NO20031079D0 (no) | Hydrofiliske overflater som b¶rer midlertidige beskyttende lag | |
| JP2005136311A5 (https=) | ||
| JPH11320743A5 (https=) | ||
| CN109844909A (zh) | 晶片的制造方法及晶片 | |
| US6767841B2 (en) | Process for producing a semiconductor wafer | |
| JP2002033282A5 (https=) | ||
| JP2004006960A5 (ja) | 誘電体膜 | |
| JP2004079968A5 (https=) | ||
| JPH0727747U (ja) | 半導体ウエハ等の研磨用キャリア | |
| JP2018124282A5 (https=) | ||
| JP6256576B1 (ja) | エピタキシャルウェーハ及びその製造方法 | |
| JP2006517351A5 (https=) |