JP2003168756A - 放熱板と基板とのパッケージ - Google Patents

放熱板と基板とのパッケージ

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Publication number
JP2003168756A
JP2003168756A JP2002193558A JP2002193558A JP2003168756A JP 2003168756 A JP2003168756 A JP 2003168756A JP 2002193558 A JP2002193558 A JP 2002193558A JP 2002193558 A JP2002193558 A JP 2002193558A JP 2003168756 A JP2003168756 A JP 2003168756A
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JP
Japan
Prior art keywords
substrate
chip
adhesive
package
heat sink
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002193558A
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English (en)
Inventor
Hung Chin
ヒュン チン
Ching-Yi Hu
チンイー ヒュー
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Orient Semiconductor Electronics Ltd
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Orient Semiconductor Electronics Ltd
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Application filed by Orient Semiconductor Electronics Ltd filed Critical Orient Semiconductor Electronics Ltd
Publication of JP2003168756A publication Critical patent/JP2003168756A/ja
Pending legal-status Critical Current

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

(57)【要約】 【課題】 均一の厚さの接着剤膜が得られ、厚さが容易
に制御でき、異なる封じ形態、サイズを切り替える場合
に、ノズルの位置決めの設定、ノズルの洗浄などの動作
の無駄な時間がなく、直接に同じ方法で膠を付けること
ができる放熱板と基板とのパッケージを提供する。 【解決手段】 基板１にはチップ２を接合する位置が設
けられ、チップ２を基板１に接合する。しかも、電気導
通するように接続させる。そして、網板印刷の方式で接
着剤４１を適当な厚さの接着剤層へこそぎ取る。放熱板
３は殻体薄片であり、チップ２を覆う。放熱板３の底面
に凸点３１が設置され、基板１に膠で粘着する。封じ膠
５はチップ２、放熱板３を覆う。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は放熱板と基板とのパ
ッケージに関するものである。
【０００２】
【従来の技術】集積程度が大きくチップの体積が小さい
場合に、チップが作動していると高熱が生じる。そのと
きに、コンポネットを封じるときはまず放熱板でチップ
を覆う。続いて放熱板を封じて、放熱の効果を向上させ
る。従来の放熱板を接合するプロセスを図１〜図４に示
す。まず、基板１’に、チップ２’を接合する。しか
も、基板１’における放熱板３’の底面凸点３１’（di
mple）に対応した位置には、接着剤を注入してあるノズ
ル４’で、四点に適量の塗装剤用量の接着剤４１’を噴
出する。放熱板３’の底面凸点３１’を接着剤４１’に
合わせて押し合わせたあとで、封じ膠５’で、放熱板
３’を覆う。
【０００３】
【発明が解決しようとする課題】しかし、上述した放熱
板３’を基板１’に粘着する従来の既存のプロセスは現
場で実施すると、次の欠点がある。上述基板１’に放熱
板３’を粘着する方式はまずノズル４’で、適量の膠を
四つの対応凸点３１’の位置に噴出する。ノズル４’に
充填した接着剤４１’は物理化学性質により、または接
着剤４１’の充填量が減ることにより、粘度の特性が変
化しやすいので、常にマシンから出てくる膠量が不安定
になる恐れがある。噴出した接着剤４１’の塗装量が足
りなければ放熱板３’の粘着力が足りないので、接着剤
４１’硬化のあとの接着力も不充分である。それによ
り、熱処理のときに放熱板３’が落下しやすい。それに
対して、接着剤４１’が量を越す場合には、内部に覆っ
たチップの電気接合に失敗が起こる。また、ノズル４’
から噴射する接着剤４１’の使用により接着剤の配分不
良が多いので、断線、リードワイヤ不良も電気の接合に
影響を及ぼす。接着剤４１’の流量が多過ぎると、頻繁
的にそれが基板に垂れてしまうなどの問題が生じる。
【０００４】また、ノズル４’から噴射する接着剤４
１’の塗装位置または厚さが少し変化しただけでも、放
熱板３’の組み立ての際に凸点３１’に付けてある膠量
が均一にならない。さらにひどくなると、接着剤４１’
が全く付かず、放熱板３’の固定が悪くなったりはずれ
たりする現象が起きる。
【０００５】その他、従来は膠の添加はワンポイントず
つしなければならないので、封じ形態を変えたり、サイ
ズを切り替える場合に、ノズル４’の位置決めの設定、
ノズル４’の洗浄をしなければならないので、プロセス
の効率が悪くなる。上述の問題を解決するための本発明
の主な目的は、均一の厚さの接着剤膜が得られる放熱板
と基板とのパッケージを提供することにある。
【０００６】本発明のもう一つの目的は厚さが容易に制
御できる放熱板と基板とのパッケージを提供することに
ある。本発明のもう一つの目的は異なる封じ形態、サイ
ズを切り替える場合に、ノズルの位置決めの設定、ノズ
ルの洗浄など動作の無駄時間がなく、直接に同じ方法で
膠を付けることができる放熱板と基板とのパッケージを
提供することにある。
【０００７】
【課題を解決するための手段】上記課題を解決するため
の本発明の放熱板と基板とのパッケージは主に、網板印
刷の方式で、接着剤を適当な厚さの接着剤層へこそぎ取
って、膠を放熱板の凸点に付ける。そのような方法で、
均一の厚さの接着剤膜が得られ、放熱板の凸点にも、均
一の接着剤の厚さを確保することができる。
【０００８】また、網板印刷の方式で接着剤層を作るの
で、厚さが容易に制御され、異なる封じ形態、サイズを
切り替える場合に、ノズルの位置決めの設定、ノズルの
洗浄など動作の無駄時間がなく、直接に同じ方法で膠を
付けることができる。
【０００９】
【発明の実施の形態】本発明の目的、特徴および効果な
どを明解にするために、以下にさらに具体的な実施例を
図面とあわせて詳しく説明する。図５〜図１０を参照す
る。本発明の一実施例による放熱板と基板とのパッケー
ジの主な構造は、以下の要素から形成される。
【００１０】基板１には、セミコンダクターチップ２を
接合する位置が設けられる。少なくとも、一枚のチップ
２を基板１に接合する。しかも、電気導通するように接
続させる。網板印刷の方式で、接着剤を適当な厚さの接
着剤層へこそぎ取る。
【００１１】放熱板３は殻体薄片であり、チップ２を覆
う。放熱板の底面に、凸点３１が設置され、そして基板
１に膠で粘着する。封じ膠５はチップ２、放熱板３を覆
う。以上のコンポネットで、主なプロセスは次のとおり
である。
【００１２】（ａ）図５に示すように、チップ２をワイ
ヤリング成型の方式で、基板１に接合する。網板印刷の
方式で、こそぎ取る板４を利用し、接着剤４１を平板４
３では均一かつ適当な厚さの接着剤層４２までこそぎ取
る。 （ｂ）図６、７、８に示すように、アブソーバー３２
で、放熱板３を接着剤層４２まで移動させる。しかも、
放熱板３の凸点３１に接着剤層４２から、適量の接着剤
４１を付けさせる。のちに、放熱板３を基板１のチップ
２の上方へ移動させる。
【００１３】（ｃ）図９に示すように、放熱板３を下へ
基板１およびチップ２に押す。放熱板３を接着し固定さ
せる。 （ｄ）図１０に示すように、封じ膠５で放熱板３を覆っ
て、パッケージ６を形成する。なお、上述のプロセス
（ａ）において、チップ２と基板１との接合方式はチッ
プ覆いという接合の方式を採用してもよい。プロセス
（ｄ）は、封じ膠５の覆い作業において、封じ膠５から
一部分の放熱板３の表面を露出させて、局部に封じ膠５
の覆いがなくてもよい。それで、優れた放熱効果を提供
する。
【図面の簡単な説明】
【図１】従来の放熱板と基板との接着ユニットを示す斜
視図である。
【図２】従来の放熱板と基板との接着ユニットの接着の
プロセスを示す断面図である。
【図３】従来の放熱板と基板との接着ユニットの接着の
プロセスを示す断面図である。
【図４】従来の放熱板と基板との接着ユニットの接着の
プロセスを示す断面図である。
【図５】本発明の一実施例による放熱板と基板とのパッ
ケージの接着プロセスを示す断面図である。
【図６】本発明の一実施例による放熱板と基板とのパッ
ケージの接着プロセスを示す断面図である。
【図７】本発明の一実施例による放熱板と基板とのパッ
ケージの接着プロセスを示す断面図である。
【図８】図７の要部の拡大図である。
【図９】本発明の一実施例による放熱板と基板とのパッ
ケージの接着プロセスを示す断面図である。
【図１０】本発明の一実施例による放熱板と基板とのパ
ッケージの接着プロセスを示す断面図である。
【符号の説明】
１ 基板 ２ チップ ３ 放熱板 ５ 封じ膠 ３１ 凸点 ３２ アブソーバー ４１ 接着剤 ４２ 接着剤層 ４３ 平板
───────────────────────────────────────────────────── フロントページの続き (72)発明者 ヒュー チンイー タイワン カオシュン シティ， ナン ツー ディストリクト， ショウ ミン ロード， ランク 99， ナンバー16 Ｆターム(参考） 5F036 AA01 BA04 BA23 BB01 BC05 BC33

Claims (4)

    【特許請求の範囲】
  1. 【請求項１】 放熱板と基板とのパッケージにおいて、 基板には、セミコンダクターチップを接合する位置が設
    けられ、 少なくとも一枚のチップを前記基板に接合し、電気導通
    するように接続させ、 網板印刷の方式で接着剤を適当な厚さの接着剤層へこそ
    ぎ取り、 放熱板は殻体薄片であり、チップを覆い、前記放熱板の
    底面に凸点が設置され、前記基板に膠で粘着し、 封じ膠は前記チップおよび前記放熱板を覆い、 （ａ）前記チップを前記基板に接合し、網板印刷の技術
    でこそぎ取る板を利用し、前記接着剤は平板では均一か
    つ適当な厚さの前記接着剤層までこそぎ取られ、 （ｂ）アブソーバーで前記放熱板を前記接着剤層まで移
    動させ、前記放熱板の前記凸点に前記接着剤層から適量
    の接着剤が付けられ、 （ｃ）前記放熱板を前記基板の前記チップの上方へ移動
    させたあとで、前記放熱板を下へ前記基板およびチップ
    に押し付け、前記放熱板が接着し固定され、 （ｄ）前記封じ膠で前記放熱板を覆ってパッケージが形
    成されることを特徴とする放熱板と基板とのパッケー
    ジ。
  2. 【請求項２】 前記（ａ）では前記チップをワイヤリン
    グ接合技術により、リードワイヤで前記基板に接合させ
    ることを特徴とする請求項１記載の放熱板と基板とのパ
    ッケージ。
  3. 【請求項３】 前記（ａ）では前記チップをチップの覆
    いという接合技術で、前記基板に接合してもよいことを
    特徴とする請求項１記載の放熱板と基板とのパッケー
    ジ。
  4. 【請求項４】 前記（ｄ）では前記放熱板の部分表面に
    前記封じ膠を覆わなくてもよいことを特徴とする請求項
    １記載の放熱板と基板とのパッケージ。
JP2002193558A 2001-11-29 2002-07-02 放熱板と基板とのパッケージ Pending JP2003168756A (ja)

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TW090129769 2001-11-29
TW090129769A TW517365B (en) 2001-11-29 2001-11-29 Heat dissipation plate and its bonding process with substrate

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JP2003168756A true JP2003168756A (ja) 2003-06-13

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JP2007165486A (ja) * 2005-12-12 2007-06-28 Shinko Electric Ind Co Ltd 放熱板及び半導体装置

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JP4666337B2 (ja) * 2001-05-24 2011-04-06 フライズ メタルズ インコーポレイテッド 熱界面材およびヒートシンク配置
US6921974B2 (en) * 2003-03-28 2005-07-26 United Test & Assembly Center Ltd. Packaged device with thermal enhancement and method of packaging
US8672281B2 (en) 2003-10-16 2014-03-18 Illinois Tool Works Inc. Rod hanger for securing a rod to a substrate
TWI292612B (en) * 2006-02-27 2008-01-11 Siliconware Precision Industries Co Ltd Semiconductor package and fabrication method thereof
US8022512B2 (en) * 2006-02-28 2011-09-20 Unisem (Mauritus) Holdings Limited No lead package with heat spreader
US20070215997A1 (en) * 2006-03-17 2007-09-20 Martin Standing Chip-scale package
US20100327421A1 (en) * 2009-06-30 2010-12-30 Stmicroelectronics Asia Pacific Pte. Ltd. Ic package design with stress relief feature
CN112670192A (zh) * 2020-12-25 2021-04-16 苏州科阳半导体有限公司 一种晶圆级封装工艺及晶圆级封装结构

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TW400631B (en) * 1999-01-06 2000-08-01 Walsin Advanced Electronics Chip package structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165486A (ja) * 2005-12-12 2007-06-28 Shinko Electric Ind Co Ltd 放熱板及び半導体装置

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