JP2002543621A5 - 多次元に積層されたチップ積層体を保安するための方法 - Google Patents

多次元に積層されたチップ積層体を保安するための方法 Download PDF

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Publication number
JP2002543621A5
JP2002543621A5 JP2000616069A JP2000616069A JP2002543621A5 JP 2002543621 A5 JP2002543621 A5 JP 2002543621A5 JP 2000616069 A JP2000616069 A JP 2000616069A JP 2000616069 A JP2000616069 A JP 2000616069A JP 2002543621 A5 JP2002543621 A5 JP 2002543621A5
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JP
Japan
Prior art keywords
multidimensionally
securing
laminated chip
chip laminate
laminate
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Pending
Application number
JP2000616069A
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English (en)
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JP2002543621A (ja
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Priority claimed from PCT/EP2000/003834 external-priority patent/WO2000067319A1/de
Publication of JP2002543621A publication Critical patent/JP2002543621A/ja
Publication of JP2002543621A5 publication Critical patent/JP2002543621A5/ja
Pending legal-status Critical Current

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JP2000616069A 1999-05-03 2000-04-27 多次元に積層されたチップステープルを保安するための方法および装置 Pending JP2002543621A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP99108768 1999-05-03
EP99108768.5 1999-05-03
PCT/EP2000/003834 WO2000067319A1 (de) 1999-05-03 2000-04-27 Verfahren und vorrichtung zur sicherung eines mehrdimensional aufgebauten chipstapels

Publications (2)

Publication Number Publication Date
JP2002543621A JP2002543621A (ja) 2002-12-17
JP2002543621A5 true JP2002543621A5 (ja) 2006-11-30

Family

ID=8238103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000616069A Pending JP2002543621A (ja) 1999-05-03 2000-04-27 多次元に積層されたチップステープルを保安するための方法および装置

Country Status (6)

Country Link
US (1) US6853085B2 (ja)
EP (1) EP1186039B1 (ja)
JP (1) JP2002543621A (ja)
CN (1) CN1188911C (ja)
DE (1) DE50013722D1 (ja)
WO (1) WO2000067319A1 (ja)

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DE10058078C1 (de) * 2000-11-23 2002-04-11 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Analysierschutz und Verfahren zur Herstellung der Anordnung
DE10105725B4 (de) 2001-02-08 2008-11-13 Infineon Technologies Ag Halbleiterchip mit einem Substrat, einer integrierten Schaltung und einer Abschirmvorrichtung
DE10135812C1 (de) * 2001-07-23 2002-10-24 Infineon Technologies Ag Integrierter Halbleiterschaltkreis mit Kontaktstellen und Anordnung mit mindestens zwei solchen Schaltkreisen
FR2848025B1 (fr) * 2002-11-28 2005-02-11 Gemplus Card Int Protection d'un composant par nappe conductrice a contact aleatoire
US7313690B2 (en) * 2003-06-27 2007-12-25 Microsoft Corporation Three way validation and authentication of boot files transmitted from server to client
DE102005005622B4 (de) * 2005-02-08 2008-08-21 Infineon Technologies Ag Sicherheits-Chipstapel und ein Verfahren zum Herstellen eines Sicherheits-Chipstapels
WO2007086046A2 (en) * 2006-01-24 2007-08-02 Nds Limited Chip attack protection
TWI293499B (en) 2006-01-25 2008-02-11 Advanced Semiconductor Eng Three dimensional package and method of making the same
TWI287273B (en) * 2006-01-25 2007-09-21 Advanced Semiconductor Eng Three dimensional package and method of making the same
US7923830B2 (en) * 2007-04-13 2011-04-12 Maxim Integrated Products, Inc. Package-on-package secure module having anti-tamper mesh in the substrate of the upper package
US7868441B2 (en) * 2007-04-13 2011-01-11 Maxim Integrated Products, Inc. Package on-package secure module having BGA mesh cap
EP2009693A1 (fr) * 2007-06-29 2008-12-31 Axalto S.A. Procédé de fabrication d'un système électronique sécurisé, dispositif de sécurisation de circuit intégré et système électronique correspondants
JP5671200B2 (ja) * 2008-06-03 2015-02-18 学校法人慶應義塾 電子回路
DE102008036422A1 (de) * 2008-08-05 2010-02-11 Infineon Technologies Ag Halbleiter-Chip mit Prüfeinrichtung
JP5641701B2 (ja) * 2009-03-25 2014-12-17 株式会社東芝 三次元半導体集積回路
CN102959417B (zh) * 2011-06-09 2016-02-10 松下电器产业株式会社 三维集成电路及其测试方法
FR2986632B1 (fr) * 2012-02-06 2016-02-12 Altis Semiconductor Snc Protection d'un circuit integre contre des attaques invasives
EP2680184A1 (fr) * 2012-06-27 2014-01-01 EM Microelectronic-Marin SA Circuit intégré protégé contre des intrusions d'un pirate
JP2014138389A (ja) * 2013-01-18 2014-07-28 Canon Inc 送信装置、受信装置、情報処理システム、制御方法及び通信方法
US8896086B1 (en) 2013-05-30 2014-11-25 Freescale Semiconductor, Inc. System for preventing tampering with integrated circuit
GB201311834D0 (en) 2013-07-02 2013-08-14 Qinetiq Ltd Electronic hardware assembly
CN105891651B (zh) 2015-01-16 2019-12-10 恩智浦美国有限公司 低功率开路检测系统
US9455233B1 (en) 2015-12-02 2016-09-27 Freescale Semiconductor, Inc. System for preventing tampering with integrated circuit
FR3058246A1 (fr) * 2016-10-31 2018-05-04 Stmicroelectronics (Rousset) Sas Dispositif comprenant un empilement de puces electroniques
FR3071101A1 (fr) * 2017-09-11 2019-03-15 Stmicroelectronics (Rousset) Sas Empilement de puces

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JPS61203656A (ja) * 1985-03-06 1986-09-09 Nec Corp 集積回路ケ−ス
EP0221351B1 (de) * 1985-10-22 1991-09-25 Siemens Aktiengesellschaft Integrierte Halbleiterschaltung mit einem elektrisch leitenden Flächenelement
US5106773A (en) * 1990-10-09 1992-04-21 Texas Instruments Incorporated Programmable gate array and methods for its fabrication
US5229647A (en) * 1991-03-27 1993-07-20 Micron Technology, Inc. High density data storage using stacked wafers
US5072331A (en) * 1991-04-26 1991-12-10 Hughes Aircraft Company Secure circuit structure
US5196920A (en) * 1992-04-21 1993-03-23 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device for limiting capacitive coupling between adjacent circuit blocks
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
DE4427515C1 (de) 1994-08-03 1995-08-24 Siemens Ag Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung
US5818112A (en) * 1994-11-15 1998-10-06 Siemens Aktiengesellschaft Arrangement for capacitive signal transmission between the chip layers of a vertically integrated circuit
US5701037A (en) * 1994-11-15 1997-12-23 Siemens Aktiengesellschaft Arrangement for inductive signal transmission between the chip layers of a vertically integrated circuit
TW471144B (en) * 1995-03-28 2002-01-01 Intel Corp Method to prevent intrusions into electronic circuitry
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