JP2002500479A - ネットワーク・アプリケーション・データを表示するテレビジョン・システムにおいて実現されるフリッカ・フィルタ及びインタレーサ - Google Patents

ネットワーク・アプリケーション・データを表示するテレビジョン・システムにおいて実現されるフリッカ・フィルタ及びインタレーサ

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Publication number
JP2002500479A
JP2002500479A JP2000527088A JP2000527088A JP2002500479A JP 2002500479 A JP2002500479 A JP 2002500479A JP 2000527088 A JP2000527088 A JP 2000527088A JP 2000527088 A JP2000527088 A JP 2000527088A JP 2002500479 A JP2002500479 A JP 2002500479A
Authority
JP
Japan
Prior art keywords
filtered
lines
line
pixel data
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000527088A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002500479A5 (enExample
Inventor
ヴラッド ブリル,
Original Assignee
テルクルーズ テクノロジー インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by テルクルーズ テクノロジー インコーポレイテッド filed Critical テルクルーズ テクノロジー インコーポレイテッド
Publication of JP2002500479A publication Critical patent/JP2002500479A/ja
Publication of JP2002500479A5 publication Critical patent/JP2002500479A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/012Conversion between an interlaced and a progressive signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • H04N7/0132Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S348/00Television
    • Y10S348/91Flicker reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Graphics (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Television Systems (AREA)
  • Picture Signal Circuits (AREA)
JP2000527088A 1997-12-31 1998-12-14 ネットワーク・アプリケーション・データを表示するテレビジョン・システムにおいて実現されるフリッカ・フィルタ及びインタレーサ Pending JP2002500479A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/001,304 US6072530A (en) 1997-12-31 1997-12-31 Flicker filter and interlacer implemented in a television system displaying network application data
US09/001,304 1997-12-31
PCT/US1998/026545 WO1999034596A1 (en) 1997-12-31 1998-12-14 Flicker filter and interlacer implemented in a television system displaying network application data

Publications (2)

Publication Number Publication Date
JP2002500479A true JP2002500479A (ja) 2002-01-08
JP2002500479A5 JP2002500479A5 (enExample) 2006-09-21

Family

ID=21695353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000527088A Pending JP2002500479A (ja) 1997-12-31 1998-12-14 ネットワーク・アプリケーション・データを表示するテレビジョン・システムにおいて実現されるフリッカ・フィルタ及びインタレーサ

Country Status (8)

Country Link
US (1) US6072530A (enExample)
EP (1) EP1044562A1 (enExample)
JP (1) JP2002500479A (enExample)
KR (1) KR20010032565A (enExample)
CN (1) CN1283363A (enExample)
AU (1) AU1824399A (enExample)
CA (1) CA2316234C (enExample)
WO (1) WO1999034596A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005062693A (ja) * 2003-08-19 2005-03-10 Sony Corp メモリコントローラおよびメモリコントロール方法、その方法を実行するためのプログラム、レート変換装置および画像信号処理装置
US7869085B2 (en) 2003-08-19 2011-01-11 Sony Corporation Memory controller, memory control method, rate conversion apparatus, rate conversion method, image-signal-processing apparatus, image-signal-processing method, and program for executing each of those methods

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4008580B2 (ja) * 1998-06-25 2007-11-14 株式会社東芝 表示制御装置およびインターレースデータ表示制御方法
FR2797979B1 (fr) * 1999-08-24 2002-05-24 St Microelectronics Sa Procede et systeme de filtrage anti-scintillement
US7034887B2 (en) * 2002-07-15 2006-04-25 Seiko Epson Corporation Method and apparatus for flicker filtering interlaced display data
CN102148920B (zh) * 2010-02-09 2013-03-13 联发科技股份有限公司 同步信号限幅装置与同步信号限幅方法
KR101995553B1 (ko) * 2013-01-16 2019-07-03 삼성디스플레이 주식회사 표시 장치의 타이밍 컨트롤러 및 이의 구동 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5327156A (en) * 1990-11-09 1994-07-05 Fuji Photo Film Co., Ltd. Apparatus for processing signals representative of a computer graphics image and a real image including storing processed signals back into internal memory
US5355328A (en) * 1991-09-27 1994-10-11 Northshore Laboratories, Inc. Resampling apparatus suitable for resizing a video image
US5510843A (en) * 1994-09-30 1996-04-23 Cirrus Logic, Inc. Flicker reduction and size adjustment for video controller with interlaced video output
US5742349A (en) * 1996-05-07 1998-04-21 Chrontel, Inc. Memory efficient video graphics subsystem with vertical filtering and scan rate conversion
US5781241A (en) * 1996-11-08 1998-07-14 Chrontel, Inc. Apparatus and method to convert computer graphics signals to television video signals with vertical and horizontal scaling requiring no frame buffers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005062693A (ja) * 2003-08-19 2005-03-10 Sony Corp メモリコントローラおよびメモリコントロール方法、その方法を実行するためのプログラム、レート変換装置および画像信号処理装置
US7869085B2 (en) 2003-08-19 2011-01-11 Sony Corporation Memory controller, memory control method, rate conversion apparatus, rate conversion method, image-signal-processing apparatus, image-signal-processing method, and program for executing each of those methods

Also Published As

Publication number Publication date
WO1999034596A1 (en) 1999-07-08
CA2316234A1 (en) 1999-07-08
EP1044562A1 (en) 2000-10-18
KR20010032565A (ko) 2001-04-25
CA2316234C (en) 2008-03-04
US6072530A (en) 2000-06-06
CN1283363A (zh) 2001-02-07
AU1824399A (en) 1999-07-19

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