TWI313021B - Single-chip integration architecture of 3d y/c comb filter and interlace-to-progressive converter - Google Patents

Description

1313021 :Technical surface of the genus of the duck, 3⁄4 front technical balance, the axis of the enemy type simple butterfly 3 玖, invention description ___ [Technical field of the invention] FIELD OF THE INVENTION The present invention generally relates to the field of display devices, A method and system for integrating multiple video functions on a single integrated circuit die. More specifically, the present invention relates to a 3D filter and an interleaving-gradation

A method and system for single chip integration into a converter. BACKGROUND OF THE INVENTION Conventional television monitors typically present video images in the form of a sequence of fast video fields, changing at high frequencies, creating motion images, television cameras and other video sources typically not A full frame image is produced, but such a video source typically produces a field containing about half of the lines of each full frame image at a rate of 60 such fields per second (in an interlaced system). The other field contains additional lines of video data. In other words, a field contains odd 15 lines and the next field contains bribes. Because of &, the field of each video can be identified as an "odd" field or an "even" field. In a typical interleaving system, the sequence of video fields alternates between odd and even fields. A conventional television monitor that receives the field sequence sequentially reproduces each video field. Each video field is displayed on the TV screen with only half of the scan lines 2〇. For example, first the odd field is displayed by using odd scan lines, then the even field is displayed by using even field lines, and so on. The television scans the raster of the screen from the upper left to the upper right to generate a _scan line. The raster is then returned to the left edge of the screen to a position slightly below the original position. However, the position where the grating is returned is not immediately below the first scanning line, but allows 0 consecutive pages. (Note that the page is not sufficient for use, please note and use the continuation page) 1313021 Description of the invention Continued page, invention Description. The raster then has enough space to accommodate the interlaced scan lines of the other field. Scans to the right edge of the screen, produces a second sweep line, and continues to the bottom edge of the screen. The distance between the scan lines is a function of the size of the monitor, but it is usually allowed to draw the inserted scan line (the first scan line of the other field) after the completion of the first field. After scanning each scan line, the raster returns invisibly to the left edge of the screen, which is a retrace or horizontal recovery phase, which is much faster than the visible left-to-right line. In this case, a scan line can be generated that works about the strip (in the dominant US _ (four) type 卜 (four) 0 video frame 'displays half of the frame in each field. - Once the bottom edge of the screen is reached, the grating Just during the vertical blanking interval, during the invisible return to the original position in the upper left corner. The horizontal and vertical blanking interval phases are fast and invisible. For traditional television, this interlaced scanning method is vertical. A suitable compromise between recovery rate, vertical resolution, and bandwidth of 15 limits. However, the method used by conventional TV systems for the alternation between odd and even frames is known to have various disadvantages. 'such as line flashing, slamming, point-spinning, limited horizontal resolution, flashing pseudo-color, and large-area flicker. Various techniques have been developed, such as 30 comb filter 2〇, interlaced-progressive Transform, and field rate up-conversion to double field rate output, overcomes these shortcomings of the traditional number. However, 3D comb data and interleaved-forward converters ("IPC,") require several fields of record In a typical prior art solution, the 3D comb filter and the ipc are separate, integrated wafers. Therefore, two separate memory chips are required (0 consecutive pages) , please note and use the continuation page) 1313021 玖, invention description, invention, continuation page, for example, DRAM) '3D comb filter and ipc each one wafer. However 'using separate memory chips for each of these components, This results in high system cost. And 'as the number of separate components increases, the physical space required to install them also increases. Therefore, prior art systems have undesirably high manufacturing costs and large form factors associated with them. Summary of the Invention [Requires a method and system 1整合 structure for integrating a 3D γ/c comb filter and an interleaving-increment converter (or a field rate upconverter) on a single 1C wafer so that they can share a single Frame buffer (memory), thus reducing the form factor and manufacturing cost of the structure. In addition, there is a further need for a single-chip integrated 3D Y/c comb Filters and parent-to-inverter converter methods and systems that provide the same or better performance than currently existing multi-chip solutions, while having 15 small form factors and reduced manufacturing costs. SUMMARY OF THE INVENTION A method and system for a single wafer integrated 3D Y/C comb filter and interleaving-progressive converter is provided that substantially eliminates or reduces the use of prior art for providing Y/c comb filtering and Disadvantages and problems associated with multi-wafer methods and systems that interleave progressive transform. More specifically, one embodiment of the present invention provides a single-chip integrated structure that includes an integrated wafer for receiving and processing video signals, where The cymbal includes a comb filter, an interleaving-progressive converter, and a plurality of data channels for communication of video number seven with its processed components. The structure may also include a frame buffer for storing one or more contiguous pages from the video signal processing (said that the bribe is not sour) please use the continuation page

The integrated wafer is also 1313021, invented by the frame 'where the frame buffer is communicably connected to the integrated wafer. A memory controller can be included for coordinating read and write requests from the comb filter and from the IPC to the frame buffer. Alternatively, the memory controller can be a separate component from the integrated wafer that is communicatively coupled to the integrated wafer and frame buffer. The plurality of data channels can also include legs and connectors for transferring signals to the integrated wafer within the integrated wafer and outside of the integrated wafer. A technical advantage of the method and system architecture for integrating 3D Y/C comb filters and interleaving-incremental transforms on a single 1C wafer is that they share a single frame buffer, thus reducing the form factor and manufacturing cost of the structure. Another technical advantage of the method and system for single-chip integrated 3D Y/C comb filters and interleaved-forward converters is that they can provide the same or better performance than currently existing multi-chip solutions. At the same time, it has a small form factor and reduced manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS The present invention and its advantages will be more fully understood from the following description in conjunction with the accompanying drawings in which <RTIgt; A block diagram of a prior art multi-wafer structure of progressive transform and frame buffering. 2〇 Figure 2 is a simplified block diagram of an embodiment of a single wafer integration system of the present invention. C EMBODIMENT 3 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention is shown in the drawings, and the same number 0 continuation page is used. (When the description of the invention is insufficient, please note and use the continuation page) 1313021 Continued on page 4a for the same and corresponding components on each of the figures. The present invention includes various embodiments of a structure that integrates a 3D Y/c comb filter and a cross-progressive converter (or alternatively, a field rate upconverter) on a single wafer such that they can share a single frame buffer. The embodiment of the present invention thus provides the advantage of a more compact form factor that occupies less space on the board and provides reduced manufacturing costs without compromising performance relative to prior art methods and systems. Unlike prior art solutions requiring multiple separate wafer blocks, the present invention requires only a single frame buffer wafer to be communicatively coupled to a single 10 wafer incorporating an integrated 3D Y/c comb filter and ipc. Figure 1 is a block diagram of a prior art multi-chip structure 10 including two separate IC wafers 60 and 65. The 1C wafer 60 includes a 3D comb filter 20 for performing Y/c separation, and a memory controller 3A. The IC chip 65 includes a cross-progressive converter 25 and a second memory controller 3''. Alternatively, the progressive converter 25 may alternatively include a field rate upconverter. The interleaved-inverter converter supplies the simultaneously accumulated image information as an output signal, and then outputs it line by line or sequentially instead of interleaving. The result is a non-interlaced image with full vertical and horizontal resolution acquired during a single fast shutter process. The structure 10 can also include a frame buffer 15. As shown in Fig. 1, the prior art structure 1G is required for each integrated wafer 6 () and (four) - (four) punch μ. The tilt buffer H15 is stored in the image container for processing (4) comb detector 2 and IPC 25. The memory controller 3〇 (one controller per +贞 buffer) is coordinated between the 3D comb filter 2〇 and the frame buffer 丨5 and in the scare c μ and 0 continuation pages (the page is not covered) Let Teng, remember the page) 9 1313021 _ 玖, invention description... Invented the read/write request between the page buffers 15. Frame buffer 15 may be any suitable memory medium known to those skilled in the art, such as DRAM. Moreover, the 'building buffer 15' can include building buffers of different sizes, depending on the particular application. Frame buffer 15 may also include a plurality of memory 5 wafers to meet the memory needs of a particular application. The 3D comb chopper 2 takes the composite video signal 5〇 as an input. The composite video nickname 50 can be an NTSC signal, a PAL signal, or any other such signal known to those skilled in the art. NTsc supports the National Television Standards Committee and a composite video signal with an (interleaved) 10 recovery rate of 6 frames per second. Each frame contains 525 lines and can contain 16 million different colors. Signal 5〇 can also be a signal for high definition television, which provides much better resolution than current TV standards based on the NTSC standard. PAL supports alternating phase lines, the dominant TV standard in Europe. Although NTSC delivers 525 lines of resolution at 60 frames per second, the pAL delivers 625 lines at 50 fields per second. These technical conditions are well known in the art. The 3D comb filter 20 receives the composite video signal 50 and separates the composite video signal 50 into its component signals (as are the different types of comb filters discussed below, and they are very different in performance. For the purposes of this patent application, the description will focus on 3D comb filter technology. Composite video signal 50 includes luminosity (luminance) signals and chrominance (color) signals. In video terminology, they are often referred to as Y and C, respectively. The signal c signal is a combination of two other intermediate signals (such as the I and q signals in the YIQ signal and the Cb and Cr signals in the YcbCr signal). Please note and use the continuation page when using it.) 10 1313021 发明Inventive Note Description of the Invention Continued page These additional chrominance signals are generated from the original red, green and blue (RGB) of the video camera. Color space models (eg, yiq, YCbCr ' and Yuv) use luminance values to represent basic black and white image information. The mother model also uses two chrominance values to depict color information, although it 5 The parent is different in how the chromaticity values are specified. Different color space models and their operation are well known to those skilled in the art. Video processing equipment, such as television monitors, must take some form of Y/C separation. The gamma and c signal information is recovered from the composite video signal (e.g., composite video signal 50). 10 Returning now to Fig. 1, the 3D comb filter 20 can be as known in the art, 3D motion adaptive γ/ C separation filter. The 3D comb filter 2 can therefore process the same scan lines (comb-like filtering between frames) taken from successive video frames. In contrast to intra-field comb filtering, it involves processing a single video within % connection. Scan line. The same scan line 15 from two successive frames is fed to the basic digital line comb filter in the 3D comb filter. If the image is stationary at the same position between frames 'The inter-frame comb filter can perfectly separate the Υ and C information. If there is image motion or color change between frames' then the corresponding lines in successive frames will have different Υ/c content. In such a case, the intra comb filter produces the error message No. 20. Therefore, the '3D Υ/c separation filter must be motion adaptive and only select intra comb filtering when there is no motion. The 3D motion adaptive Y/C split comb filter is potentially capable of near perfect Υ/c separation of still images. The 3D comb filter 20 forwards the separated gamma and c signals to the 1C chip 65 0 continued page (Inventory Note When the page is not enough, please note and use the continuation page) 11 1313021 IP, IPC 25 in the description of the invention. Interleave-forward converter 25 takes the interleaved 丫 and ^ signals, and transforms them into progressive (also It is called a non-interlaced or sequential signal 75' which is output to the display. The progressive signal 75 is related to progressive scanning, which is a method of drawing an image scan line on the display in the same manner as the interleaved signal, but instead of separating the video frame into two fields, one scanning line containing an odd number. And the other contains even scan lines, and the full frame is scanned from the bottom to the bottom in one process. The IPC 25 thus transforms the interleaved signal into a non-interlaced signal 'which can be output in a progressive display without artifacts. The progressive signal 75 output from the IPC 25 may be a signal for a suitable format (such as NTSC or PAL) for displaying the monitor. Figure 2 is a block diagram of an embodiment of the method and system of the present invention for integrating a 3D Y/c comb filter and an IPC block on a single wafer. The structure 100 of Figure 2 includes a single integrated wafer 11 and a frame buffer 8A. Integrated wafer 110 includes a 3D comb filter 20 (which may be a motion adaptive Y/c split comb 15 filter or other comb filter known to those skilled in the art), IPC 25 and a shared memory controller 70. IPC 25 can be a motion and edge adaptive interleaving-progressive converter. Alternatively, IPC 25 may instead include a field rate upconverter. Both the 3D comb filter 20 and the IPC 25 structure 1 are serviced by a shared memory 20 controller. The shared memory controller 70 can coordinate read and write requests from the 3D Y/C comb filter 20 and IPC 25 to enable the frame buffer 80 to be used by both. The shared memory controller 7 can be an integrated component of the integrated wafer 110 or it can be a separate component that can be communicatively coupled to the integrated wafer 11 and the frame buffer 8A. The frame buffer 8〇 can be 0 consecutive pages. (When the description page is not enough, please note and use the continuation page) 12 1313021 发明, Invention Description "Invention Description Continued Page 2 Any size required for the application of the feature a buffer, and may include one or more DRAM wafers, or may be any other memory device known to those skilled in the art. The single wafer structure of Figure 2 may also include (although not on Figure 2 5)) The foot and the connector between the elements of a single integrated wafer and/or between the external elements in a manner known to those skilled in the art. The foot and the connector can be used as required for the particular application. Configured. 3D comb-shaped waver,

As described with reference to Figure 1, the composite video signal 5 取 is taken as an input. The Y*c signal that is forwarded to the IPC 25 by the 3D comb filter 20 is not shown in FIG. Embodiments of the invention may include a system as shown in Fig. 2, and may also include a method for sharing a single frame buffer 80 between comb filter 20 and IPC 25. The method can include communicatively coupling on the integrated wafer 110 for receiving and processing video signals, such as composite video signals 5, 3D 15 comb ferrite 20, IPC 25, and one or more data channels for video signals Communication with its processed components. The method can also include communicatively connecting the dumper 80 to the integrated wafer 110. Embodiments of the method and system of the present invention provide the advantages of reduced form factor and reduced manufacturing cost while maintaining performance comparable or better than current current solutions. The reduced form factor (reduced size) may allow for a reduction in the size requirements of the apparatus that cites embodiments of the present invention. As such, embodiments of the present invention can provide cost savings associated with prior art double frame buffer requirements. Embodiments of the method and system of the present invention may include such an embodiment, 0 continuation page (please note and use the continuation page when the invention page is not available) 13 1313021 玖, invention description, continuation page, frame buffer The 80 includes more than one memory device available for communication to the memory controller 70 for the 3D comb filter 20 and the IPC 25. In such an embodiment, the memory controller 7 can control (mediate) read/write requests from the 3D comb chopper 20 and from the IPC 25 to the amplitude buffer 80 to determine for a given read. /Write request to access that memory device. In the multi-memory device frame buffer 80 embodiment, the memory controller 7 can also control which memory device of the frame buffer 80 is accessed by the 3D comb filter 2A and the IPC 25. Thus, memory controller 70 can route requests from 31) comb filter 20 and IPC 25 to maximize speed and efficiency. The 10 frame buffer 80 may have any memory size required for the application, but typically for 3D motion adaptive gamma/c separation, the frame buffer 8 must have a format for use by the application implementing the invention. A sufficient size of at least two video frames processed from video signal 50 is maintained. Frame buffer 80 is used to store video frames for averaging and motion detection. For example, for 15 in the NTSC format, one frame is approximately 72 〇 x 480 pixels. For a 72 〇χ 48 〇 pixel NTSC frame, the frame buffer 80 must include four megabytes multiplied by a "bit DRAM die to store a 64-bit block. Alternatively, two suffix bytes can be used multiplied by 32 bits. Wafers. However, these memory requirements are well known in the art and can be implemented without undue experimentation. The size requirements for the frame 20 buffer 80 can thus be readily determined for a particular application. The method and method of the present invention Embodiments of the system can be implemented as part of a high definition (taste,) or progressive scanning television video processing system. In fact, the method and system embodiment of the hair can be used as having a _th page (the circle is not Please note and use the continuation page when using it.) ~, 1313021 Description of the invention The continuation of the system video processing system, the invention description IPC converter and 3)) any explicit part of the comb filter is implemented. Although the invention has been described in detail herein with reference to the exemplary embodiments, it should be understood that It will be appreciated that the multiple CI changes of the embodiments of the present invention and additional embodiments of the present invention will be apparent to, or may be made by, those skilled in the art in view of this description. And additional embodiments are intended to be within the spirit and true scope of the invention as claimed in the following claims. [FIG. 1] FIG. 1 is a prior art that provides comb filtering, interleaving-incremental transformation, and frame buffering. Block diagram of a wafer structure. Fig. 2 is a simplified block diagram of an embodiment of the single wafer integration system of the present invention. 15 0 Continuation page (Note: When the page is insufficient, please note and use the continuation page) 1313021 Description of the Invention [Main component representative symbol table of the drawing] 50... Composite video signal 60, 65··· 1C Wafer 7 5... Progressive signal 110···Integrated wafer 15, 80... Frame buffer 20·.· 3D Comb filter 25...interleaving-progressive converter 5 30,70...memory controller 10

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Claims (1)

97.02.06. Ι31301Ϊ1124126 Application for Patent Scope Correction, Patent Application Scope 1 呛年&gt; Month 6; #(文)正本1. A soap wafer integration structure, including: ______ - integrated wafer 'for Receiving and processing a composite video signal, wherein the integrated wafer includes a 3D motion adaptive γ/c split comb filter; separating Y and C components from the complex 5-in-video signal; interleaving-incremental converter (" IPC"); a memory controller' for coordinating read and write requests from the comb filter and from the IPC to a frame buffer, enabling the comb filter and the IPC sharing a frame buffer; and more than 10 data channels for communication of the video signal with its processed elements. 2. The structure of claim </ RTI> wherein said frame buffer is for storing one or more frames processed from said video signal, wherein said frame buffer is connectable to said integrated chip . 15 3. The structure of claim 2, wherein the frame buffer comprises one or more memory devices. 4. The structure of claim 3, wherein the memory device is a DRAM chip. 5. The structure of claim 2, wherein the frame buffer size 2 is sufficiently large to misplace two or more of the t贞. 6_ The structure of the scope of the patent application, wherein the Ipc is a motion and edge adaptive IPC. 7. The structure of claim 1, wherein the plurality of data channels of the towel are further included in the integrated wafer and outside the integrated wafer, and the patent application range is transmitted by the 17 1313021 The legs and connectors of the integrated wafer are described. 8. A single wafer integration structure comprising: an integrated wafer 'for receiving and processing a composite video signal, wherein the integrated wafer comprises: 5 3D motion adaptive Y/c separation comb filter from the composite video Signal separation gamma and C components; field rate upconverter; memory controller 'for coordinating read and write requests from the comb filter and from the field rate upconverter to a frame buffer, enabling 1 The comb filter and the field rate upconverter are allowed to share the frame buffer; and one or more data channels are used for communication of the video signal with its processed elements. 9. The structure of claim 8 wherein said frame buffer stores one or more frames processed from said video signal, and wherein said frame buffer is communicably coupled to said integrated wafer. The structure of claim 9, wherein the frame buffer comprises one or more memory devices. II. The structure of claim </ RTI> wherein said memory device 20 is a dram wafer. 12. The structure of claim 9, wherein the frame buffer size is large enough to store two or more of the frames. 13. A single wafer integrated structure comprising: an integrated wafer 'for receiving and processing video signals' wherein said 18 1313021 pick-up, patent-pending integrated wafer includes a 3D motion adaptive Y/C split comb filter, Separating Y and C components from the composite video signal; 5 Motion and edge adaptive 3D interleaved progressive converter ("IPC"); memory controller for coordinating read and write requests from the comb filter and from the IPC to a frame buffer, enabling commands The comb filter and the IPC share the frame buffer, wherein the frame buffer is communicably coupled to the integrated wafer and may store one or more frames processed from the video signal; and 10 A plurality of data channels for communication of the signal with its processed components. 14. The structure of claim 13 wherein said frame buffer comprises one or more memory devices. 15 15. The structure of claim 14, wherein the memory device is a DRAM wafer. 16. The structure of claim 13, wherein the frame buffer size is large enough to store two or more of the frames. 17. The structure of claim 13, wherein the plurality of data channels further comprise a foot and a connection for transmitting signals to the integrated wafer within the integrated wafer and outside the integrated wafer head. 19 1313021 Lu, (1), the designated representative figure of this case is: 2nd picture (2), the symbol of the representative figure of the representative figure is a simple description: 20...3D comb filter 70...memory controller 25...interlace-progressive Converter 80...frame buffer 柒, if there is a chemical formula in this case, please reveal the chemical formula that best shows the characteristics of the invention: