CA2316234C - Flicker filter and interlacer implemented in a television system displaying network application data - Google Patents
Flicker filter and interlacer implemented in a television system displaying network application data Download PDFInfo
- Publication number
- CA2316234C CA2316234C CA002316234A CA2316234A CA2316234C CA 2316234 C CA2316234 C CA 2316234C CA 002316234 A CA002316234 A CA 002316234A CA 2316234 A CA2316234 A CA 2316234A CA 2316234 C CA2316234 C CA 2316234C
- Authority
- CA
- Canada
- Prior art keywords
- filtered
- lines
- line
- pixel data
- network application
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000001914 filtration Methods 0.000 claims abstract description 38
- 230000004044 response Effects 0.000 claims abstract description 5
- 239000000872 buffer Substances 0.000 claims description 100
- 238000000034 method Methods 0.000 claims description 13
- 238000012545 processing Methods 0.000 claims description 9
- 230000007704 transition Effects 0.000 abstract description 10
- 230000000875 corresponding effect Effects 0.000 description 22
- 238000010586 diagram Methods 0.000 description 19
- 238000003860 storage Methods 0.000 description 17
- 230000000694 effects Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- 239000002131 composite material Substances 0.000 description 5
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000005055 memory storage Effects 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000000284 extract Substances 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000003466 anti-cipated effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 235000003642 hunger Nutrition 0.000 description 1
- 238000003706 image smoothing Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 230000037351 starvation Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
- H04N7/012—Conversion between an interlaced and a progressive signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
- H04N7/0132—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S348/00—Television
- Y10S348/91—Flicker reduction
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Computer Graphics (AREA)
- Controls And Circuits For Display Device (AREA)
- Television Systems (AREA)
- Picture Signal Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/001,304 | 1997-12-31 | ||
| US09/001,304 US6072530A (en) | 1997-12-31 | 1997-12-31 | Flicker filter and interlacer implemented in a television system displaying network application data |
| PCT/US1998/026545 WO1999034596A1 (en) | 1997-12-31 | 1998-12-14 | Flicker filter and interlacer implemented in a television system displaying network application data |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2316234A1 CA2316234A1 (en) | 1999-07-08 |
| CA2316234C true CA2316234C (en) | 2008-03-04 |
Family
ID=21695353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002316234A Expired - Fee Related CA2316234C (en) | 1997-12-31 | 1998-12-14 | Flicker filter and interlacer implemented in a television system displaying network application data |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6072530A (enExample) |
| EP (1) | EP1044562A1 (enExample) |
| JP (1) | JP2002500479A (enExample) |
| KR (1) | KR20010032565A (enExample) |
| CN (1) | CN1283363A (enExample) |
| AU (1) | AU1824399A (enExample) |
| CA (1) | CA2316234C (enExample) |
| WO (1) | WO1999034596A1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4008580B2 (ja) * | 1998-06-25 | 2007-11-14 | 株式会社東芝 | 表示制御装置およびインターレースデータ表示制御方法 |
| FR2797979B1 (fr) * | 1999-08-24 | 2002-05-24 | St Microelectronics Sa | Procede et systeme de filtrage anti-scintillement |
| US7034887B2 (en) * | 2002-07-15 | 2006-04-25 | Seiko Epson Corporation | Method and apparatus for flicker filtering interlaced display data |
| EP1511004A3 (en) | 2003-08-19 | 2010-01-27 | Sony Corporation | Memory controller, memory control method, rate conversion apparatus, rate conversion method, image-signal-processing apparatus, image-signal-processing method, and program for executing these methods |
| JP4661036B2 (ja) * | 2003-08-19 | 2011-03-30 | ソニー株式会社 | メモリコントローラおよびメモリコントロール方法、その方法を実行するためのプログラム |
| CN102148920B (zh) * | 2010-02-09 | 2013-03-13 | 联发科技股份有限公司 | 同步信号限幅装置与同步信号限幅方法 |
| KR101995553B1 (ko) * | 2013-01-16 | 2019-07-03 | 삼성디스플레이 주식회사 | 표시 장치의 타이밍 컨트롤러 및 이의 구동 방법 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5327156A (en) * | 1990-11-09 | 1994-07-05 | Fuji Photo Film Co., Ltd. | Apparatus for processing signals representative of a computer graphics image and a real image including storing processed signals back into internal memory |
| US5355328A (en) * | 1991-09-27 | 1994-10-11 | Northshore Laboratories, Inc. | Resampling apparatus suitable for resizing a video image |
| US5510843A (en) * | 1994-09-30 | 1996-04-23 | Cirrus Logic, Inc. | Flicker reduction and size adjustment for video controller with interlaced video output |
| US5742349A (en) * | 1996-05-07 | 1998-04-21 | Chrontel, Inc. | Memory efficient video graphics subsystem with vertical filtering and scan rate conversion |
| US5781241A (en) * | 1996-11-08 | 1998-07-14 | Chrontel, Inc. | Apparatus and method to convert computer graphics signals to television video signals with vertical and horizontal scaling requiring no frame buffers |
-
1997
- 1997-12-31 US US09/001,304 patent/US6072530A/en not_active Expired - Lifetime
-
1998
- 1998-12-14 WO PCT/US1998/026545 patent/WO1999034596A1/en not_active Ceased
- 1998-12-14 JP JP2000527088A patent/JP2002500479A/ja active Pending
- 1998-12-14 AU AU18243/99A patent/AU1824399A/en not_active Abandoned
- 1998-12-14 CN CN98812776A patent/CN1283363A/zh active Pending
- 1998-12-14 EP EP98963164A patent/EP1044562A1/en not_active Withdrawn
- 1998-12-14 KR KR1020007005810A patent/KR20010032565A/ko not_active Ceased
- 1998-12-14 CA CA002316234A patent/CA2316234C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| AU1824399A (en) | 1999-07-19 |
| US6072530A (en) | 2000-06-06 |
| KR20010032565A (ko) | 2001-04-25 |
| EP1044562A1 (en) | 2000-10-18 |
| CN1283363A (zh) | 2001-02-07 |
| JP2002500479A (ja) | 2002-01-08 |
| CA2316234A1 (en) | 1999-07-08 |
| WO1999034596A1 (en) | 1999-07-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKLA | Lapsed |
Effective date: 20141215 |
|
| MKLA | Lapsed |
Effective date: 20141215 |